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[mips][microMIPS] Implement disassembler support for 16-bit instructions LI16, ADDIUR1SP, ADDIUR2 and ADDIUS5
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Authored by jkolek on Nov 26 2014, 5:49 AM.

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jkolek updated this revision to Diff 16649.Nov 26 2014, 5:49 AM
jkolek retitled this revision from to [mips][microMIPS] Implement disassembler support for 16-bit instructions LI16, ADDIUR1SP, ADDIUR2 and ADDIUS5.
jkolek updated this object.
jkolek edited the test plan for this revision. (Show Details)
jkolek added reviewers: sstankovic, dsanders, vmedic.
jkolek added subscribers: Unknown Object (MLST), zoran.jovanovic, atanasyan.
sstankovic added inline comments.Nov 27 2014, 4:42 AM
lib/Target/Mips/Disassembler/MipsDisassembler.cpp
291 ↗(On Diff #16649)

You can place all parameters on 2 lines.

296 ↗(On Diff #16649)

Same here (and several cases below).

1446 ↗(On Diff #16649)

You don't need this instruction. Insn already contains 3-bit value extracted from the corresponding 3-bit instruction field.

1460 ↗(On Diff #16649)

Same here.

1469 ↗(On Diff #16649)

Same here.

jkolek updated this revision to Diff 16690.Nov 27 2014, 5:47 AM
sstankovic accepted this revision.Nov 27 2014, 5:55 AM
sstankovic edited edge metadata.
This revision is now accepted and ready to land.Nov 27 2014, 5:55 AM
jkolek closed this revision.Nov 27 2014, 6:42 AM
jkolek updated this revision to Diff 16693.

Closed by commit rL222887 (authored by @jkolek).