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Differential D6365

[mips][microMIPS] Fix JRADDIUSP instruction
ClosedPublic

Authored by jkolek on Nov 21 2014, 3:53 PM.

Details

Reviewers
sstankovic
dsanders
vmedic
Commits
rG11bdb8bf336a: [mips][microMIPS] Fix JRADDIUSP instruction
rL222658: [mips][microMIPS] Fix JRADDIUSP instruction
Summary

Fix JRADDIUSP instruction, remove delay slot flag because this instruction doesn't have delay slot.

Diff Detail

Repository
rL LLVM

Event Timeline

jkolek updated this revision to Diff 16514.Nov 21 2014, 3:53 PM
jkolek retitled this revision from to [mips][microMIPS] Fix JRADDIUSP instruction.
jkolek updated this object.
jkolek edited the test plan for this revision. (Show Details)
jkolek added reviewers: sstankovic, dsanders, vmedic.
jkolek added subscribers: Unknown Object (MLST), zoran.jovanovic, petarj.
sstankovic edited edge metadata.Nov 24 2014, 7:36 AM

LGTM

sstankovic accepted this revision.Nov 24 2014, 7:36 AM
sstankovic edited edge metadata.
This revision is now accepted and ready to land.Nov 24 2014, 7:36 AM
jkolek closed this revision.Nov 24 2014, 8:14 AM
jkolek updated this revision to Diff 16565.

Closed by commit rL222658 (authored by @jkolek).

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
Mips/
1 line
test/
MC/
Mips/
6 lines

Diff 16565

llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td

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} }
// Base class for JRADDIUSP instruction. // Base class for JRADDIUSP instruction.
class JumpRAddiuStackMM16 : class JumpRAddiuStackMM16 :
MicroMipsInst16<(outs), (ins uimm5_lsl2:$imm), "jraddiusp\t$imm", MicroMipsInst16<(outs), (ins uimm5_lsl2:$imm), "jraddiusp\t$imm",
[], IIBranch, FrmR> { [], IIBranch, FrmR> {
let isTerminator = 1; let isTerminator = 1;
let isBarrier = 1; let isBarrier = 1;
let hasDelaySlot = 1;
let isBranch = 1; let isBranch = 1;
let isIndirectBranch = 1; let isIndirectBranch = 1;
} }
// 16-bit Jump and Link (Call) - Short Delay Slot // 16-bit Jump and Link (Call) - Short Delay Slot
class JumpLinkRegSMM16<string opstr, RegisterOperand RO> : class JumpLinkRegSMM16<string opstr, RegisterOperand RO> :
MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"), MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
[], IIBranch, FrmR> { [], IIBranch, FrmR> {
▲ Show 20 Lines • Show All 374 Lines • Show Last 20 Lines

llvm/trunk/test/MC/Mips/micromips-16-bit-instructions.s

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# CHECK-EL: addius5 $7, -2 # encoding: [0xfc,0x4c] # CHECK-EL: addius5 $7, -2 # encoding: [0xfc,0x4c]
# CHECK-EL: addiusp -16 # encoding: [0xf9,0x4f] # CHECK-EL: addiusp -16 # encoding: [0xf9,0x4f]
# CHECK-EL: mfhi $9 # encoding: [0x09,0x46] # CHECK-EL: mfhi $9 # encoding: [0x09,0x46]
# CHECK-EL: mflo $9 # encoding: [0x49,0x46] # CHECK-EL: mflo $9 # encoding: [0x49,0x46]
# CHECK-EL: move $25, $1 # encoding: [0x21,0x0f] # CHECK-EL: move $25, $1 # encoding: [0x21,0x0f]
# CHECK-EL: jrc $9 # encoding: [0xa9,0x45] # CHECK-EL: jrc $9 # encoding: [0xa9,0x45]
# CHECK-NEXT: jalr $9 # encoding: [0xc9,0x45] # CHECK-NEXT: jalr $9 # encoding: [0xc9,0x45]
# CHECK-EL: jraddiusp 20 # encoding: [0x05,0x47] # CHECK-EL: jraddiusp 20 # encoding: [0x05,0x47]
# CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK-NEXT: jalrs16 $9 # encoding: [0xe9,0x45]
# CHECK-EL: jalrs16 $9 # encoding: [0xe9,0x45]
# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c] # CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c]
# CHECK-EL: jr16 $9 # encoding: [0x89,0x45] # CHECK-EL: jr16 $9 # encoding: [0x89,0x45]
# CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00]
#------------------------------------------------------------------------------ #------------------------------------------------------------------------------
# Big endian # Big endian
#------------------------------------------------------------------------------ #------------------------------------------------------------------------------
# CHECK-EB: addu16 $6, $17, $4 # encoding: [0x07,0x42] # CHECK-EB: addu16 $6, $17, $4 # encoding: [0x07,0x42]
# CHECK-EB: subu16 $5, $16, $3 # encoding: [0x06,0xb1] # CHECK-EB: subu16 $5, $16, $3 # encoding: [0x06,0xb1]
Show All 19 Lines
# CHECK-EB: addius5 $7, -2 # encoding: [0x4c,0xfc] # CHECK-EB: addius5 $7, -2 # encoding: [0x4c,0xfc]
# CHECK-EB: addiusp -16 # encoding: [0x4f,0xf9] # CHECK-EB: addiusp -16 # encoding: [0x4f,0xf9]
# CHECK-EB: mfhi $9 # encoding: [0x46,0x09] # CHECK-EB: mfhi $9 # encoding: [0x46,0x09]
# CHECK-EB: mflo $9 # encoding: [0x46,0x49] # CHECK-EB: mflo $9 # encoding: [0x46,0x49]
# CHECK-EB: move $25, $1 # encoding: [0x0f,0x21] # CHECK-EB: move $25, $1 # encoding: [0x0f,0x21]
# CHECK-EB: jrc $9 # encoding: [0x45,0xa9] # CHECK-EB: jrc $9 # encoding: [0x45,0xa9]
# CHECK-NEXT: jalr $9 # encoding: [0x45,0xc9] # CHECK-NEXT: jalr $9 # encoding: [0x45,0xc9]
# CHECK-EB: jraddiusp 20 # encoding: [0x47,0x05] # CHECK-EB: jraddiusp 20 # encoding: [0x47,0x05]
# CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK-NEXT: jalrs16 $9 # encoding: [0x45,0xe9]
# CHECK-EB: jalrs16 $9 # encoding: [0x45,0xe9]
# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00] # CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00]
# CHECK-EB: jr16 $9 # encoding: [0x45,0x89] # CHECK-EB: jr16 $9 # encoding: [0x45,0x89]
# CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00]
addu16 $6, $17, $4 addu16 $6, $17, $4
subu16 $5, $16, $3 subu16 $5, $16, $3
andi16 $16, $2, 31 andi16 $16, $2, 31
and16 $16, $2 and16 $16, $2
Show All 27 Lines