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[X86][SSE] Lower ICMP EQ(AND(X,C),C) -> SRA(SHL(X,LOG2(C)),BW-1) iff C is power-of-2.
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Authored by RKSimon on Apr 12 2019, 10:20 AM.

Details

Summary

This replaces the MOVMSK combine introduced at D52121/rL342326

(movmsk (setne (and X, (1 << C)), 0)) -> (movmsk (X << C))

with the more general icmp lowering so it can pick up more cases through bitcasts - notably vXi8 cases which use vXi16 shifts+masks, this patch can remove the mask and use pcmpgtb(0,x) for the sra.

Diff Detail

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rL LLVM

Event Timeline

RKSimon created this revision.Apr 12 2019, 10:20 AM
Herald added a project: Restricted Project. · View Herald TranscriptApr 12 2019, 10:21 AM
craig.topper added inline comments.Apr 14 2019, 7:29 PM
lib/Target/X86/X86ISelLowering.cpp
19925

Would we not have constant folded this somewhere else already such that we could just check for all constant build_vector here?

RKSimon updated this revision to Diff 195541.Apr 17 2019, 4:56 AM

Use isConstOrConstSplat

RKSimon marked 2 inline comments as done.Apr 17 2019, 4:58 AM
RKSimon added inline comments.
lib/Target/X86/X86ISelLowering.cpp
19925

Fixed - that was a leftover from some other experiments I was doing.

This revision is now accepted and ready to land.Apr 17 2019, 1:00 PM
This revision was automatically updated to reflect the committed changes.
RKSimon marked an inline comment as done.