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Differential D60585

[CVP] Set NSW/NUW flags when simplifying with.overflow
ClosedPublic

Authored by nikic on Apr 11 2019, 2:18 PM.

Details

Reviewers
sanjoy
lebedev.ri
spatel
Commits
rG00a0d5d1de58: [CVP] Set NSW/NUW flags when simplifying with.overflow
rL358298: [CVP] Set NSW/NUW flags when simplifying with.overflow
Summary

When CVP determines that a with.overflow intrinsic cannot overflow, it currently inserts a simple add/sub. As we already determined that there can be no overflow, we should add the appropriate NUW/NSW flag.

Diff Detail

Event Timeline

nikic created this revision.Apr 11 2019, 2:18 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 11 2019, 2:18 PM
Herald added subscribers: llvm-commits, hiraditya. · View Herald Transcript
lebedev.ri added a comment.Apr 11 2019, 2:25 PM

Looks reasonable.

spatel accepted this revision.Apr 11 2019, 3:53 PM

LGTM

This revision is now accepted and ready to land.Apr 11 2019, 3:53 PM
Closed by commit rL358298: [CVP] Set NSW/NUW flags when simplifying with.overflow (authored by nikic). · Explain WhyApr 12 2019, 11:18 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
lib/
Transforms/
Scalar/
8 lines
test/
Transforms/
CorrelatedValuePropagation/
26 lines

Diff 194757

llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp

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static void processOverflowIntrinsic(IntrinsicInst *II) { static void processOverflowIntrinsic(IntrinsicInst *II) {
IRBuilder<> B(II); IRBuilder<> B(II);
Value *NewOp = nullptr; Value *NewOp = nullptr;
switch (II->getIntrinsicID()) { switch (II->getIntrinsicID()) {
default: default:
llvm_unreachable("Unexpected instruction."); llvm_unreachable("Unexpected instruction.");
case Intrinsic::uadd_with_overflow: case Intrinsic::uadd_with_overflow:
NewOp = B.CreateNUWAdd(II->getOperand(0), II->getOperand(1), II->getName());
break;
case Intrinsic::sadd_with_overflow: case Intrinsic::sadd_with_overflow:
NewOp = B.CreateAdd(II->getOperand(0), II->getOperand(1), II->getName()); NewOp = B.CreateNSWAdd(II->getOperand(0), II->getOperand(1), II->getName());
break; break;
case Intrinsic::usub_with_overflow: case Intrinsic::usub_with_overflow:
NewOp = B.CreateNUWSub(II->getOperand(0), II->getOperand(1), II->getName());
break;
case Intrinsic::ssub_with_overflow: case Intrinsic::ssub_with_overflow:
NewOp = B.CreateSub(II->getOperand(0), II->getOperand(1), II->getName()); NewOp = B.CreateNSWSub(II->getOperand(0), II->getOperand(1), II->getName());
break; break;
} }
++NumOverflows; ++NumOverflows;
Value *NewI = B.CreateInsertValue(UndefValue::get(II->getType()), NewOp, 0); Value *NewI = B.CreateInsertValue(UndefValue::get(II->getType()), NewOp, 0);
NewI = B.CreateInsertValue(NewI, ConstantInt::getFalse(II->getContext()), 1); NewI = B.CreateInsertValue(NewI, ConstantInt::getFalse(II->getContext()), 1);
II->replaceAllUsesWith(NewI); II->replaceAllUsesWith(NewI);
II->eraseFromParent(); II->eraseFromParent();
} }
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llvm/test/Transforms/CorrelatedValuePropagation/overflows.ll

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define i32 @signed_add(i32 %x, i32 %y) { define i32 @signed_add(i32 %x, i32 %y) {
; CHECK-LABEL: @signed_add( ; CHECK-LABEL: @signed_add(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[Y:%.*]], 0 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[Y:%.*]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[LOR_LHS_FALSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[LOR_LHS_FALSE:%.*]]
; CHECK: land.lhs.true: ; CHECK: land.lhs.true:
; CHECK-NEXT: [[TMP0:%.*]] = sub i32 2147483647, [[Y]] ; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 2147483647, [[Y]]
; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0
; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1 ; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1
; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1 ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1
; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[CONT:%.*]] ; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[CONT:%.*]]
; CHECK: trap: ; CHECK: trap:
; CHECK-NEXT: tail call void @llvm.trap() ; CHECK-NEXT: tail call void @llvm.trap()
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK: cont: ; CHECK: cont:
; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP4]], [[X:%.*]] ; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP4]], [[X:%.*]]
; CHECK-NEXT: br i1 [[CMP1]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]] ; CHECK-NEXT: br i1 [[CMP1]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; CHECK: lor.lhs.false: ; CHECK: lor.lhs.false:
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[Y]], 0 ; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[Y]], 0
; CHECK-NEXT: br i1 [[CMP2]], label [[LAND_LHS_TRUE3:%.*]], label [[COND_FALSE]] ; CHECK-NEXT: br i1 [[CMP2]], label [[LAND_LHS_TRUE3:%.*]], label [[COND_FALSE]]
; CHECK: land.lhs.true3: ; CHECK: land.lhs.true3:
; CHECK-NEXT: [[TMP5:%.*]] = sub i32 -2147483648, [[Y]] ; CHECK-NEXT: [[TMP5:%.*]] = sub nsw i32 -2147483648, [[Y]]
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP5]], 0 ; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP5]], 0
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 false, 1 ; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 false, 1
; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1 ; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
; CHECK-NEXT: br i1 [[TMP8]], label [[TRAP]], label [[CONT4:%.*]] ; CHECK-NEXT: br i1 [[TMP8]], label [[TRAP]], label [[CONT4:%.*]]
; CHECK: cont4: ; CHECK: cont4:
; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { i32, i1 } [[TMP7]], 0 ; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { i32, i1 } [[TMP7]], 0
; CHECK-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[X]] ; CHECK-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[X]]
; CHECK-NEXT: br i1 [[CMP5]], label [[COND_END]], label [[COND_FALSE]] ; CHECK-NEXT: br i1 [[CMP5]], label [[COND_END]], label [[COND_FALSE]]
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cond.end: ; preds = %cond.false, %cont, %cont4 cond.end: ; preds = %cond.false, %cont, %cont4
%cond = phi i32 [ 0, %cont4 ], [ 0, %cont ], [ %7, %cond.false ] %cond = phi i32 [ 0, %cont4 ], [ 0, %cont ], [ %7, %cond.false ]
ret i32 %cond ret i32 %cond
} }
define i32 @unsigned_add(i32 %x, i32 %y) { define i32 @unsigned_add(i32 %x, i32 %y) {
; CHECK-LABEL: @unsigned_add( ; CHECK-LABEL: @unsigned_add(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = sub i32 -1, [[Y:%.*]] ; CHECK-NEXT: [[TMP0:%.*]] = sub nuw i32 -1, [[Y:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0
; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1 ; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1
; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1 ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1
; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[CONT:%.*]] ; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[CONT:%.*]]
; CHECK: trap: ; CHECK: trap:
; CHECK-NEXT: tail call void @llvm.trap() ; CHECK-NEXT: tail call void @llvm.trap()
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK: cont: ; CHECK: cont:
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} }
define i32 @signed_sub(i32 %x, i32 %y) { define i32 @signed_sub(i32 %x, i32 %y) {
; CHECK-LABEL: @signed_sub( ; CHECK-LABEL: @signed_sub(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[Y:%.*]], 0 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[Y:%.*]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[LOR_LHS_FALSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[LOR_LHS_FALSE:%.*]]
; CHECK: land.lhs.true: ; CHECK: land.lhs.true:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[Y]], 2147483647 ; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[Y]], 2147483647
; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0
; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1 ; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1
; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1 ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1
; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[CONT:%.*]] ; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[CONT:%.*]]
; CHECK: trap: ; CHECK: trap:
; CHECK-NEXT: tail call void @llvm.trap() ; CHECK-NEXT: tail call void @llvm.trap()
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK: cont: ; CHECK: cont:
; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP4]], [[X:%.*]] ; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP4]], [[X:%.*]]
; CHECK-NEXT: br i1 [[CMP1]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]] ; CHECK-NEXT: br i1 [[CMP1]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; CHECK: lor.lhs.false: ; CHECK: lor.lhs.false:
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[Y]], 0 ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[Y]], 0
; CHECK-NEXT: br i1 [[CMP2]], label [[COND_FALSE]], label [[LAND_LHS_TRUE3:%.*]] ; CHECK-NEXT: br i1 [[CMP2]], label [[COND_FALSE]], label [[LAND_LHS_TRUE3:%.*]]
; CHECK: land.lhs.true3: ; CHECK: land.lhs.true3:
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[Y]], -2147483648 ; CHECK-NEXT: [[TMP5:%.*]] = add nsw i32 [[Y]], -2147483648
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP5]], 0 ; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP5]], 0
; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 false, 1 ; CHECK-NEXT: [[TMP7:%.*]] = insertvalue { i32, i1 } [[TMP6]], i1 false, 1
; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1 ; CHECK-NEXT: [[TMP8:%.*]] = extractvalue { i32, i1 } [[TMP7]], 1
; CHECK-NEXT: br i1 [[TMP8]], label [[TRAP]], label [[CONT4:%.*]] ; CHECK-NEXT: br i1 [[TMP8]], label [[TRAP]], label [[CONT4:%.*]]
; CHECK: cont4: ; CHECK: cont4:
; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { i32, i1 } [[TMP7]], 0 ; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { i32, i1 } [[TMP7]], 0
; CHECK-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[X]] ; CHECK-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[X]]
; CHECK-NEXT: br i1 [[CMP5]], label [[COND_END]], label [[COND_FALSE]] ; CHECK-NEXT: br i1 [[CMP5]], label [[COND_END]], label [[COND_FALSE]]
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} }
define i32 @signed_add_r1(i32 %x) { define i32 @signed_add_r1(i32 %x) {
; CHECK-LABEL: @signed_add_r1( ; CHECK-LABEL: @signed_add_r1(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 2147483647 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 2147483647
; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; CHECK: cond.false: ; CHECK: cond.false:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[X]], 1 ; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[X]], 1
; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0
; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1 ; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1
; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0
; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1
; CHECK-NEXT: br i1 [[TMP4]], label [[TRAP:%.*]], label [[COND_END]] ; CHECK-NEXT: br i1 [[TMP4]], label [[TRAP:%.*]], label [[COND_END]]
; CHECK: trap: ; CHECK: trap:
; CHECK-NEXT: tail call void @llvm.trap() ; CHECK-NEXT: tail call void @llvm.trap()
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
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} }
define i32 @unsigned_add_r1(i32 %x) { define i32 @unsigned_add_r1(i32 %x) {
; CHECK-LABEL: @unsigned_add_r1( ; CHECK-LABEL: @unsigned_add_r1(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], -1 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], -1
; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; CHECK: cond.false: ; CHECK: cond.false:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[X]], 1 ; CHECK-NEXT: [[TMP0:%.*]] = add nuw i32 [[X]], 1
; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0
; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1 ; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1
; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0
; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1
; CHECK-NEXT: br i1 [[TMP4]], label [[TRAP:%.*]], label [[COND_END]] ; CHECK-NEXT: br i1 [[TMP4]], label [[TRAP:%.*]], label [[COND_END]]
; CHECK: trap: ; CHECK: trap:
; CHECK-NEXT: tail call void @llvm.trap() ; CHECK-NEXT: tail call void @llvm.trap()
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
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} }
define i32 @signed_sub_r1(i32 %x) { define i32 @signed_sub_r1(i32 %x) {
; CHECK-LABEL: @signed_sub_r1( ; CHECK-LABEL: @signed_sub_r1(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], -2147483648 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], -2147483648
; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; CHECK: cond.false: ; CHECK: cond.false:
; CHECK-NEXT: [[TMP0:%.*]] = sub i32 [[X]], 1 ; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 [[X]], 1
; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0
; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1 ; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1
; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0
; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1
; CHECK-NEXT: br i1 [[TMP4]], label [[TRAP:%.*]], label [[COND_END]] ; CHECK-NEXT: br i1 [[TMP4]], label [[TRAP:%.*]], label [[COND_END]]
; CHECK: trap: ; CHECK: trap:
; CHECK-NEXT: tail call void @llvm.trap() ; CHECK-NEXT: tail call void @llvm.trap()
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
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} }
define i32 @unsigned_sub_r1(i32 %x) { define i32 @unsigned_sub_r1(i32 %x) {
; CHECK-LABEL: @unsigned_sub_r1( ; CHECK-LABEL: @unsigned_sub_r1(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 0 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; CHECK: cond.false: ; CHECK: cond.false:
; CHECK-NEXT: [[TMP0:%.*]] = sub i32 [[X]], 1 ; CHECK-NEXT: [[TMP0:%.*]] = sub nuw i32 [[X]], 1
; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0
; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1 ; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1
; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0
; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1
; CHECK-NEXT: br i1 [[TMP4]], label [[TRAP:%.*]], label [[COND_END]] ; CHECK-NEXT: br i1 [[TMP4]], label [[TRAP:%.*]], label [[COND_END]]
; CHECK: trap: ; CHECK: trap:
; CHECK-NEXT: tail call void @llvm.trap() ; CHECK-NEXT: tail call void @llvm.trap()
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
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} }
define i32 @signed_add_rn1(i32 %x) { define i32 @signed_add_rn1(i32 %x) {
; CHECK-LABEL: @signed_add_rn1( ; CHECK-LABEL: @signed_add_rn1(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], -2147483648 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], -2147483648
; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; CHECK: cond.false: ; CHECK: cond.false:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[X]], -1 ; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[X]], -1
; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0
; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1 ; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1
; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0
; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1
; CHECK-NEXT: br i1 [[TMP4]], label [[TRAP:%.*]], label [[COND_END]] ; CHECK-NEXT: br i1 [[TMP4]], label [[TRAP:%.*]], label [[COND_END]]
; CHECK: trap: ; CHECK: trap:
; CHECK-NEXT: tail call void @llvm.trap() ; CHECK-NEXT: tail call void @llvm.trap()
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
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} }
define i32 @signed_sub_rn1(i32 %x) { define i32 @signed_sub_rn1(i32 %x) {
; CHECK-LABEL: @signed_sub_rn1( ; CHECK-LABEL: @signed_sub_rn1(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 2147483647 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 2147483647
; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[COND_END:%.*]], label [[COND_FALSE:%.*]]
; CHECK: cond.false: ; CHECK: cond.false:
; CHECK-NEXT: [[TMP0:%.*]] = sub i32 [[X]], -1 ; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 [[X]], -1
; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0
; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1 ; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1
; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0
; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1 ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1
; CHECK-NEXT: br i1 [[TMP4]], label [[TRAP:%.*]], label [[COND_END]] ; CHECK-NEXT: br i1 [[TMP4]], label [[TRAP:%.*]], label [[COND_END]]
; CHECK: trap: ; CHECK: trap:
; CHECK-NEXT: tail call void @llvm.trap() ; CHECK-NEXT: tail call void @llvm.trap()
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
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; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP3:%.*]] = icmp eq i32 [[I:%.*]], 0 ; CHECK-NEXT: [[CMP3:%.*]] = icmp eq i32 [[I:%.*]], 0
; CHECK-NEXT: br i1 [[CMP3]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]] ; CHECK-NEXT: br i1 [[CMP3]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]
; CHECK: while.body.preheader: ; CHECK: while.body.preheader:
; CHECK-NEXT: br label [[WHILE_BODY:%.*]] ; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
; CHECK: while.body: ; CHECK: while.body:
; CHECK-NEXT: [[I_ADDR_04:%.*]] = phi i32 [ [[TMP4:%.*]], [[CONT:%.*]] ], [ [[I]], [[WHILE_BODY_PREHEADER]] ] ; CHECK-NEXT: [[I_ADDR_04:%.*]] = phi i32 [ [[TMP4:%.*]], [[CONT:%.*]] ], [ [[I]], [[WHILE_BODY_PREHEADER]] ]
; CHECK-NEXT: [[CALL:%.*]] = tail call i32 @bar(i32 [[I_ADDR_04]]) ; CHECK-NEXT: [[CALL:%.*]] = tail call i32 @bar(i32 [[I_ADDR_04]])
; CHECK-NEXT: [[TMP0:%.*]] = sub i32 [[I_ADDR_04]], 1 ; CHECK-NEXT: [[TMP0:%.*]] = sub nuw i32 [[I_ADDR_04]], 1
; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0
; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1 ; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1
; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1 ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1
; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[CONT]] ; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[CONT]]
; CHECK: trap: ; CHECK: trap:
; CHECK-NEXT: tail call void @llvm.trap() ; CHECK-NEXT: tail call void @llvm.trap()
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK: cont: ; CHECK: cont:
Show All 30 Lineswhile.end: ; preds = %cont, %entry
ret void ret void
} }
define void @intrinsic_into_phi(i32 %n) { define void @intrinsic_into_phi(i32 %n) {
; CHECK-LABEL: @intrinsic_into_phi( ; CHECK-LABEL: @intrinsic_into_phi(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[CONT:%.*]] ; CHECK-NEXT: br label [[CONT:%.*]]
; CHECK: for.cond: ; CHECK: for.cond:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[DOTLCSSA:%.*]], 1 ; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[DOTLCSSA:%.*]], 1
; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } undef, i32 [[TMP0]], 0
; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1 ; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i32, i1 } [[TMP1]], i1 false, 1
; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1 ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1
; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[CONT]] ; CHECK-NEXT: br i1 [[TMP3]], label [[TRAP:%.*]], label [[CONT]]
; CHECK: trap: ; CHECK: trap:
; CHECK-NEXT: tail call void @llvm.trap() ; CHECK-NEXT: tail call void @llvm.trap()
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK: cont: ; CHECK: cont:
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