AMDGPU: Fix missing scc implicit def on s_andn2_b64_term

[arsenm]

Summary

Introduce new helper class to copy properties directly from the base
instruction.

[rampitec]

LGTM

[arsenm]

r357089

lib/Target/AMDGPU/SIInstructions.td

 
 } // End usesCustomInserter = 1, Defs = [SCC]
 
 let usesCustomInserter = 1 in {
 def GET_GROUPSTATICSIZE : SPseudoInstSI <(outs SReg_32:$sdst), (ins),
   [(set SReg_32:$sdst, (int_amdgcn_groupstaticsize))]>;
 } // End let usesCustomInserter = 1, SALU = 1
 
-def S_MOV_B64_term : SPseudoInstSI<(outs SReg_64:$dst),
-   (ins SSrc_b64:$src0)> {
-  let isAsCheapAsAMove = 1;
-  let isTerminator = 1;
-  let hasSideEffects = 0;
-}
-
-def S_XOR_B64_term : SPseudoInstSI<(outs SReg_64:$dst),
-   (ins SSrc_b64:$src0, SSrc_b64:$src1)> {
-  let isAsCheapAsAMove = 1;
+// Wrap an instruction by duplicating it, except for setting isTerminator.
+class WrapTerminatorInst<SOP_Pseudo base_inst> : SPseudoInstSI<
+      base_inst.OutOperandList,
+      base_inst.InOperandList> {
+  let Uses = base_inst.Uses;
+  let Defs = base_inst.Defs;
   let isTerminator = 1;
-  let hasSideEffects = 0;
-  let Defs = [SCC];
+  let isAsCheapAsAMove = base_inst.isAsCheapAsAMove;
+  let hasSideEffects = base_inst.hasSideEffects;
+  let UseNamedOperandTable = base_inst.UseNamedOperandTable;
+  let CodeSize = base_inst.CodeSize;
 }
 
-def S_ANDN2_B64_term : SPseudoInstSI<(outs SReg_64:$dst),
-   (ins SSrc_b64:$src0, SSrc_b64:$src1)> {
-  let isAsCheapAsAMove = 1;
-  let isTerminator = 1;
-  let hasSideEffects = 0;
-}
+def S_MOV_B64_term : WrapTerminatorInst<S_MOV_B64>;
+def S_XOR_B64_term : WrapTerminatorInst<S_XOR_B64>;
+def S_ANDN2_B64_term : WrapTerminatorInst<S_ANDN2_B64>;
 
 def WAVE_BARRIER : SPseudoInstSI<(outs), (ins),
   [(int_amdgcn_wave_barrier)]> {
   let SchedRW = [];
   let hasNoSchedulingInfo = 1;
   let hasSideEffects = 1;
   let mayLoad = 1;
   let mayStore = 1;

test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir

bb.9:
     %79:sreg_64 = COPY killed %36
     %60:sreg_64 = S_AND_B64 $exec, %45, implicit-def $scc
     %60:sreg_64 = S_OR_B64 %60, killed %79, implicit-def $scc
     %80:vreg_128 = COPY %78
     %16:sreg_64 = COPY %60
     %17:vreg_128 = COPY killed %80
     %18:vgpr_32 = COPY killed %76
     %19:vreg_128 = COPY killed %77
-    $exec = S_ANDN2_B64_term $exec, %60
+    $exec = S_ANDN2_B64_term $exec, %60, implicit-def $scc
     S_CBRANCH_EXECNZ %bb.4, implicit $exec
     S_BRANCH %bb.6
 
   bb.10:
     successors: %bb.11(0x80000000)
     %81:vreg_128 = COPY killed %75
     %82:vreg_128 = COPY killed %74
     %83:sreg_64 = COPY killed %73
 
   bb.11:
     successors: %bb.12(0x04000000), %bb.10(0x7c000000)
     undef %59.sub0:vreg_128 = COPY %81.sub0
     %59.sub2:vreg_128 = COPY %82.sub2
     %59.sub3:vreg_128 = COPY killed %82.sub3
     %84:sreg_64 = V_CMP_GE_U32_e64 killed %81.sub0, %28, implicit $exec
     %85:sreg_64 = S_OR_B64 killed %84, killed %83, implicit-def $scc
     %86:vreg_128 = COPY %59
     %73:sreg_64 = COPY %85
     %74:vreg_128 = COPY %59
     %75:vreg_128 = COPY killed %86
-    $exec = S_ANDN2_B64_term $exec, %85
+    $exec = S_ANDN2_B64_term $exec, %85, implicit-def $scc
     S_CBRANCH_EXECNZ %bb.10, implicit $exec
     S_BRANCH %bb.12
 
   bb.12:
     successors: %bb.15(0x40000000), %bb.5(0x40000000)
     $exec = S_OR_B64 $exec, killed %85, implicit-def $scc
     %87:sreg_64 = V_CMP_LT_U32_e64 11, killed %28, implicit $exec
     %88:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec

test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir

bb.7:
     successors: %bb.6(0x40000000), %bb.8(0x40000000)
     $exec = S_OR_B64 $exec, %24, implicit-def $scc
     %25:vreg_128 = COPY killed %21
     %26:vreg_128 = COPY killed %20
     %27:sreg_64 = COPY killed %19
     %28:sreg_64 = S_OR_B64 %24, killed %27, implicit-def dead $scc
     %5:sreg_64 = COPY %28
     %6:vreg_128 = COPY killed %25
-    $exec = S_ANDN2_B64_term $exec, %28
+    $exec = S_ANDN2_B64_term $exec, %28, implicit-def $scc
     S_CBRANCH_EXECNZ %bb.6, implicit $exec
     S_BRANCH %bb.8
 
   bb.8:
     successors: %bb.5(0x80000000)
     $exec = S_OR_B64 $exec, killed %28, implicit-def $scc
     %29:vreg_128 = COPY killed %26
     %1:vreg_128 = COPY killed %29

test/CodeGen/AMDGPU/coalescing-with-subregs-in-loop-bug.mir

bb.1:
     %31.sub1:vreg_128 = COPY %34
     %38:vgpr_32 = V_ADD_I32_e32 1, %36.sub0, implicit-def dead $vcc, implicit $exec
     %18:sreg_64 = V_CMP_LT_I32_e64 5, %38, implicit $exec
     %1:sreg_64 = S_OR_B64 killed %18, killed %0, implicit-def $scc
     %30:vreg_128 = COPY %31
     %43:sreg_64 = COPY %1
     %44:vreg_128 = COPY %35
     %45:vreg_128 = COPY killed %30
-    $exec = S_ANDN2_B64_term $exec, %1
+    $exec = S_ANDN2_B64_term $exec, %1, implicit-def $scc
     S_CBRANCH_EXECNZ %bb.1, implicit $exec
     S_BRANCH %bb.2
 
   bb.2:
     $exec = S_OR_B64 $exec, killed %1, implicit-def $scc
     %33:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
     undef %32.sub0:vreg_128 = COPY killed %31.sub0
     %32.sub2:vreg_128 = COPY %33
     $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %32:vreg_128
     S_ENDPGM 0
 
 ...

test/CodeGen/AMDGPU/fix-wwm-liveness.mir

 # RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-fix-wwm-liveness -o -  %s | FileCheck %s
 
 # Test a then phi value.
 #CHECK: test_wwm_liveness_then_phi
 #CHECK: %21:vgpr_32 = V_MOV_B32_e32 1, implicit $exec, implicit %21
 
 ---
 name:            test_wwm_liveness_then_phi
 alignment:       0
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-registers:       
+registers:
   - { id: 0, class: sreg_64, preferred-register: '' }
   - { id: 1, class: sgpr_32, preferred-register: '' }
   - { id: 2, class: sgpr_32, preferred-register: '' }
   - { id: 3, class: vgpr_32, preferred-register: '' }
   - { id: 4, class: vgpr_32, preferred-register: '' }
   - { id: 5, class: vgpr_32, preferred-register: '' }
   - { id: 6, class: vgpr_32, preferred-register: '' }
   - { id: 7, class: vgpr_32, preferred-register: '' }
   - { id: 8, class: sreg_64, preferred-register: '$vcc' }
   - { id: 9, class: sreg_64, preferred-register: '' }
   - { id: 10, class: sreg_32_xm0, preferred-register: '' }
   - { id: 11, class: sreg_64, preferred-register: '' }
   - { id: 12, class: sreg_32_xm0, preferred-register: '' }
   - { id: 13, class: sreg_32_xm0, preferred-register: '' }
   - { id: 14, class: sreg_32_xm0, preferred-register: '' }
   - { id: 15, class: sreg_128, preferred-register: '' }
   - { id: 16, class: vgpr_32, preferred-register: '' }
   - { id: 17, class: vgpr_32, preferred-register: '' }
   - { id: 18, class: vgpr_32, preferred-register: '' }
   - { id: 19, class: sreg_64, preferred-register: '' }
   - { id: 20, class: sreg_64, preferred-register: '' }
   - { id: 21, class: vgpr_32, preferred-register: '' }
   - { id: 22, class: sreg_64, preferred-register: '' }
   - { id: 23, class: sreg_64, preferred-register: '' }
-liveins:         
+liveins:
 body:             |
   bb.0:
     successors: %bb.1(0x40000000), %bb.2(0x40000000)
-  
     %21 = V_MOV_B32_e32 0, implicit $exec
     %5 = V_MBCNT_LO_U32_B32_e64 -1, 0, implicit $exec
     %6 = V_MBCNT_HI_U32_B32_e32 -1, killed %5, implicit $exec
     %8 = V_CMP_GT_U32_e64 32, killed %6, implicit $exec
     %22 = COPY $exec, implicit-def $exec
     %23 = S_AND_B64 %22, %8, implicit-def dead $scc
     %0 = S_XOR_B64 %23, %22, implicit-def dead $scc
     $exec = S_MOV_B64_term killed %23
     SI_MASK_BRANCH %bb.2, implicit $exec
     S_BRANCH %bb.1
-  
   bb.1:
     successors: %bb.2(0x80000000)
-  
     %13 = S_MOV_B32 61440
     %14 = S_MOV_B32 -1
     %15 = REG_SEQUENCE undef %12, 1, undef %10, 2, killed %14, 3, killed %13, 4
     %19 = COPY $exec
     $exec = S_MOV_B64 -1
     %16 = BUFFER_LOAD_DWORD_OFFSET %15, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 4)
     %17 = V_ADD_F32_e32 1065353216, killed %16, implicit $exec
     $exec = EXIT_WWM killed %19
     %21 = V_MOV_B32_e32 1, implicit $exec
     early-clobber %18 = WWM killed %17, implicit $exec
     BUFFER_STORE_DWORD_OFFSET killed %18, killed %15, 0, 0, 0, 0, 0, implicit $exec :: (store 4)
-  
   bb.2:
     $exec = S_OR_B64 $exec, killed %0, implicit-def $scc
     $vgpr0 = COPY killed %21
     SI_RETURN_TO_EPILOG killed $vgpr0
 
 ...
 
 # Test a loop with a loop exit value and a loop phi.
 #CHECK: test_wwm_liveness_loop
 #CHECK: %4:vgpr_32 = IMPLICIT_DEF
 #CHECK: bb.1:
 #CHECK: %4:vgpr_32 = FLAT_LOAD_DWORD{{.*}}, implicit %4
 #CHECK: %27:vgpr_32 = COPY killed %21, implicit %27
 
 ---
 name:            test_wwm_liveness_loop
 alignment:       0
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 failedISel:      false
 tracksRegLiveness: true
-registers:       
+registers:
   - { id: 0, class: vgpr_32, preferred-register: '' }
   - { id: 1, class: sreg_32_xm0, preferred-register: '' }
   - { id: 2, class: sreg_64, preferred-register: '' }
   - { id: 3, class: sreg_32_xm0, preferred-register: '' }
   - { id: 4, class: vgpr_32, preferred-register: '' }
   - { id: 5, class: sreg_32_xm0, preferred-register: '' }
   - { id: 6, class: sreg_64, preferred-register: '' }
   - { id: 7, class: sreg_64, preferred-register: '' }
registers:
   - { id: 20, class: vgpr_32, preferred-register: '' }
   - { id: 21, class: vgpr_32, preferred-register: '' }
   - { id: 22, class: vgpr_32, preferred-register: '' }
   - { id: 23, class: sreg_64, preferred-register: '' }
   - { id: 24, class: sreg_64, preferred-register: '' }
   - { id: 25, class: sreg_64, preferred-register: '' }
   - { id: 26, class: sreg_64, preferred-register: '' }
   - { id: 27, class: vgpr_32, preferred-register: '' }
-liveins:         
-frameInfo:       
+liveins:
+frameInfo:
   isFrameAddressTaken: false
   isReturnAddressTaken: false
   hasStackMap:     false
   hasPatchPoint:   false
   stackSize:       0
   offsetAdjustment: 0
   maxAlignment:    0
   adjustsStack:    false
   hasCalls:        false
   stackProtector:  ''
   maxCallFrameSize: 4294967295
   hasOpaqueSPAdjustment: false
   hasVAStart:      false
   hasMustTailInVarArgFunc: false
   localFrameSize:  0
   savePoint:       ''
   restorePoint:    ''
-fixedStack:      
-stack:           
-constants:       
+fixedStack:
+stack:
+constants:
 body:             |
   bb.0:
     successors: %bb.1(0x80000000)
-  
     %25:sreg_64 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
     %0:vgpr_32 = FLAT_LOAD_DWORD undef %9:vreg_64, 0, 0, 0, implicit $exec, implicit $flat_scr :: (volatile load 4 from `float addrspace(1)* undef`, addrspace 1)
     $exec = EXIT_WWM killed %25
     %12:vgpr_32 = V_MBCNT_LO_U32_B32_e64 -1, 0, implicit $exec
     %7:sreg_64 = S_MOV_B64 0
     %26:sreg_64 = COPY killed %7
     %27:vgpr_32 = COPY killed %12
-  
   bb.1:
     successors: %bb.2(0x04000000), %bb.1(0x7c000000)
-  
     %24:sreg_64 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
     %20:vgpr_32 = COPY killed %27
     %2:sreg_64 = COPY killed %26
     %4:vgpr_32 = FLAT_LOAD_DWORD undef %14:vreg_64, 0, 0, 0, implicit $exec, implicit $flat_scr :: (volatile load 4 from `float addrspace(1)* undef`, addrspace 1)
     $exec = EXIT_WWM killed %24
     %22:vgpr_32 = V_ADD_I32_e32 -1, killed %20, implicit-def dead $vcc, implicit $exec
     %17:sreg_64 = V_CMP_EQ_U32_e64 0, %22, implicit $exec
     %6:sreg_64 = S_OR_B64 killed %17, killed %2, implicit-def $scc
     %21:vgpr_32 = COPY killed %22
     %26:sreg_64 = COPY %6
     %27:vgpr_32 = COPY killed %21
-    $exec = S_ANDN2_B64_term $exec, %6
+    $exec = S_ANDN2_B64_term $exec, %6, implicit-def $scc
     S_CBRANCH_EXECNZ %bb.1, implicit $exec
     S_BRANCH %bb.2
-  
   bb.2:
     $exec = S_OR_B64 $exec, killed %6, implicit-def $scc
     %23:sreg_64 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
     %18:vgpr_32 = V_ADD_F32_e32 killed %0, killed %4, implicit $exec
     $exec = EXIT_WWM killed %23
     early-clobber %19:vgpr_32 = COPY killed %18, implicit $exec
     $vgpr0 = COPY killed %19
     SI_RETURN_TO_EPILOG killed $vgpr0
 
 ...