Mips: Don't create copy of nothing

[arsenm]

Summary

This was creating a copy of the register the pseudo itself was
def'ing, leaving a copy of an undefined register. I'm not sure how
the verifier is not catching this, but this avoids asserting in a
future change to RegAllocFast

[atanasyan]

The patch LGTM. SimonD, as far as I know you are an author of original patch D31287. Do you have any comments / objections against this fix?

[sdardis]

Good catch. LGTM.

lib/Target/Mips/MipsISelLowering.cpp

1727

This can committed separately as it is a NFC.

[arsenm]

r356716

lib/Target/Mips/MipsISelLowering.cpp

 // the insertion of stores between the linked load and the store conditional.
 
 MachineBasicBlock *
 MipsTargetLowering::emitAtomicCmpSwap(MachineInstr &MI,
                                       MachineBasicBlock *BB) const {
 
   assert((MI.getOpcode() == Mips::ATOMIC_CMP_SWAP_I32 ||
           MI.getOpcode() == Mips::ATOMIC_CMP_SWAP_I64) &&
-         "Unsupported atomic psseudo for EmitAtomicCmpSwap.");
+         "Unsupported atomic pseudo for EmitAtomicCmpSwap.");
 
   const unsigned Size = MI.getOpcode() == Mips::ATOMIC_CMP_SWAP_I32 ? 4 : 8;
 
   MachineFunction *MF = BB->getParent();
   MachineRegisterInfo &MRI = MF->getRegInfo();
   const TargetRegisterClass *RC = getRegClassFor(MVT::getIntegerVT(Size * 8));
   const TargetInstrInfo *TII = Subtarget.getInstrInfo();
   DebugLoc DL = MI.getDebugLoc();
MipsTargetLowering::emitAtomicCmpSwap(MachineInstr &MI,
   unsigned Scratch = MRI.createVirtualRegister(RC);
   MachineBasicBlock::iterator II(MI);
 
   // We need to create copies of the various registers and kill them at the
   // atomic pseudo. If the copies are not made, when the atomic is expanded
   // after fast register allocation, the spills will end up outside of the
   // blocks that their values are defined in, causing livein errors.
 
-  unsigned DestCopy = MRI.createVirtualRegister(MRI.getRegClass(Dest));
   unsigned PtrCopy = MRI.createVirtualRegister(MRI.getRegClass(Ptr));
   unsigned OldValCopy = MRI.createVirtualRegister(MRI.getRegClass(OldVal));
   unsigned NewValCopy = MRI.createVirtualRegister(MRI.getRegClass(NewVal));
 
-  BuildMI(*BB, II, DL, TII->get(Mips::COPY), DestCopy).addReg(Dest);
   BuildMI(*BB, II, DL, TII->get(Mips::COPY), PtrCopy).addReg(Ptr);
   BuildMI(*BB, II, DL, TII->get(Mips::COPY), OldValCopy).addReg(OldVal);
   BuildMI(*BB, II, DL, TII->get(Mips::COPY), NewValCopy).addReg(NewVal);
 
   // The purposes of the flags on the scratch registers is explained in
   // emitAtomicBinary. In summary, we need a scratch register which is going to
   // be undef, that is unique among registers chosen for the instruction.
 

test/CodeGen/Mips/atomic.ll

 ; MIPS32-NEXT:  $BB7_3: # %entry
 ; MIPS32-NEXT:    jr $ra
 ; MIPS32-NEXT:    addiu $sp, $sp, 8
 ;
 ; MIPS32O0-LABEL: AtomicCmpSwap32:
 ; MIPS32O0:       # %bb.0: # %entry
 ; MIPS32O0-NEXT:    lui $2, %hi(_gp_disp)
 ; MIPS32O0-NEXT:    addiu $2, $2, %lo(_gp_disp)
-; MIPS32O0-NEXT:    addiu $sp, $sp, -16
+; MIPS32O0-NEXT:    addiu $sp, $sp, -8
 ; MIPS32O0-NEXT:    addu $1, $2, $25
-; MIPS32O0-NEXT:    sw $5, 12($sp)
-; MIPS32O0-NEXT:    lw $2, 12($sp)
+; MIPS32O0-NEXT:    sw $5, 4($sp)
+; MIPS32O0-NEXT:    lw $2, 4($sp)
 ; MIPS32O0-NEXT:    lw $1, %got(x)($1)
-; MIPS32O0-NEXT:    lw $3, 8($sp) # 4-byte Folded Reload
-; MIPS32O0-NEXT:    move $5, $4
+; MIPS32O0-NEXT:    move $3, $4
 ; MIPS32O0-NEXT:  $BB7_1: # %entry
 ; MIPS32O0-NEXT:    # =>This Inner Loop Header: Depth=1
-; MIPS32O0-NEXT:    ll $6, 0($1)
-; MIPS32O0-NEXT:    bne $6, $5, $BB7_3
+; MIPS32O0-NEXT:    ll $5, 0($1)
+; MIPS32O0-NEXT:    bne $5, $3, $BB7_3
 ; MIPS32O0-NEXT:    nop
 ; MIPS32O0-NEXT:  # %bb.2: # %entry
 ; MIPS32O0-NEXT:    # in Loop: Header=BB7_1 Depth=1
-; MIPS32O0-NEXT:    move $7, $2
-; MIPS32O0-NEXT:    sc $7, 0($1)
-; MIPS32O0-NEXT:    beqz $7, $BB7_1
+; MIPS32O0-NEXT:    move $6, $2
+; MIPS32O0-NEXT:    sc $6, 0($1)
+; MIPS32O0-NEXT:    beqz $6, $BB7_1
 ; MIPS32O0-NEXT:    nop
 ; MIPS32O0-NEXT:  $BB7_3: # %entry
-; MIPS32O0-NEXT:    xor $1, $6, $4
+; MIPS32O0-NEXT:    xor $1, $5, $4
 ; MIPS32O0-NEXT:    sltiu $1, $1, 1
-; MIPS32O0-NEXT:    move $2, $6
-; MIPS32O0-NEXT:    sw $6, 8($sp) # 4-byte Folded Spill
-; MIPS32O0-NEXT:    sw $3, 4($sp) # 4-byte Folded Spill
+; MIPS32O0-NEXT:    move $2, $5
 ; MIPS32O0-NEXT:    sw $1, 0($sp) # 4-byte Folded Spill
-; MIPS32O0-NEXT:    addiu $sp, $sp, 16
+; MIPS32O0-NEXT:    addiu $sp, $sp, 8
 ; MIPS32O0-NEXT:    jr $ra
 ; MIPS32O0-NEXT:    nop
 ;
 ; MIPS32R2-LABEL: AtomicCmpSwap32:
 ; MIPS32R2:       # %bb.0: # %entry
 ; MIPS32R2-NEXT:    lui $2, %hi(_gp_disp)
 ; MIPS32R2-NEXT:    addiu $2, $2, %lo(_gp_disp)
 ; MIPS32R2-NEXT:    addiu $sp, $sp, -8

 ; MIPS32R6-NEXT:  $BB7_3: # %entry
 ; MIPS32R6-NEXT:    jr $ra
 ; MIPS32R6-NEXT:    addiu $sp, $sp, 8
 ;
 ; MIPS32R6O0-LABEL: AtomicCmpSwap32:
 ; MIPS32R6O0:       # %bb.0: # %entry
 ; MIPS32R6O0-NEXT:    lui $2, %hi(_gp_disp)
 ; MIPS32R6O0-NEXT:    addiu $2, $2, %lo(_gp_disp)
-; MIPS32R6O0-NEXT:    addiu $sp, $sp, -24
+; MIPS32R6O0-NEXT:    addiu $sp, $sp, -16
 ; MIPS32R6O0-NEXT:    addu $1, $2, $25
 ; MIPS32R6O0-NEXT:    move $2, $5
 ; MIPS32R6O0-NEXT:    move $3, $4
-; MIPS32R6O0-NEXT:    sw $5, 20($sp)
-; MIPS32R6O0-NEXT:    lw $5, 20($sp)
+; MIPS32R6O0-NEXT:    sw $5, 12($sp)
+; MIPS32R6O0-NEXT:    lw $5, 12($sp)
 ; MIPS32R6O0-NEXT:    lw $1, %got(x)($1)
-; MIPS32R6O0-NEXT:    lw $6, 16($sp) # 4-byte Folded Reload
 ; MIPS32R6O0-NEXT:  $BB7_1: # %entry
 ; MIPS32R6O0-NEXT:    # =>This Inner Loop Header: Depth=1
-; MIPS32R6O0-NEXT:    ll $7, 0($1)
-; MIPS32R6O0-NEXT:    bnec $7, $4, $BB7_3
+; MIPS32R6O0-NEXT:    ll $6, 0($1)
+; MIPS32R6O0-NEXT:    bnec $6, $4, $BB7_3
 ; MIPS32R6O0-NEXT:  # %bb.2: # %entry
 ; MIPS32R6O0-NEXT:    # in Loop: Header=BB7_1 Depth=1
-; MIPS32R6O0-NEXT:    move $8, $5
-; MIPS32R6O0-NEXT:    sc $8, 0($1)
-; MIPS32R6O0-NEXT:    beqzc $8, $BB7_1
+; MIPS32R6O0-NEXT:    move $7, $5
+; MIPS32R6O0-NEXT:    sc $7, 0($1)
+; MIPS32R6O0-NEXT:    beqzc $7, $BB7_1
 ; MIPS32R6O0-NEXT:  $BB7_3: # %entry
-; MIPS32R6O0-NEXT:    sw $2, 12($sp) # 4-byte Folded Spill
-; MIPS32R6O0-NEXT:    move $2, $7
-; MIPS32R6O0-NEXT:    sw $3, 8($sp) # 4-byte Folded Spill
-; MIPS32R6O0-NEXT:    sw $7, 16($sp) # 4-byte Folded Spill
-; MIPS32R6O0-NEXT:    sw $6, 4($sp) # 4-byte Folded Spill
-; MIPS32R6O0-NEXT:    addiu $sp, $sp, 24
+; MIPS32R6O0-NEXT:    sw $2, 8($sp) # 4-byte Folded Spill
+; MIPS32R6O0-NEXT:    move $2, $6
+; MIPS32R6O0-NEXT:    sw $3, 4($sp) # 4-byte Folded Spill
+; MIPS32R6O0-NEXT:    addiu $sp, $sp, 16
 ; MIPS32R6O0-NEXT:    jrc $ra
 ;
 ; MIPS4-LABEL: AtomicCmpSwap32:
 ; MIPS4:       # %bb.0: # %entry
 ; MIPS4-NEXT:    daddiu $sp, $sp, -16
 ; MIPS4-NEXT:    lui $1, %hi(%neg(%gp_rel(AtomicCmpSwap32)))
 ; MIPS4-NEXT:    daddu $1, $1, $25
 ; MIPS4-NEXT:    daddiu $1, $1, %lo(%neg(%gp_rel(AtomicCmpSwap32)))

 ; MIPS64R6O0-NEXT:    lui $1, %hi(%neg(%gp_rel(AtomicCmpSwap32)))
 ; MIPS64R6O0-NEXT:    daddu $1, $1, $25
 ; MIPS64R6O0-NEXT:    daddiu $1, $1, %lo(%neg(%gp_rel(AtomicCmpSwap32)))
 ; MIPS64R6O0-NEXT:    move $2, $4
 ; MIPS64R6O0-NEXT:    move $3, $5
 ; MIPS64R6O0-NEXT:    sw $3, 12($sp)
 ; MIPS64R6O0-NEXT:    lw $3, 12($sp)
 ; MIPS64R6O0-NEXT:    ld $1, %got_disp(x)($1)
-; MIPS64R6O0-NEXT:    lw $6, 8($sp) # 4-byte Folded Reload
 ; MIPS64R6O0-NEXT:  .LBB7_1: # %entry
 ; MIPS64R6O0-NEXT:    # =>This Inner Loop Header: Depth=1
-; MIPS64R6O0-NEXT:    ll $7, 0($1)
-; MIPS64R6O0-NEXT:    bnec $7, $2, .LBB7_3
+; MIPS64R6O0-NEXT:    ll $6, 0($1)
+; MIPS64R6O0-NEXT:    bnec $6, $2, .LBB7_3
 ; MIPS64R6O0-NEXT:  # %bb.2: # %entry
 ; MIPS64R6O0-NEXT:    # in Loop: Header=BB7_1 Depth=1
-; MIPS64R6O0-NEXT:    move $8, $3
-; MIPS64R6O0-NEXT:    sc $8, 0($1)
-; MIPS64R6O0-NEXT:    beqzc $8, .LBB7_1
+; MIPS64R6O0-NEXT:    move $7, $3
+; MIPS64R6O0-NEXT:    sc $7, 0($1)
+; MIPS64R6O0-NEXT:    beqzc $7, .LBB7_1
 ; MIPS64R6O0-NEXT:  .LBB7_3: # %entry
-; MIPS64R6O0-NEXT:    move $2, $7
-; MIPS64R6O0-NEXT:    sw $7, 8($sp) # 4-byte Folded Spill
-; MIPS64R6O0-NEXT:    sw $6, 4($sp) # 4-byte Folded Spill
+; MIPS64R6O0-NEXT:    move $2, $6
 ; MIPS64R6O0-NEXT:    daddiu $sp, $sp, 16
 ; MIPS64R6O0-NEXT:    jrc $ra
 ;
 ; MM32-LABEL: AtomicCmpSwap32:
 ; MM32:       # %bb.0: # %entry
 ; MM32-NEXT:    lui $2, %hi(_gp_disp)
 ; MM32-NEXT:    addiu $2, $2, %lo(_gp_disp)
 ; MM32-NEXT:    addiu $sp, $sp, -8

 ; MIPS32-NEXT:    sync
 ; MIPS32-NEXT:    jr $ra
 ; MIPS32-NEXT:    nop
 ;
 ; MIPS32O0-LABEL: zeroreg:
 ; MIPS32O0:       # %bb.0: # %entry
 ; MIPS32O0-NEXT:    lui $2, %hi(_gp_disp)
 ; MIPS32O0-NEXT:    addiu $2, $2, %lo(_gp_disp)
-; MIPS32O0-NEXT:    addiu $sp, $sp, -16
+; MIPS32O0-NEXT:    addiu $sp, $sp, -8
 ; MIPS32O0-NEXT:    addu $1, $2, $25
 ; MIPS32O0-NEXT:    sync
 ; MIPS32O0-NEXT:    lw $1, %got(a)($1)
 ; MIPS32O0-NEXT:    addiu $2, $zero, 0
 ; MIPS32O0-NEXT:    addiu $3, $zero, 1
-; MIPS32O0-NEXT:    lw $4, 12($sp) # 4-byte Folded Reload
-; MIPS32O0-NEXT:    move $5, $3
+; MIPS32O0-NEXT:    move $4, $3
 ; MIPS32O0-NEXT:  $BB17_1: # %entry
 ; MIPS32O0-NEXT:    # =>This Inner Loop Header: Depth=1
-; MIPS32O0-NEXT:    ll $6, 0($1)
-; MIPS32O0-NEXT:    bne $6, $5, $BB17_3
+; MIPS32O0-NEXT:    ll $5, 0($1)
+; MIPS32O0-NEXT:    bne $5, $4, $BB17_3
 ; MIPS32O0-NEXT:    nop
 ; MIPS32O0-NEXT:  # %bb.2: # %entry
 ; MIPS32O0-NEXT:    # in Loop: Header=BB17_1 Depth=1
-; MIPS32O0-NEXT:    move $7, $2
-; MIPS32O0-NEXT:    sc $7, 0($1)
-; MIPS32O0-NEXT:    beqz $7, $BB17_1
+; MIPS32O0-NEXT:    move $6, $2
+; MIPS32O0-NEXT:    sc $6, 0($1)
+; MIPS32O0-NEXT:    beqz $6, $BB17_1
 ; MIPS32O0-NEXT:    nop
 ; MIPS32O0-NEXT:  $BB17_3: # %entry
-; MIPS32O0-NEXT:    xor $1, $6, $3
+; MIPS32O0-NEXT:    xor $1, $5, $3
 ; MIPS32O0-NEXT:    sltiu $1, $1, 1
 ; MIPS32O0-NEXT:    sync
 ; MIPS32O0-NEXT:    addiu $2, $zero, 1
-; MIPS32O0-NEXT:    xor $2, $6, $2
+; MIPS32O0-NEXT:    xor $2, $5, $2
 ; MIPS32O0-NEXT:    sltiu $2, $2, 1
 ; MIPS32O0-NEXT:    andi $2, $2, 1
-; MIPS32O0-NEXT:    sw $6, 12($sp) # 4-byte Folded Spill
-; MIPS32O0-NEXT:    sw $4, 8($sp) # 4-byte Folded Spill
 ; MIPS32O0-NEXT:    sw $1, 4($sp) # 4-byte Folded Spill
-; MIPS32O0-NEXT:    addiu $sp, $sp, 16
+; MIPS32O0-NEXT:    addiu $sp, $sp, 8
 ; MIPS32O0-NEXT:    jr $ra
 ; MIPS32O0-NEXT:    nop
 ;
 ; MIPS32R2-LABEL: zeroreg:
 ; MIPS32R2:       # %bb.0: # %entry
 ; MIPS32R2-NEXT:    lui $2, %hi(_gp_disp)
 ; MIPS32R2-NEXT:    addiu $2, $2, %lo(_gp_disp)
 ; MIPS32R2-NEXT:    addu $1, $2, $25

 ; MIPS32R6-NEXT:    sltiu $2, $1, 1
 ; MIPS32R6-NEXT:    sync
 ; MIPS32R6-NEXT:    jrc $ra
 ;
 ; MIPS32R6O0-LABEL: zeroreg:
 ; MIPS32R6O0:       # %bb.0: # %entry
 ; MIPS32R6O0-NEXT:    lui $2, %hi(_gp_disp)
 ; MIPS32R6O0-NEXT:    addiu $2, $2, %lo(_gp_disp)
-; MIPS32R6O0-NEXT:    addiu $sp, $sp, -8
 ; MIPS32R6O0-NEXT:    addu $1, $2, $25
 ; MIPS32R6O0-NEXT:    sync
 ; MIPS32R6O0-NEXT:    lw $1, %got(a)($1)
 ; MIPS32R6O0-NEXT:    addiu $2, $zero, 0
 ; MIPS32R6O0-NEXT:    addiu $3, $zero, 1
-; MIPS32R6O0-NEXT:    lw $4, 4($sp) # 4-byte Folded Reload
-; MIPS32R6O0-NEXT:    move $5, $3
+; MIPS32R6O0-NEXT:    move $4, $3
 ; MIPS32R6O0-NEXT:  $BB17_1: # %entry
 ; MIPS32R6O0-NEXT:    # =>This Inner Loop Header: Depth=1
-; MIPS32R6O0-NEXT:    ll $6, 0($1)
-; MIPS32R6O0-NEXT:    bnec $6, $5, $BB17_3
+; MIPS32R6O0-NEXT:    ll $5, 0($1)
+; MIPS32R6O0-NEXT:    bnec $5, $4, $BB17_3
 ; MIPS32R6O0-NEXT:  # %bb.2: # %entry
 ; MIPS32R6O0-NEXT:    # in Loop: Header=BB17_1 Depth=1
-; MIPS32R6O0-NEXT:    move $7, $2
-; MIPS32R6O0-NEXT:    sc $7, 0($1)
-; MIPS32R6O0-NEXT:    beqzc $7, $BB17_1
+; MIPS32R6O0-NEXT:    move $6, $2
+; MIPS32R6O0-NEXT:    sc $6, 0($1)
+; MIPS32R6O0-NEXT:    beqzc $6, $BB17_1
 ; MIPS32R6O0-NEXT:  $BB17_3: # %entry
-; MIPS32R6O0-NEXT:    xor $1, $6, $3
+; MIPS32R6O0-NEXT:    xor $1, $5, $3
 ; MIPS32R6O0-NEXT:    sltiu $2, $1, 1
 ; MIPS32R6O0-NEXT:    sync
-; MIPS32R6O0-NEXT:    sw $6, 4($sp) # 4-byte Folded Spill
-; MIPS32R6O0-NEXT:    sw $4, 0($sp) # 4-byte Folded Spill
-; MIPS32R6O0-NEXT:    addiu $sp, $sp, 8
 ; MIPS32R6O0-NEXT:    jrc $ra
 ;
 ; MIPS4-LABEL: zeroreg:
 ; MIPS4:       # %bb.0: # %entry
 ; MIPS4-NEXT:    lui $1, %hi(%neg(%gp_rel(zeroreg)))
 ; MIPS4-NEXT:    daddu $1, $1, $25
 ; MIPS4-NEXT:    daddiu $1, $1, %lo(%neg(%gp_rel(zeroreg)))
 ; MIPS4-NEXT:    sync

 ; MIPS64R6-NEXT:  .LBB17_3: # %entry
 ; MIPS64R6-NEXT:    xor $1, $4, $3
 ; MIPS64R6-NEXT:    sltiu $2, $1, 1
 ; MIPS64R6-NEXT:    sync
 ; MIPS64R6-NEXT:    jrc $ra
 ;
 ; MIPS64R6O0-LABEL: zeroreg:
 ; MIPS64R6O0:       # %bb.0: # %entry
-; MIPS64R6O0-NEXT:    daddiu $sp, $sp, -16
 ; MIPS64R6O0-NEXT:    lui $1, %hi(%neg(%gp_rel(zeroreg)))
 ; MIPS64R6O0-NEXT:    daddu $1, $1, $25
 ; MIPS64R6O0-NEXT:    daddiu $1, $1, %lo(%neg(%gp_rel(zeroreg)))
 ; MIPS64R6O0-NEXT:    sync
 ; MIPS64R6O0-NEXT:    ld $1, %got_disp(a)($1)
 ; MIPS64R6O0-NEXT:    addiu $2, $zero, 0
 ; MIPS64R6O0-NEXT:    addiu $3, $zero, 1
-; MIPS64R6O0-NEXT:    lw $4, 12($sp) # 4-byte Folded Reload
-; MIPS64R6O0-NEXT:    move $5, $3
+; MIPS64R6O0-NEXT:    move $4, $3
 ; MIPS64R6O0-NEXT:  .LBB17_1: # %entry
 ; MIPS64R6O0-NEXT:    # =>This Inner Loop Header: Depth=1
-; MIPS64R6O0-NEXT:    ll $6, 0($1)
-; MIPS64R6O0-NEXT:    bnec $6, $5, .LBB17_3
+; MIPS64R6O0-NEXT:    ll $5, 0($1)
+; MIPS64R6O0-NEXT:    bnec $5, $4, .LBB17_3
 ; MIPS64R6O0-NEXT:  # %bb.2: # %entry
 ; MIPS64R6O0-NEXT:    # in Loop: Header=BB17_1 Depth=1
-; MIPS64R6O0-NEXT:    move $7, $2
-; MIPS64R6O0-NEXT:    sc $7, 0($1)
-; MIPS64R6O0-NEXT:    beqzc $7, .LBB17_1
+; MIPS64R6O0-NEXT:    move $6, $2
+; MIPS64R6O0-NEXT:    sc $6, 0($1)
+; MIPS64R6O0-NEXT:    beqzc $6, .LBB17_1
 ; MIPS64R6O0-NEXT:  .LBB17_3: # %entry
-; MIPS64R6O0-NEXT:    xor $2, $6, $3
+; MIPS64R6O0-NEXT:    xor $2, $5, $3
 ; MIPS64R6O0-NEXT:    sltiu $2, $2, 1
 ; MIPS64R6O0-NEXT:    sync
-; MIPS64R6O0-NEXT:    sw $6, 12($sp) # 4-byte Folded Spill
-; MIPS64R6O0-NEXT:    sw $4, 8($sp) # 4-byte Folded Spill
-; MIPS64R6O0-NEXT:    daddiu $sp, $sp, 16
 ; MIPS64R6O0-NEXT:    jrc $ra
 ;
 ; MM32-LABEL: zeroreg:
 ; MM32:       # %bb.0: # %entry
 ; MM32-NEXT:    lui $2, %hi(_gp_disp)
 ; MM32-NEXT:    addiu $2, $2, %lo(_gp_disp)
 ; MM32-NEXT:    addu $2, $2, $25
 ; MM32-NEXT:    sync

test/CodeGen/Mips/atomic64.ll

 ; MIPS64R6-NEXT:    beqzc $3, .LBB7_1
 ; MIPS64R6-NEXT:    nop
 ; MIPS64R6-NEXT:  .LBB7_3: # %entry
 ; MIPS64R6-NEXT:    jr $ra
 ; MIPS64R6-NEXT:    daddiu $sp, $sp, 16
 ;
 ; MIPS64R6O0-LABEL: AtomicCmpSwap64:
 ; MIPS64R6O0:       # %bb.0: # %entry
-; MIPS64R6O0-NEXT:    daddiu $sp, $sp, -48
+; MIPS64R6O0-NEXT:    daddiu $sp, $sp, -32
 ; MIPS64R6O0-NEXT:    lui $1, %hi(%neg(%gp_rel(AtomicCmpSwap64)))
 ; MIPS64R6O0-NEXT:    daddu $1, $1, $25
 ; MIPS64R6O0-NEXT:    daddiu $1, $1, %lo(%neg(%gp_rel(AtomicCmpSwap64)))
 ; MIPS64R6O0-NEXT:    move $2, $5
 ; MIPS64R6O0-NEXT:    move $3, $4
-; MIPS64R6O0-NEXT:    sd $5, 40($sp)
-; MIPS64R6O0-NEXT:    ld $5, 40($sp)
+; MIPS64R6O0-NEXT:    sd $5, 24($sp)
+; MIPS64R6O0-NEXT:    ld $5, 24($sp)
 ; MIPS64R6O0-NEXT:    ld $1, %got_disp(x)($1)
-; MIPS64R6O0-NEXT:    ld $6, 32($sp) # 8-byte Folded Reload
 ; MIPS64R6O0-NEXT:  .LBB7_1: # %entry
 ; MIPS64R6O0-NEXT:    # =>This Inner Loop Header: Depth=1
-; MIPS64R6O0-NEXT:    lld $7, 0($1)
-; MIPS64R6O0-NEXT:    bnec $7, $4, .LBB7_3
+; MIPS64R6O0-NEXT:    lld $6, 0($1)
+; MIPS64R6O0-NEXT:    bnec $6, $4, .LBB7_3
 ; MIPS64R6O0-NEXT:  # %bb.2: # %entry
 ; MIPS64R6O0-NEXT:    # in Loop: Header=BB7_1 Depth=1
-; MIPS64R6O0-NEXT:    move $8, $5
-; MIPS64R6O0-NEXT:    scd $8, 0($1)
-; MIPS64R6O0-NEXT:    beqzc $8, .LBB7_1
+; MIPS64R6O0-NEXT:    move $7, $5
+; MIPS64R6O0-NEXT:    scd $7, 0($1)
+; MIPS64R6O0-NEXT:    beqzc $7, .LBB7_1
 ; MIPS64R6O0-NEXT:  .LBB7_3: # %entry
-; MIPS64R6O0-NEXT:    sd $2, 24($sp) # 8-byte Folded Spill
-; MIPS64R6O0-NEXT:    move $2, $7
-; MIPS64R6O0-NEXT:    sd $3, 16($sp) # 8-byte Folded Spill
-; MIPS64R6O0-NEXT:    sd $7, 32($sp) # 8-byte Folded Spill
-; MIPS64R6O0-NEXT:    sd $6, 8($sp) # 8-byte Folded Spill
-; MIPS64R6O0-NEXT:    daddiu $sp, $sp, 48
+; MIPS64R6O0-NEXT:    sd $2, 16($sp) # 8-byte Folded Spill
+; MIPS64R6O0-NEXT:    move $2, $6
+; MIPS64R6O0-NEXT:    sd $3, 8($sp) # 8-byte Folded Spill
+; MIPS64R6O0-NEXT:    daddiu $sp, $sp, 32
 ; MIPS64R6O0-NEXT:    jrc $ra
 ;
 ; O1-LABEL: AtomicCmpSwap64:
 ; O1:       # %bb.0: # %entry
 ; O1-NEXT:    daddiu $sp, $sp, -16
 ; O1-NEXT:    lui $1, %hi(%neg(%gp_rel(AtomicCmpSwap64)))
 ; O1-NEXT:    daddu $1, $1, $25
 ; O1-NEXT:    daddiu $1, $1, %lo(%neg(%gp_rel(AtomicCmpSwap64)))

test/CodeGen/Mips/atomicCmpSwapPW.ll

 ; O32:       # %bb.0: # %entry
 ; O32-NEXT:    addiu $sp, $sp, -16
 ; O32-NEXT:    .cfi_def_cfa_offset 16
 ; O32-NEXT:    move $1, $5
 ; O32-NEXT:    move $2, $4
 ; O32-NEXT:    lui $3, %hi(sym)
 ; O32-NEXT:    lw $3, %lo(sym)($3)
 ; O32-NEXT:    sync
-; O32-NEXT:    lw $6, 12($sp) # 4-byte Folded Reload
 ; O32-NEXT:  $BB0_1: # %entry
 ; O32-NEXT:    # =>This Inner Loop Header: Depth=1
-; O32-NEXT:    ll $7, 0($3)
-; O32-NEXT:    bne $7, $4, $BB0_3
+; O32-NEXT:    ll $6, 0($3)
+; O32-NEXT:    bne $6, $4, $BB0_3
 ; O32-NEXT:    nop
 ; O32-NEXT:  # %bb.2: # %entry
 ; O32-NEXT:    # in Loop: Header=BB0_1 Depth=1
-; O32-NEXT:    move $8, $5
-; O32-NEXT:    sc $8, 0($3)
-; O32-NEXT:    beqz $8, $BB0_1
+; O32-NEXT:    move $7, $5
+; O32-NEXT:    sc $7, 0($3)
+; O32-NEXT:    beqz $7, $BB0_1
 ; O32-NEXT:    nop
 ; O32-NEXT:  $BB0_3: # %entry
 ; O32-NEXT:    sync
-; O32-NEXT:    sw $1, 8($sp) # 4-byte Folded Spill
-; O32-NEXT:    sw $2, 4($sp) # 4-byte Folded Spill
-; O32-NEXT:    sw $7, 12($sp) # 4-byte Folded Spill
-; O32-NEXT:    sw $6, 0($sp) # 4-byte Folded Spill
+; O32-NEXT:    sw $1, 12($sp) # 4-byte Folded Spill
+; O32-NEXT:    sw $2, 8($sp) # 4-byte Folded Spill
+; O32-NEXT:    sw $6, 4($sp) # 4-byte Folded Spill
 ; O32-NEXT:    addiu $sp, $sp, 16
 ; O32-NEXT:    jr $ra
 ; O32-NEXT:    nop
 ;
 ; N32-LABEL: foo:
 ; N32:       # %bb.0: # %entry
 ; N32-NEXT:    addiu $sp, $sp, -16
 ; N32-NEXT:    .cfi_def_cfa_offset 16
 ; N32-NEXT:    move $1, $5
 ; N32-NEXT:    sll $1, $1, 0
 ; N32-NEXT:    move $2, $4
 ; N32-NEXT:    sll $2, $2, 0
 ; N32-NEXT:    lui $3, %hi(sym)
 ; N32-NEXT:    lw $3, %lo(sym)($3)
 ; N32-NEXT:    sync
-; N32-NEXT:    lw $6, 12($sp) # 4-byte Folded Reload
 ; N32-NEXT:  .LBB0_1: # %entry
 ; N32-NEXT:    # =>This Inner Loop Header: Depth=1
-; N32-NEXT:    ll $7, 0($3)
-; N32-NEXT:    bne $7, $2, .LBB0_3
+; N32-NEXT:    ll $6, 0($3)
+; N32-NEXT:    bne $6, $2, .LBB0_3
 ; N32-NEXT:    nop
 ; N32-NEXT:  # %bb.2: # %entry
 ; N32-NEXT:    # in Loop: Header=BB0_1 Depth=1
-; N32-NEXT:    move $8, $1
-; N32-NEXT:    sc $8, 0($3)
-; N32-NEXT:    beqz $8, .LBB0_1
+; N32-NEXT:    move $7, $1
+; N32-NEXT:    sc $7, 0($3)
+; N32-NEXT:    beqz $7, .LBB0_1
 ; N32-NEXT:    nop
 ; N32-NEXT:  .LBB0_3: # %entry
 ; N32-NEXT:    sync
-; N32-NEXT:    sw $7, 12($sp) # 4-byte Folded Spill
-; N32-NEXT:    sw $6, 8($sp) # 4-byte Folded Spill
+; N32-NEXT:    sw $6, 12($sp) # 4-byte Folded Spill
 ; N32-NEXT:    addiu $sp, $sp, 16
 ; N32-NEXT:    jr $ra
 ; N32-NEXT:    nop
 ;
 ; N64-LABEL: foo:
 ; N64:       # %bb.0: # %entry
 ; N64-NEXT:    daddiu $sp, $sp, -16
 ; N64-NEXT:    .cfi_def_cfa_offset 16
 ; N64-NEXT:    move $1, $5
 ; N64-NEXT:    sll $1, $1, 0
 ; N64-NEXT:    move $2, $4
 ; N64-NEXT:    sll $2, $2, 0
 ; N64-NEXT:    lui $3, %highest(sym)
 ; N64-NEXT:    daddiu $3, $3, %higher(sym)
 ; N64-NEXT:    dsll $3, $3, 16
 ; N64-NEXT:    daddiu $3, $3, %hi(sym)
 ; N64-NEXT:    dsll $3, $3, 16
 ; N64-NEXT:    ld $3, %lo(sym)($3)
 ; N64-NEXT:    sync
-; N64-NEXT:    lw $6, 12($sp) # 4-byte Folded Reload
 ; N64-NEXT:  .LBB0_1: # %entry
 ; N64-NEXT:    # =>This Inner Loop Header: Depth=1
-; N64-NEXT:    ll $7, 0($3)
-; N64-NEXT:    bne $7, $2, .LBB0_3
+; N64-NEXT:    ll $6, 0($3)
+; N64-NEXT:    bne $6, $2, .LBB0_3
 ; N64-NEXT:    nop
 ; N64-NEXT:  # %bb.2: # %entry
 ; N64-NEXT:    # in Loop: Header=BB0_1 Depth=1
-; N64-NEXT:    move $8, $1
-; N64-NEXT:    sc $8, 0($3)
-; N64-NEXT:    beqz $8, .LBB0_1
+; N64-NEXT:    move $7, $1
+; N64-NEXT:    sc $7, 0($3)
+; N64-NEXT:    beqz $7, .LBB0_1
 ; N64-NEXT:    nop
 ; N64-NEXT:  .LBB0_3: # %entry
 ; N64-NEXT:    sync
-; N64-NEXT:    sw $7, 12($sp) # 4-byte Folded Spill
-; N64-NEXT:    sw $6, 8($sp) # 4-byte Folded Spill
+; N64-NEXT:    sw $6, 12($sp) # 4-byte Folded Spill
 ; N64-NEXT:    daddiu $sp, $sp, 16
 ; N64-NEXT:    jr $ra
 ; N64-NEXT:    nop
 entry:
   %0 = load i32 *, i32 ** @sym
   cmpxchg i32 * %0, i32 %new, i32 %old seq_cst seq_cst
   ret void
 }