[ARM][ParallelDSP] Disable for big-endian

[samparker]

Summary

Bail early when we don't have a preheader and also if the target is big endian because it's written with only little endian in mind!

[SjoerdMeijer]

Oops, also forgot about BE.
Looks like a sensible workaround to me.

llvm/trunk/lib/Target/ARM/ARMParallelDSP.cpp

bool runOnLoop(Loop *TheLoop, LPPassManager &) override {
       // This is not a fundamental restriction, but lifting this would just
       // require more work to do the transformation and then patch up the CFG.
       if (Header != TheLoop->getLoopLatch()) {
         LLVM_DEBUG(dbgs() << "The loop header is not the loop latch: not "
                              "running pass ARMParallelDSP\n");
         return false;
       }
 
+      // We need a preheader as getIncomingValueForBlock assumes there is one.
+      if (!TheLoop->getLoopPreheader()) {
+        LLVM_DEBUG(dbgs() << "No preheader found, bailing out\n");
+        return false;
+      }
+
       Function &F = *Header->getParent();
       M = F.getParent();
       DL = &M->getDataLayout();
 
       auto &TM = TPC.getTM<TargetMachine>();
       auto *ST = &TM.getSubtarget<ARMSubtarget>(F);
 
       if (!ST->allowsUnalignedMem()) {
         LLVM_DEBUG(dbgs() << "Unaligned memory access not supported: not "
                              "running pass ARMParallelDSP\n");
         return false;
       }
 
       if (!ST->hasDSP()) {
         LLVM_DEBUG(dbgs() << "DSP extension not enabled: not running pass "
                              "ARMParallelDSP\n");
         return false;
       }
 
+      if (!ST->isLittle()) {
+        LLVM_DEBUG(dbgs() << "Only supporting little endian: not running pass "
+                             "ARMParallelDSP\n");
+        return false;
+      }
+
       LoopAccessInfo LAI(L, SE, TLI, AA, DT, LI);
 
       LLVM_DEBUG(dbgs() << "\n== Parallel DSP pass ==\n");
       LLVM_DEBUG(dbgs() << " - " << F.getName() << "\n\n");
 
       if (!RecordSequentialLoads(Header)) {
         LLVM_DEBUG(dbgs() << " - No sequential loads found.\n");
         return false;

 
 static void MatchReductions(Function &F, Loop *TheLoop, BasicBlock *Header,
                             ReductionList &Reductions) {
   RecurrenceDescriptor RecDesc;
   const bool HasFnNoNaNAttr =
     F.getFnAttribute("no-nans-fp-math").getValueAsString() == "true";
   const BasicBlock *Latch = TheLoop->getLoopLatch();
 
-  // We need a preheader as getIncomingValueForBlock assumes there is one.
-  if (!TheLoop->getLoopPreheader()) {
-    LLVM_DEBUG(dbgs() << "No preheader found, bailing out\n");
-    return;
-  }
-
   for (PHINode &Phi : Header->phis()) {
     const auto *Ty = Phi.getType();
     if (!Ty->isIntegerTy(32) && !Ty->isIntegerTy(64))
       continue;
 
     const bool IsReduction =
       RecurrenceDescriptor::AddReductionVar(&Phi,
                                             RecurrenceDescriptor::RK_IntegerAdd,

llvm/trunk/test/CodeGen/ARM/ParallelDSP/multi-use-loads.ll

 ; RUN: llc -O3 -mtriple=arm-arm-eabi -mcpu=cortex-m33 < %s | FileCheck %s
+; RUN: llc -O3 -mtriple=armeb-arm-eabi -mcpu=cortex-m33 < %s | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
+
+; CHECK-UNSUPPORTED-NOT: smlad
 
 ; CHECK-LABEL: add_user
 ; CHECK: %for.body
 ; CHECK: ldr [[A:r[0-9]+]],{{.*}}, #2]!
 ; CHECK: ldr [[B:r[0-9]+]],{{.*}}, #2]!
 ; CHECK: smlad [[ACC:r[0-9]+]], [[B]], [[A]], [[ACC]]
 ; CHECK: sxtah [[COUNT:r[0-9]+]], [[COUNT]], [[A]]
 define i32 @add_user(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {

llvm/trunk/test/CodeGen/ARM/ParallelDSP/smlad0.ll

 ; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m33 < %s -arm-parallel-dsp -S | FileCheck %s
+; RUN: opt -mtriple=armeb-arm-eabi -mcpu=cortex-m0 < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
 ;
 ; The Cortex-M0 does not support unaligned accesses:
 ; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m0 < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
 ;
 ; Check DSP extension:
 ; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m33 -mattr=-dsp < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
 
 define dso_local i32 @OneReduction(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {

llvm/trunk/test/CodeGen/ARM/ParallelDSP/smladx-1.ll

 ; RUN: opt -mtriple=thumbv8m.main -mcpu=cortex-m33 -arm-parallel-dsp %s -S -o - | FileCheck %s
 ; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m0 < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
 ; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m33 -mattr=-dsp < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
+; RUN: opt -mtriple=armeb-arm-eabi -mcpu=cortex-m33 < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
 
 define i32 @smladx(i16* nocapture readonly %pIn1, i16* nocapture readonly %pIn2, i32 %j, i32 %limit) {
 
 ; CHECK-LABEL: smladx
 ; CHECK: = phi i32 [ 0, %for.body.preheader.new ],
 ; CHECK: [[ACC0:%[^ ]+]] = phi i32 [ 0, %for.body.preheader.new ], [ [[ACC2:%[^ ]+]], %for.body ]
 ; CHECK: [[PIN23:%[^ ]+]] = bitcast i16* %pIn2.3 to i32*
 ; CHECK: [[IN23:%[^ ]+]] = load i32, i32* [[PIN23]], align 2

llvm/trunk/test/CodeGen/ARM/ParallelDSP/smlald0.ll

 ; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m33 < %s -arm-parallel-dsp -S | FileCheck %s
+; RUN: opt -mtriple=armeb-arm-eabi -mcpu=cortex-m33 < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
 ;
 ; The Cortex-M0 does not support unaligned accesses:
 ; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m0 < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
 ;
 ; Check DSP extension:
 ; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m33 -mattr=-dsp < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
 
 define dso_local i64 @OneReduction(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {

llvm/trunk/test/CodeGen/ARM/ParallelDSP/unroll-n-jam-smlad.ll

 ; RUN: llc -O3 -mtriple=thumbv7em %s -o - | FileCheck %s
+; RUN: llc -O3 -mtriple=thumbv7eb %s -o - | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
 ; RUN: llc -O3 -mtriple=thumbv8m.main -mattr=+dsp %s -o - | FileCheck %s
 
+; CHECK-UNSUPPORTED-LABEL: unroll_n_jam_smlad
+; CHECK-UNSUPPORTED-NOT: smlad r{{.}}
+
 ; Test that the duplicate loads are removed, which allows parallel dsp to find
 ; the parallel operations.
 
+; CHECK-LABEL: unroll_n_jam_smlad
 define void @unroll_n_jam_smlad(i32* %res, i16* %A, i16* %B, i32 %N, i32 %idx) {
 entry:
   %xtraiter306.i = and i32 %N, 3
   %unroll_iter310.i = sub i32 %N, %xtraiter306.i
   %arrayidx.us.i117.i = getelementptr inbounds i32, i32* %res, i32 %idx
   store i32 0, i32* %arrayidx.us.i117.i, align 4
   %mul.us.i118.i = mul i32 %idx, %N
   %inc11.us.i.i = or i32 %idx, 1