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[X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them.
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Authored by craig.topper on Feb 2 2019, 1:36 PM.

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Summary

We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly.

This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that.

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rL LLVM

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craig.topper created this revision.Feb 2 2019, 1:36 PM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 2 2019, 1:36 PM
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rnk accepted this revision.Feb 4 2019, 3:15 PM

lgtm

lib/Target/X86/X86ISelLowering.cpp
42961 ↗(On Diff #184916)

Comment is stale.

This revision is now accepted and ready to land.Feb 4 2019, 3:15 PM

Fix stale comment