[MSP430] Minor fixes/improvements for assembler/disassembler

[krisb]

Summary

• Teach AsmParser to recognize @rn in distination operand as 0(rn).
• Do not allow Disassembler decoding instructions that have size more than a number of input bytes.
• Fix UB in MSP430MCCodeEmitter.

lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp

case AsmToken::At: {
       SMLoc RegStartLoc, EndLoc;
       if (ParseRegister(RegNo, RegStartLoc, EndLoc))
         return true;
       if (getLexer().getKind() == AsmToken::Plus) {
         Operands.push_back(MSP430Operand::CreatePostIndReg(RegNo, StartLoc, EndLoc));
         getLexer().Lex(); // Eat '+'
         return false;
       }
+      if (Operands.size() > 1) // Emulate @rd in destination position as 0(rd)
+        Operands.push_back(MSP430Operand::CreateMem(RegNo,
+            MCConstantExpr::create(0, getContext()), StartLoc, EndLoc));
+      else
         Operands.push_back(MSP430Operand::CreateIndReg(RegNo, StartLoc, EndLoc));
       return false;
     }
     case AsmToken::Hash:
       // Try #constexpr
       SMLoc StartLoc = getParser().getTok().getLoc();
       getLexer().Lex(); // Eat '#'
       const MCExpr *Val;
       if (!getParser().parseExpression(Val)) {

lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp

DecodeStatus MSP430Disassembler::getInstructionI(MCInst &MI, uint64_t &Size,
   }
 
   unsigned Words = 1;
   switch (SrcAM) {
   case amIndexed:
   case amSymbolic:
   case amImmediate:
   case amAbsolute:
+    if (Bytes.size() < (Words + 1) * 2) {
+      Size = 2;
+      return DecodeStatus::Fail;
+    }
     Insn |= (uint64_t)support::endian::read16le(Bytes.data() + 2) << 16;
     ++Words;
     break;
   default:
     break;
   }
   switch (DstAM) {
   case amIndexed:
   case amSymbolic:
   case amAbsolute:
+    if (Bytes.size() < (Words + 1) * 2) {
+      Size = 2;
+      return DecodeStatus::Fail;
+    }
     Insn |= (uint64_t)support::endian::read16le(Bytes.data() + Words * 2)
         << (Words * 16);
     ++Words;
     break;
   default:
     break;
   }
 
DecodeStatus MSP430Disassembler::getInstructionII(MCInst &MI, uint64_t &Size,
   }
 
   unsigned Words = 1;
   switch (SrcAM) {
   case amIndexed:
   case amSymbolic:
   case amImmediate:
   case amAbsolute:
+    if (Bytes.size() < (Words + 1) * 2) {
+      Size = 2;
+      return DecodeStatus::Fail;
+    }
     Insn |= (uint64_t)support::endian::read16le(Bytes.data() + 2) << 16;
     ++Words;
     break;
   default:
     break;
   }
 
   const uint8_t *DecoderTable = Words == 2 ? DecoderTable32 : DecoderTable16;

lib/Target/MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp

unsigned MSP430MCCodeEmitter::getMemOpValue(const MCInst &MI, unsigned Op,
                                             const MCSubtargetInfo &STI) const {
   const MCOperand &MO1 = MI.getOperand(Op);
   assert(MO1.isReg() && "Register operand expected");
   unsigned Reg = Ctx.getRegisterInfo()->getEncodingValue(MO1.getReg());
 
   const MCOperand &MO2 = MI.getOperand(Op + 1);
   if (MO2.isImm()) {
     Offset += 2;
-    return (MO2.getImm() << 4) | Reg;
+    return ((unsigned)MO2.getImm() << 4) | Reg;
   }
 
   assert(MO2.isExpr() && "Expr operand expected");
   MSP430::Fixups FixupKind;
   switch (Reg) {
   case 0:
     FixupKind = MSP430::fixup_16_pcrel_byte;
     break;

test/MC/Disassembler/MSP430/unknown.txt

+# RUN: not llvm-mc -disassemble -triple=msp430 %s 2>&1 | FileCheck %s
+
+# This should not decode as 'and.b @r15+, (0)r1' [0xf1,0xff,0x00,0x00]
+[0xf1 0xff]
+# CHECK: warning: invalid instruction encoding
+
+# This should not decode as 'add 6(r7), 6(r5)' [0x95 0x57 0x06 0x00 0x06 0x00]
+[0x95 0x57 0x06 0x00]
+# CHECK: warning: invalid instruction encoding
+
+# This should not decode as 'call 6(r7)' [0x97 0x12 0x06 0x00]
+[0x97 0x12]
+# CHECK: warning: invalid instruction encoding

test/MC/MSP430/addrmode.s

 ; CHECK: mov @r8, r15          ; encoding: [0x2f,0x48]
 ; CHECK: mov @r8+, r15         ; encoding: [0x3f,0x48]
 ; CHECK: mov #disp+2, r15      ; encoding: [0x3f,0x40,A,A]
 
   mov #42, r15
   mov #42, 12(r15)
   mov #42, &disp
   mov disp, disp+2
+  mov r7, @r15
 
 ; CHECK: mov #42, r15          ; encoding: [0x3f,0x40,0x2a,0x00]
 ; CHECK: mov #42, 12(r15)      ; encoding: [0xbf,0x40,0x2a,0x00,0x0c,0x00]
 ; CHECK: mov #42, &disp        ; encoding: [0xb2,0x40,0x2a,0x00,A,A]
 ; CHECK: mov disp, disp+2      ; encoding: [0x90,0x40,A,A,B,B]
+; CHECK: mov r7, 0(r15)        ; encoding: [0x8f,0x47,0x00,0x00]
 
   add r7, r8
   add 6(r7), r8
   add &disp, r8
   add disp, r8
   add @r9, r8
   add @r9+, r8
   add #42, r8

test/MC/MSP430/invalid.s

 ; RUN: not llvm-mc -triple msp430 < %s 2>&1 | FileCheck %s
 foo:
   ;; invalid operand count
   mov    r7        ; CHECK: :[[@LINE]]:3: error: too few operands for instruction
 
   ;; invalid destination addressing modes
-  mov    r7, @r15  ; CHECK: :[[@LINE]]:14: error: invalid operand for instruction
   mov    r7, @r15+ ; CHECK: :[[@LINE]]:14: error: invalid operand for instruction
   mov    r7, #0    ; CHECK: :[[@LINE]]:14: error: invalid operand for instruction
   mov    r7, #123  ; CHECK: :[[@LINE]]:14: error: invalid operand for instruction
 
   ;; invalid byte instructions
   swpb.b r7        ; CHECK: :[[@LINE]]:3: error: invalid instruction mnemonic
   sxt.b  r7        ; CHECK: :[[@LINE]]:3: error: invalid instruction mnemonic
   call.b r7        ; CHECK: :[[@LINE]]:3: error: invalid instruction mnemonic
 
   ;; invalid conditional jump offsets
   jmp    -513      ; CHECK: :[[@LINE]]:10: error: invalid jump offset
   jmp    512       ; CHECK: :[[@LINE]]:10: error: invalid jump offset