Test case for patches D52002 and D52707

[ayonam]

Summary

This is a test case for the patches D52002 and D52707. The test case is for widening a switch instruction when the maximum value of a switch expression can be computed statically and at least 70% of those values have been given as switch cases. In that case widening the switch to include all the possible values and redirecting the newly added values to the default block causes a 3% improvement in performance due to the elimination of the conditional branch at the top of the switch to check for the default values.

[hans]

This is a step in the right direction, but I think it should be possible to come up with a more simple hand-written test.

[ayonam]

This test case has been subsumed in D52707

test/Transforms/SimplifyCFG/switch-widen.ll

+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt %s -S -simplifycfg | FileCheck %s
+@x = external dso_local local_unnamed_addr global i32, align 4
+@y = external dso_local local_unnamed_addr global i32, align 4
+@z = external dso_local local_unnamed_addr global i32, align 4
+
+; Function Attrs: norecurse nounwind writeonly
+define dso_local i32 @foo(i32) local_unnamed_addr #0 {
+; CHECK-LABEL: @foo(
+; CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP0:%.*]] to i4
+; CHECK-NEXT:    switch i4 [[TMP2]], label [[SWITCH_UNREACHABLE_DEFAULT:%.*]] [
+; CHECK-NEXT:    i4 0, label [[TMP3:%.*]]
+; CHECK-NEXT:    i4 -4, label [[TMP4:%.*]]
+; CHECK-NEXT:    i4 2, label [[TMP5:%.*]]
+; CHECK-NEXT:    i4 3, label [[TMP6:%.*]]
+; CHECK-NEXT:    i4 -2, label [[TMP7:%.*]]
+; CHECK-NEXT:    i4 -1, label [[TMP8:%.*]]
+; CHECK-NEXT:    i4 6, label [[TMP9:%.*]]
+; CHECK-NEXT:    i4 7, label [[TMP10:%.*]]
+; CHECK-NEXT:    i4 -8, label [[TMP11:%.*]]
+; CHECK-NEXT:    i4 -7, label [[TMP12:%.*]]
+; CHECK-NEXT:    i4 -6, label [[TMP13:%.*]]
+; CHECK-NEXT:    i4 -5, label [[TMP14:%.*]]
+; CHECK-NEXT:    i4 -3, label [[TMP15:%.*]]
+; CHECK-NEXT:    i4 5, label [[TMP15]]
+; CHECK-NEXT:    i4 4, label [[TMP15]]
+; CHECK-NEXT:    i4 1, label [[TMP15]]
+; CHECK-NEXT:    ]
+; CHECK:         store i32 425, i32* @x, align 4, !tbaa !0
+; CHECK-NEXT:    br label [[TMP16:%.*]]
+; CHECK:         store i32 457, i32* @y, align 4, !tbaa !0
+; CHECK-NEXT:    br label [[TMP16]]
+; CHECK:         store i32 65456, i32* @z, align 4, !tbaa !0
+; CHECK-NEXT:    br label [[TMP16]]
+; CHECK:         store i32 57, i32* @y, align 4, !tbaa !0
+; CHECK-NEXT:    store i32 25, i32* @x, align 4, !tbaa !0
+; CHECK-NEXT:    br label [[TMP16]]
+; CHECK:         store i32 5456, i32* @z, align 4, !tbaa !0
+; CHECK-NEXT:    store i32 45, i32* @x, align 4, !tbaa !0
+; CHECK-NEXT:    br label [[TMP16]]
+; CHECK:         store i32 42, i32* @x, align 4, !tbaa !0
+; CHECK-NEXT:    br label [[TMP16]]
+; CHECK:         store i32 47, i32* @y, align 4, !tbaa !0
+; CHECK-NEXT:    br label [[TMP16]]
+; CHECK:         store i32 6556, i32* @z, align 4, !tbaa !0
+; CHECK-NEXT:    br label [[TMP16]]
+; CHECK:         store i32 1425, i32* @x, align 4, !tbaa !0
+; CHECK-NEXT:    store i32 6546, i32* @z, align 4, !tbaa !0
+; CHECK-NEXT:    br label [[TMP16]]
+; CHECK:         store i32 1457, i32* @y, align 4, !tbaa !0
+; CHECK-NEXT:    store i32 6545, i32* @z, align 4, !tbaa !0
+; CHECK-NEXT:    br label [[TMP16]]
+; CHECK:         store i32 6456, i32* @z, align 4, !tbaa !0
+; CHECK-NEXT:    store i32 2457, i32* @y, align 4, !tbaa !0
+; CHECK-NEXT:    br label [[TMP16]]
+; CHECK:         store i32 5425, i32* @x, align 4, !tbaa !0
+; CHECK-NEXT:    br label [[TMP16]]
+; CHECK:         store i32 3409, i32* @z, align 4, !tbaa !0
+; CHECK-NEXT:    store i32 3409, i32* @x, align 4, !tbaa !0
+; CHECK-NEXT:    br label [[TMP16]]
+; CHECK:         [[TMP17:%.*]] = phi i32 [ 567, [[TMP15]] ], [ 54325, [[TMP14]] ], [ 44325, [[TMP13]] ], [ 34325, [[TMP12]] ], [ 24325, [[TMP11]] ], [ 14325, [[TMP10]] ], [ 4, [[TMP9]] ], [ 43, [[TMP8]] ], [ 432, [[TMP7]] ], [ 5, [[TMP6]] ], [ 25, [[TMP5]] ], [ 325, [[TMP4]] ], [ 4325, [[TMP3]] ]
+; CHECK-NEXT:    ret i32 [[TMP17]]
+; CHECK:       switch.unreachable.default:
+; CHECK-NEXT:    unreachable
+;
+  %2 = trunc i32 %0 to i4
+  switch i4 %2, label %15 [
+  i4 0, label %3
+  i4 -4, label %4
+  i4 2, label %5
+  i4 3, label %6
+  i4 -2, label %7
+  i4 -1, label %8
+  i4 6, label %9
+  i4 7, label %10
+  i4 -8, label %11
+  i4 -7, label %12
+  i4 -6, label %13
+  i4 -5, label %14
+  ]
+
+; <label>:3:                                      ; preds = %1
+  store i32 425, i32* @x, align 4, !tbaa !2
+  br label %16
+
+; <label>:4:                                      ; preds = %1
+  store i32 457, i32* @y, align 4, !tbaa !2
+  br label %16
+
+; <label>:5:                                      ; preds = %1
+  store i32 65456, i32* @z, align 4, !tbaa !2
+  br label %16
+
+; <label>:6:                                      ; preds = %1
+  store i32 57, i32* @y, align 4, !tbaa !2
+  store i32 25, i32* @x, align 4, !tbaa !2
+  br label %16
+
+; <label>:7:                                      ; preds = %1
+  store i32 5456, i32* @z, align 4, !tbaa !2
+  store i32 45, i32* @x, align 4, !tbaa !2
+  br label %16
+
+; <label>:8:                                      ; preds = %1
+  store i32 42, i32* @x, align 4, !tbaa !2
+  br label %16
+
+; <label>:9:                                      ; preds = %1
+  store i32 47, i32* @y, align 4, !tbaa !2
+  br label %16
+
+; <label>:10:                                     ; preds = %1
+  store i32 6556, i32* @z, align 4, !tbaa !2
+  br label %16
+
+; <label>:11:                                     ; preds = %1
+  store i32 1425, i32* @x, align 4, !tbaa !2
+  store i32 6546, i32* @z, align 4, !tbaa !2
+  br label %16
+
+; <label>:12:                                     ; preds = %1
+  store i32 1457, i32* @y, align 4, !tbaa !2
+  store i32 6545, i32* @z, align 4, !tbaa !2
+  br label %16
+
+; <label>:13:                                     ; preds = %1
+  store i32 6456, i32* @z, align 4, !tbaa !2
+  store i32 2457, i32* @y, align 4, !tbaa !2
+  br label %16
+
+; <label>:14:                                     ; preds = %1
+  store i32 5425, i32* @x, align 4, !tbaa !2
+  br label %16
+
+; <label>:15:                                     ; preds = %1
+  store i32 3409, i32* @z, align 4, !tbaa !2
+  store i32 3409, i32* @x, align 4, !tbaa !2
+  br label %16
+
+; <label>:16:                                     ; preds = %15, %14, %13, %12, %11, %10, %9, %8, %7, %6, %5, %4, %3
+  %17 = phi i32 [ 567, %15 ], [ 54325, %14 ], [ 44325, %13 ], [ 34325, %12 ], [ 24325, %11 ], [ 14325, %10 ], [ 4, %9 ], [ 43, %8 ], [ 432, %7 ], [ 5, %6 ], [ 25, %5 ], [ 325, %4 ], [ 4325, %3 ]
+  ret i32 %17
+}
+
+!2 = !{!3, !3, i64 0}
+!3 = !{!"int", !4, i64 0}
+!4 = !{!"omnipotent char", !5, i64 0}
+!5 = !{!"Simple C/C++ TBAA"}