Do not insert prefetches with unsupported memory operands.

[mtrofin]

Summary

Ignore advices where the memory operand of the 'anchor' instruction
uses unsupported register types.

[mtrofin]

• More precise verification that the recommendation isn't inserted.

[mtrofin]

• Remove unnecessary space.

lib/Target/X86/X86InsertPrefetch.cpp

ErrorOr<PrefetchHints> getPrefetchHints(const FunctionSamples *TopSamples,
                                         const MachineInstr &MI) {
   if (const auto &Loc = MI.getDebugLoc())
     if (const auto *Samples = TopSamples->findFunctionSamples(Loc))
       return Samples->findCallTargetMapAt(FunctionSamples::getOffset(Loc),
                                           Loc->getBaseDiscriminator());
   return std::error_code();
 }
 
+// The prefetch instruction can't take memory operands involving vector
+// registers.
+bool IsMemOpCompatibleWithPrefetch(const MachineInstr &MI, int Op) {
+  unsigned BaseReg = MI.getOperand(Op + X86::AddrBaseReg).getReg();
+  unsigned IndexReg = MI.getOperand(Op + X86::AddrIndexReg).getReg();
+  return (BaseReg == 0 ||
+          X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg) ||
+          X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg)) &&
+         (IndexReg == 0 ||
+          X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg) ||
+          X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg));
+}
+
 } // end anonymous namespace
 
 //===----------------------------------------------------------------------===//
 //            Implementation
 //===----------------------------------------------------------------------===//
 
 char X86InsertPrefetch::ID = 0;
 
bool X86InsertPrefetch::runOnMachineFunction(MachineFunction &MF) {
   for (auto &MBB : MF) {
     for (auto MI = MBB.instr_begin(); MI != MBB.instr_end();) {
       auto Current = MI;
       ++MI;
 
       int Offset = X86II::getMemoryOperandNo(Current->getDesc().TSFlags);
       if (Offset < 0)
         continue;
+      unsigned Bias = X86II::getOperandBias(Current->getDesc());
+      int MemOpOffset = Offset + Bias;
+      // FIXME(mtrofin): ORE message when the recommendation cannot be taken.
+      if (!IsMemOpCompatibleWithPrefetch(*Current, MemOpOffset))
+        continue;
       Prefetches.clear();
       if (!findPrefetchInfo(Samples, *Current, Prefetches))
         continue;
       assert(!Prefetches.empty() &&
              "The Prefetches vector should contain at least a value if "
              "findPrefetchInfo returned true.");
       for (auto &PrefInfo : Prefetches) {
         unsigned PFetchInstrID = PrefInfo.InstructionID;
         int64_t Delta = PrefInfo.Delta;
         const MCInstrDesc &Desc = TII->get(PFetchInstrID);
         MachineInstr *PFetch =
             MF.CreateMachineInstr(Desc, Current->getDebugLoc(), true);
         MachineInstrBuilder MIB(MF, PFetch);
-        unsigned Bias = X86II::getOperandBias(Current->getDesc());
-        int MemOpOffset = Offset + Bias;
 
         assert(X86::AddrBaseReg == 0 && X86::AddrScaleAmt == 1 &&
                X86::AddrIndexReg == 2 && X86::AddrDisp == 3 &&
                X86::AddrSegmentReg == 4 &&
                "Unexpected change in X86 operand offset order.");
 
         // This assumes X86::AddBaseReg = 0, {...}ScaleAmt = 1, etc.
         // FIXME(mtrofin): consider adding a:

test/CodeGen/X86/insert-prefetch-invalid-instr.afdo

 main:0:0
  6: 0 __prefetch_nta_0:42
 No newline at end of file

test/CodeGen/X86/insert-prefetch-invalid-instr.ll

-; RUN: llc < %s -prefetch-hints-file=%S/insert-prefetch-nomemop.afdo | FileCheck %s
+; RUN: llc < %s -prefetch-hints-file=%S/insert-prefetch-invalid-instr.afdo | FileCheck %s
 ; ModuleID = 'prefetch.cc'
 source_filename = "prefetch.cc"
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 ; Function Attrs: norecurse nounwind uwtable
 define dso_local i32 @main() local_unnamed_addr #0 !dbg !7 {
 entry:

 !8 = !DISubroutineType(types: !2)
 !9 = !DILocation(line: 12, column: 3, scope: !7)
 !10 = !DILocation(line: 14, column: 3, scope: !7)
 !11 = !DILocation(line: 15, column: 3, scope: !7)
 
 ;CHECK-LABEL: main:
 ;CHECK:       # %bb.0:
 ;CHECK:       prefetchnta 291
-;CHECK:       prefetchnta 42(%rax,%ymm0)
+;CHECK:       .loc    1 14 3
 ;CHECK-NEXT:  vgatherpf1dpd (%rax,%ymm0) {%k1}