[PowerPC] [Clang] [AltiVec] The second parameter of vec_sr function should be modulo the number of bits in the element
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Authored by wuzish on Sun, Nov 4, 7:05 PM.

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Summary

The second parameter of vec_sr function is representing shift bits and it should be modulo the number of bits in the element like what vec_sl does now. This is actually required by the ABI:

Each element of the result vector is the result of logically right shifting the corresponding
element of ARG1 by the number of bits specified by the value of the corresponding
element of ARG2, modulo the number of bits in the element. The bits that are shifted out
are replaced by zeros.

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rL LLVM
wuzish created this revision.Sun, Nov 4, 7:05 PM
nemanjai accepted this revision.Thu, Nov 8, 8:26 AM

Just for clarification (and please add the text to the commit message), this is actually required by the ABI:

Each element of the result vector is the result of logically right shifting the corresponding
element of ARG1 by the number of bits specified by the value of the corresponding
element of ARG2, modulo the number of bits in the element. The bits that are shifted out
are replaced by zeros.
This revision is now accepted and ready to land.Thu, Nov 8, 8:26 AM
wuzish edited the summary of this revision. (Show Details)Thu, Nov 8, 7:19 PM
This revision was automatically updated to reflect the committed changes.
This revision was automatically updated to reflect the committed changes.