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AArch64/TargetTransformInfo: Report div/rem constant immediate costs as TCC_Free
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Authored by MatzeB on Oct 11 2018, 3:17 PM.

Details

Summary

DIV/REM instructions with constant operands are replaced by a series of
muls/shifts/etc. with different constants. Unfortunately the
ConstantHoisting pass runs too early to catch this expansion and will
operate on immediate that will get changed later. Report these
operations as TCC_Free so ConstantHoisting will not touch them.

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Repository
rL LLVM

Event Timeline

MatzeB created this revision.Oct 11 2018, 3:17 PM
  • This is not inspired by some benchmark, but from me needing stable tests in an upcoming change making DAGCombiner slightly less aggressive with OpaqueConstants. It does however seem like the right thing to do in general.
  • The same transformation was done for ARM in rL266464, arguing that no effect could be measured in some unspecified benchmark on aarch64.
  • With this home-made microbenchmark, I do measure more than 5x perf improvement:
#include <stdint.h>

#define SIZE 100000

void __attribute__((noinline)) divfoo(int64_t *signed_arr, uint64_t *unsigned_arr) {
    for (unsigned i = 0; i < SIZE; ++i) {
        signed_arr[i] /= 0xcafebabe5;
        unsigned_arr[i] /= 0xcafebabe5;
    }
}

int main(void) {
    static int64_t signed_arr[SIZE];
    static uint64_t unsigned_arr[SIZE];
    for (unsigned i = 0; i < 1000; ++i)
        divfoo(signed_arr, unsigned_arr);
}