Scalable type size queries (clang)

[huntergr]

Summary

Initial changes for clang to use the scalable type size queries (https://reviews.llvm.org/D53137)

This isn't ready for inclusion yet, more discussion on the mailing list required.

[huntergr]

Abandoning this. At the devmeeting it was agreed that 'getPrimitiveSizeInBits' should continue to work as-is for fixed-length vectors and only behave differently for scalable vectors.

lib/CodeGen/CGBuiltin.cpp

static Value *EmitCommonNeonSISDBuiltinExpr(CodeGenFunction &CGF,
   llvm::Type *ArgTy = CGF.ConvertType(Arg->getType());
   Function *F = CGF.LookupNeonLLVMIntrinsic(Int, Modifier, ArgTy, E);
 
   int j = 0;
   ConstantInt *C0 = ConstantInt::get(CGF.SizeTy, 0);
   for (Function::const_arg_iterator ai = F->arg_begin(), ae = F->arg_end();
        ai != ae; ++ai, ++j) {
     llvm::Type *ArgTy = ai->getType();
-    if (Ops[j]->getType()->getPrimitiveSizeInBits() ==
-             ArgTy->getPrimitiveSizeInBits())
+    if (Ops[j]->getType()->getScalableSizeInBits() ==
+             ArgTy->getScalableSizeInBits())
       continue;
 
     assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy());
     // The constant argument to an _n_ intrinsic always has Int32Ty, so truncate
     // it before inserting.
     Ops[j] =
         CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType());
     Ops[j] =
         CGF.Builder.CreateInsertElement(UndefValue::get(ArgTy), Ops[j], C0);
   }
 
   Value *Result = CGF.EmitNeonCall(F, Ops, s);
   llvm::Type *ResultType = CGF.ConvertType(E->getType());
-  if (ResultType->getPrimitiveSizeInBits() <
-      Result->getType()->getPrimitiveSizeInBits())
+  if (ResultType->getScalableSizeInBits() <
+      Result->getType()->getScalableSizeInBits())
     return CGF.Builder.CreateExtractElement(Result, C0);
 
   return CGF.Builder.CreateBitCast(Result, ResultType, s);
 }
 
 Value *CodeGenFunction::EmitCommonNeonBuiltinExpr(
     unsigned BuiltinID, unsigned LLVMIntrinsic, unsigned AltLLVMIntrinsic,
     const char *NameHint, unsigned Modifier, const CallExpr *E,
for (unsigned vi = 0; vi != 2; ++vi) {
       SV = Builder.CreateShuffleVector(Ops[1], Ops[2], Indices, "vzip");
       SV = Builder.CreateDefaultAlignedStore(SV, Addr);
     }
     return SV;
   }
   case NEON::BI__builtin_neon_vdot_v:
   case NEON::BI__builtin_neon_vdotq_v: {
     llvm::Type *InputTy =
-        llvm::VectorType::get(Int8Ty, Ty->getPrimitiveSizeInBits() / 8);
+        llvm::VectorType::get(Int8Ty, Ty->getScalableSizeInBits().Unscaled / 8);
     llvm::Type *Tys[2] = { Ty, InputTy };
     Int = Usgn ? LLVMIntrinsic : AltLLVMIntrinsic;
     return EmitNeonCall(CGM.getIntrinsic(Int, Tys), Ops, "vdot");
   }
   }
 
   assert(Int && "Expected valid intrinsic number");
 
Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
   }
   case NEON::BI__builtin_neon_vcvts_u32_f32:
   case NEON::BI__builtin_neon_vcvtd_u64_f64:
     usgn = true;
     LLVM_FALLTHROUGH;
   case NEON::BI__builtin_neon_vcvts_s32_f32:
   case NEON::BI__builtin_neon_vcvtd_s64_f64: {
     Ops.push_back(EmitScalarExpr(E->getArg(0)));
-    bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64;
+    bool Is64 = Ops[0]->getType()->getScalableSizeInBits().Unscaled == 64;
     llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty;
     llvm::Type *FTy = Is64 ? DoubleTy : FloatTy;
     Ops[0] = Builder.CreateBitCast(Ops[0], FTy);
     if (usgn)
       return Builder.CreateFPToUI(Ops[0], InTy);
     return Builder.CreateFPToSI(Ops[0], InTy);
   }
   case NEON::BI__builtin_neon_vcvts_f32_u32:
   case NEON::BI__builtin_neon_vcvtd_f64_u64:
     usgn = true;
     LLVM_FALLTHROUGH;
   case NEON::BI__builtin_neon_vcvts_f32_s32:
   case NEON::BI__builtin_neon_vcvtd_f64_s64: {
     Ops.push_back(EmitScalarExpr(E->getArg(0)));
-    bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64;
+    bool Is64 = Ops[0]->getType()->getScalableSizeInBits().Unscaled == 64;
     llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty;
     llvm::Type *FTy = Is64 ? DoubleTy : FloatTy;
     Ops[0] = Builder.CreateBitCast(Ops[0], InTy);
     if (usgn)
       return Builder.CreateUIToFP(Ops[0], FTy);
     return Builder.CreateSIToFP(Ops[0], FTy);
   }
   case NEON::BI__builtin_neon_vcvth_f16_u16:
   case NEON::BI__builtin_neon_vcvth_f16_u32:
   case NEON::BI__builtin_neon_vcvth_f16_u64:
     usgn = true;
     // FALL THROUGH
   case NEON::BI__builtin_neon_vcvth_f16_s16:
   case NEON::BI__builtin_neon_vcvth_f16_s32:
   case NEON::BI__builtin_neon_vcvth_f16_s64: {
     Ops.push_back(EmitScalarExpr(E->getArg(0)));
     llvm::Type *FTy = HalfTy;
     llvm::Type *InTy;
-    if (Ops[0]->getType()->getPrimitiveSizeInBits() == 64)
+    if (Ops[0]->getType()->getScalableSizeInBits().Unscaled == 64)
       InTy = Int64Ty;
-    else if (Ops[0]->getType()->getPrimitiveSizeInBits() == 32)
+    else if (Ops[0]->getType()->getScalableSizeInBits().Unscaled == 32)
       InTy = Int32Ty;
     else
       InTy = Int16Ty;
     Ops[0] = Builder.CreateBitCast(Ops[0], InTy);
     if (usgn)
       return Builder.CreateUIToFP(Ops[0], FTy);
     return Builder.CreateSIToFP(Ops[0], FTy);
   }
EmitScalarFMAExpr(CodeGenFunction &CGF, MutableArrayRef<Value *> Ops,
   if (NegAcc)
     Ops[2] = CGF.Builder.CreateFNeg(Ops[2]);
 
   Ops[0] = CGF.Builder.CreateExtractElement(Ops[0], (uint64_t)0);
   Ops[1] = CGF.Builder.CreateExtractElement(Ops[1], (uint64_t)0);
   Ops[2] = CGF.Builder.CreateExtractElement(Ops[2], (uint64_t)0);
   Value *Res;
   if (Rnd != 4) {
-    Intrinsic::ID IID = Ops[0]->getType()->getPrimitiveSizeInBits() == 32 ?
+    Intrinsic::ID IID = Ops[0]->getType()->getScalableSizeInBits().Unscaled == 32 ?
                         Intrinsic::x86_avx512_vfmadd_f32 :
                         Intrinsic::x86_avx512_vfmadd_f64;
     Res = CGF.Builder.CreateCall(CGF.CGM.getIntrinsic(IID),
                                  {Ops[0], Ops[1], Ops[2], Ops[4]});
   } else {
     Function *FMA = CGF.CGM.getIntrinsic(Intrinsic::fma, Ops[0]->getType());
     Res = CGF.Builder.CreateCall(FMA, Ops.slice(0, 3));
   }
EmitScalarFMAExpr(CodeGenFunction &CGF, MutableArrayRef<Value *> Ops,
   }
   return CGF.Builder.CreateInsertElement(Upper, Res, (uint64_t)0);
 }
 
 static Value *EmitX86Muldq(CodeGenFunction &CGF, bool IsSigned,
                            ArrayRef<Value *> Ops) {
   llvm::Type *Ty = Ops[0]->getType();
   // Arguments have a vXi32 type so cast to vXi64.
+  auto Size = Ty->getScalableSizeInBits();
   Ty = llvm::VectorType::get(CGF.Int64Ty,
-                             Ty->getPrimitiveSizeInBits() / 64);
+                             Size.Unscaled / 64);
   Value *LHS = CGF.Builder.CreateBitCast(Ops[0], Ty);
   Value *RHS = CGF.Builder.CreateBitCast(Ops[1], Ty);
 
   if (IsSigned) {
     // Shift left then arithmetic shift right.
     Constant *ShiftAmt = ConstantInt::get(Ty, 32);
     LHS = CGF.Builder.CreateShl(LHS, ShiftAmt);
     LHS = CGF.Builder.CreateAShr(LHS, ShiftAmt);

 
 // Emit a masked pternlog intrinsic. This only exists because the header has to
 // use a macro and we aren't able to pass the input argument to a pternlog
 // builtin and a select builtin without evaluating it twice.
 static Value *EmitX86Ternlog(CodeGenFunction &CGF, bool ZeroMask,
                              ArrayRef<Value *> Ops) {
   llvm::Type *Ty = Ops[0]->getType();
 
-  unsigned VecWidth = Ty->getPrimitiveSizeInBits();
+  unsigned VecWidth = Ty->getScalableSizeInBits().Unscaled;
   unsigned EltWidth = Ty->getScalarSizeInBits();
   Intrinsic::ID IID;
   if (VecWidth == 128 && EltWidth == 32)
     IID = Intrinsic::x86_avx512_pternlog_d_128;
   else if (VecWidth == 256 && EltWidth == 32)
     IID = Intrinsic::x86_avx512_pternlog_d_256;
   else if (VecWidth == 512 && EltWidth == 32)
     IID = Intrinsic::x86_avx512_pternlog_d_512;
#undef INTRINSIC_X86_XSAVE_ID
   case X86::BI__builtin_ia32_vpermilps:
   case X86::BI__builtin_ia32_vpermilpd256:
   case X86::BI__builtin_ia32_vpermilps256:
   case X86::BI__builtin_ia32_vpermilpd512:
   case X86::BI__builtin_ia32_vpermilps512: {
     uint32_t Imm = cast<llvm::ConstantInt>(Ops[1])->getZExtValue();
     llvm::Type *Ty = Ops[0]->getType();
     unsigned NumElts = Ty->getVectorNumElements();
-    unsigned NumLanes = Ty->getPrimitiveSizeInBits() / 128;
+    auto Size = Ty->getScalableSizeInBits();
+    unsigned NumLanes = Size.Unscaled / 128;
     unsigned NumLaneElts = NumElts / NumLanes;
 
     // Splat the 8-bits of immediate 4 times to help the loop wrap around.
     Imm = (Imm & 0xff) * 0x01010101;
 
     uint32_t Indices[16];
     for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
       for (unsigned i = 0; i != NumLaneElts; ++i) {
#undef INTRINSIC_X86_XSAVE_ID
   case X86::BI__builtin_ia32_shufpd256:
   case X86::BI__builtin_ia32_shufpd512:
   case X86::BI__builtin_ia32_shufps:
   case X86::BI__builtin_ia32_shufps256:
   case X86::BI__builtin_ia32_shufps512: {
     uint32_t Imm = cast<llvm::ConstantInt>(Ops[2])->getZExtValue();
     llvm::Type *Ty = Ops[0]->getType();
     unsigned NumElts = Ty->getVectorNumElements();
-    unsigned NumLanes = Ty->getPrimitiveSizeInBits() / 128;
+    auto Size = Ty->getScalableSizeInBits();
+    unsigned NumLanes = Size.Unscaled / 128;
     unsigned NumLaneElts = NumElts / NumLanes;
 
     // Splat the 8-bits of immediate 4 times to help the loop wrap around.
     Imm = (Imm & 0xff) * 0x01010101;
 
     uint32_t Indices[16];
     for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
       for (unsigned i = 0; i != NumLaneElts; ++i) {
#undef INTRINSIC_X86_XSAVE_ID
   case X86::BI__builtin_ia32_shuf_i64x2_256:
   case X86::BI__builtin_ia32_shuf_f32x4:
   case X86::BI__builtin_ia32_shuf_f64x2:
   case X86::BI__builtin_ia32_shuf_i32x4:
   case X86::BI__builtin_ia32_shuf_i64x2: {
     unsigned Imm = cast<llvm::ConstantInt>(Ops[2])->getZExtValue();
     llvm::Type *Ty = Ops[0]->getType();
     unsigned NumElts = Ty->getVectorNumElements();
-    unsigned NumLanes = Ty->getPrimitiveSizeInBits() == 512 ? 4 : 2;
+    unsigned NumLanes = Ty->getScalableSizeInBits().Unscaled == 512 ? 4 : 2;
     unsigned NumLaneElts = NumElts / NumLanes;
 
     uint32_t Indices[16];
     for (unsigned l = 0; l != NumElts; l += NumLaneElts) {
       unsigned Index = (Imm % NumLanes) * NumLaneElts;
       Imm /= NumLanes; // Discard the bits we just used.
       if (l >= (NumElts / 2))
         Index += NumElts; // Switch to other source.

lib/CodeGen/CGExprScalar.cpp

if (DstType->isExtVectorType() && !SrcType->isVectorType()) {
 
     // Splat the element across to all elements
     unsigned NumElements = DstTy->getVectorNumElements();
     return Builder.CreateVectorSplat(NumElements, Src, "splat");
   }
 
   if (isa<llvm::VectorType>(SrcTy) || isa<llvm::VectorType>(DstTy)) {
     // Allow bitcast from vector to integer/fp of the same size.
-    unsigned SrcSize = SrcTy->getPrimitiveSizeInBits();
-    unsigned DstSize = DstTy->getPrimitiveSizeInBits();
+    auto SrcSize = SrcTy->getScalableSizeInBits();
+    auto DstSize = DstTy->getScalableSizeInBits();
     if (SrcSize == DstSize)
       return Builder.CreateBitCast(Src, DstTy, "conv");
 
     // Conversions between vectors of different sizes are not allowed except
     // when vectors of half are involved. Operations on storage-only half
     // vectors require promoting half vector operands to float vectors and
     // truncating the result, which is either an int or float vector, to a
     // short or half vector.

lib/CodeGen/CGStmt.cpp

if (!Info.allowsMemory() && hasScalarEvaluationKind(OutExpr->getType())) {
         CGM.getDiags().Report(S.getAsmLoc(),
                               diag::err_asm_invalid_type_in_input)
             << OutExpr->getType() << OutputConstraint;
       }
 
       // Update largest vector width for any vector types.
       if (auto *VT = dyn_cast<llvm::VectorType>(ResultRegTypes.back()))
         LargestVectorWidth = std::max(LargestVectorWidth,
-                                      VT->getPrimitiveSizeInBits());
+                                      VT->getScalableSizeInBits().Unscaled);
     } else {
       ArgTypes.push_back(Dest.getAddress().getType());
       Args.push_back(Dest.getPointer());
       Constraints += "=*";
       Constraints += OutputConstraint;
       ReadOnly = ReadNone = false;
     }
 
     if (Info.isReadWrite()) {
       InOutConstraints += ',';
 
       const Expr *InputExpr = S.getOutputExpr(i);
       llvm::Value *Arg = EmitAsmInputLValue(Info, Dest, InputExpr->getType(),
                                             InOutConstraints,
                                             InputExpr->getExprLoc());
 
       if (llvm::Type* AdjTy =
           getTargetHooks().adjustInlineAsmType(*this, OutputConstraint,
                                                Arg->getType()))
         Arg = Builder.CreateBitCast(Arg, AdjTy);
 
       // Update largest vector width for any vector types.
       if (auto *VT = dyn_cast<llvm::VectorType>(Arg->getType()))
         LargestVectorWidth = std::max(LargestVectorWidth,
-                                      VT->getPrimitiveSizeInBits());
+                                      VT->getScalableSizeInBits().Unscaled);
       if (Info.allowsRegister())
         InOutConstraints += llvm::utostr(i);
       else
         InOutConstraints += OutputConstraint;
 
       InOutArgTypes.push_back(Arg->getType());
       InOutArgs.push_back(Arg);
     }
if (llvm::Type* AdjTy =
       Arg = Builder.CreateBitCast(Arg, AdjTy);
     else
       CGM.getDiags().Report(S.getAsmLoc(), diag::err_asm_invalid_type_in_input)
           << InputExpr->getType() << InputConstraint;
 
     // Update largest vector width for any vector types.
     if (auto *VT = dyn_cast<llvm::VectorType>(Arg->getType()))
       LargestVectorWidth = std::max(LargestVectorWidth,
-                                    VT->getPrimitiveSizeInBits());
+                                    VT->getScalableSizeInBits().Unscaled);
 
     ArgTypes.push_back(Arg->getType());
     Args.push_back(Arg);
     Constraints += InputConstraint;
   }
 
   // Append the "input" part of inout constraints last.
   for (unsigned i = 0, e = InOutArgs.size(); i != e; i++) {

lib/CodeGen/TargetInfo.cpp

ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const {
 
   return (RetTy->isPromotableIntegerType() ? ABIArgInfo::getExtend(RetTy)
                                            : ABIArgInfo::getDirect());
 }
 
 /// IsX86_MMXType - Return true if this is an MMX type.
 bool IsX86_MMXType(llvm::Type *IRType) {
   // Return true if the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>.
-  return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 &&
-    cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() &&
-    IRType->getScalarSizeInBits() != 64;
+  auto Size = IRType->getScalableSizeInBits();
+  return IRType->isVectorTy() && Size.Scaled == 0 &&
+    Size.Unscaled == 64 && IRType->getScalarSizeInBits() != 64 &&
+    cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy();
 }
 
 static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
                                           StringRef Constraint,
                                           llvm::Type* Ty) {
   bool IsMMXCons = llvm::StringSwitch<bool>(Constraint)
                      .Cases("y", "&y", "^Ym", true)
                      .Default(false);