[llvm-exegesis][NFC] Make randomizeUnsetVariables a free function.

[gchatelet]

Summary

This is prelimineary to moving random functions to SnippetGenerator.

llvm/trunk/tools/llvm-exegesis/lib/CodeTemplate.h

struct InstructionTemplate {
 
   unsigned getOpcode() const;
   llvm::MCOperand &getValueFor(const Variable &Var);
   const llvm::MCOperand &getValueFor(const Variable &Var) const;
   llvm::MCOperand &getValueFor(const Operand &Op);
   const llvm::MCOperand &getValueFor(const Operand &Op) const;
   bool hasImmediateVariables() const;
 
-  // Assigns a Random Value to all Variables that are still Invalid.
-  // Do not use any of the registers in `ForbiddenRegs`.
-  void randomizeUnsetVariables(const llvm::BitVector &ForbiddenRegs);
-
   // Builds an llvm::MCInst from this InstructionTemplate setting its operands
   // to the corresponding variable values. Precondition: All VariableValues must
   // be set.
   llvm::MCInst build() const;
 
   Instruction Instr;
   llvm::SmallVector<llvm::MCOperand, 4> VariableValues;
 };

 // Precondition: Vector must have at least one bit set.
 size_t randomBit(const llvm::BitVector &Vector);
 
 // Picks a random configuration, then selects a random def and a random use from
 // it and finally set the selected values in the provided InstructionInstances.
 void setRandomAliasing(const AliasingConfigurations &AliasingConfigurations,
                        InstructionTemplate &DefIB, InstructionTemplate &UseIB);
 
+// Assigns a Random Value to all Variables in IT that are still Invalid.
+// Do not use any of the registers in `ForbiddenRegs`.
+void randomizeUnsetVariables(const llvm::BitVector &ForbiddenRegs,
+                             InstructionTemplate &IT);
+
 } // namespace exegesis
 
 #endif // LLVM_TOOLS_LLVM_EXEGESIS_CODETEMPLATE_H

llvm/trunk/tools/llvm-exegesis/lib/CodeTemplate.cpp

return llvm::any_of(Instr.Variables, [this](const Variable &Var) {
     assert(!Var.TiedOperands.empty());
     const unsigned OpIndex = Var.TiedOperands[0];
     const Operand &Op = Instr.Operands[OpIndex];
     assert(Op.Info);
     return Op.Info->OperandType == llvm::MCOI::OPERAND_IMMEDIATE;
   });
 }
 
-void InstructionTemplate::randomizeUnsetVariables(
-    const llvm::BitVector &ForbiddenRegs) {
-  for (const Variable &Var : Instr.Variables) {
-    llvm::MCOperand &AssignedValue = getValueFor(Var);
-    if (!AssignedValue.isValid())
-      randomize(Instr, Var, AssignedValue, ForbiddenRegs);
-  }
-}
-
 llvm::MCInst InstructionTemplate::build() const {
   llvm::MCInst Result;
   Result.setOpcode(Instr.Description->Opcode);
   for (const auto &Op : Instr.Operands)
     if (Op.IsExplicit)
       Result.addOperand(getValueFor(Op));
   return Result;
 }
void setRandomAliasing(const AliasingConfigurations &AliasingConfigurations,
                        InstructionTemplate &DefIB, InstructionTemplate &UseIB) {
   assert(!AliasingConfigurations.empty());
   assert(!AliasingConfigurations.hasImplicitAliasing());
   const auto &RandomConf = randomElement(AliasingConfigurations.Configurations);
   setRegisterOperandValue(randomElement(RandomConf.Defs), DefIB);
   setRegisterOperandValue(randomElement(RandomConf.Uses), UseIB);
 }
 
+void randomizeUnsetVariables(const llvm::BitVector &ForbiddenRegs,
+                             InstructionTemplate &IT) {
+  for (const Variable &Var : IT.Instr.Variables) {
+    llvm::MCOperand &AssignedValue = IT.getValueFor(Var);
+    if (!AssignedValue.isValid())
+      randomize(IT.Instr, Var, AssignedValue, ForbiddenRegs);
+  }
+}
+
 } // namespace exegesis

llvm/trunk/tools/llvm-exegesis/lib/SnippetGenerator.cpp

: State(State), RATC(State.getRegInfo(),
                          getFunctionReservedRegs(State.getTargetMachine())) {}
 
 SnippetGenerator::~SnippetGenerator() = default;
 
 llvm::Expected<std::vector<BenchmarkCode>>
 SnippetGenerator::generateConfigurations(unsigned Opcode) const {
   if (auto E = generateCodeTemplate(Opcode)) {
     CodeTemplate &CT = E.get();
+    const llvm::BitVector &ForbiddenRegs =
+        CT.ScratchSpacePointerInReg
+            ? RATC.getRegister(CT.ScratchSpacePointerInReg).aliasedBits()
+            : RATC.emptyRegisters();
     std::vector<BenchmarkCode> Output;
     // TODO: Generate as many BenchmarkCode as needed.
     {
       BenchmarkCode BC;
       BC.Info = CT.Info;
       for (InstructionTemplate &IT : CT.Instructions) {
-        IT.randomizeUnsetVariables(
-            CT.ScratchSpacePointerInReg
-                ? RATC.getRegister(CT.ScratchSpacePointerInReg).aliasedBits()
-                : RATC.emptyRegisters());
+        randomizeUnsetVariables(ForbiddenRegs, IT);
         BC.Instructions.push_back(IT.build());
       }
       if (CT.ScratchSpacePointerInReg)
         BC.LiveIns.push_back(CT.ScratchSpacePointerInReg);
       BC.RegisterInitialValues = computeRegisterInitialValues(CT.Instructions);
       Output.push_back(std::move(BC));
     }
     return Output;