[InstCombine] foldICmpWithLowBitMaskedVal(): handle ~(-1 << y) mask

[lebedev.ri]

Summary

Two folds are happening here:

1. https://rise4fun.com/Alive/oaFX
2. And then foldICmpWithHighBitMask() (D52001): https://rise4fun.com/Alive/wsP4

This change doesn't just add the handling for eq/ne predicates,
it actually builds upon the previous foldICmpWithLowBitMaskedVal() work,
so all the 16 fold variants* are immediately supported.

I'm indeed only testing these two predicates.
I do not feel like re-proving all 16 folds*, because they were already proven
for the general case of constant with all-ones in low bits. So as long as
the mask produces all-ones in low bits, i'm pretty sure the fold is valid.

But required, i can re-prove, let me know.

• eq/ne are commutative - 4 folds; ult/ule/ugt/uge - are not commutative (the commuted variant is InstSimplified), 4 folds; slt/sle/sgt/sge are not commutative - 4 folds. 12 folds in total.

https://bugs.llvm.org/show_bug.cgi?id=38123
https://bugs.llvm.org/show_bug.cgi?id=38708

[spatel]

Is this a generalization of D52001 (and if so, can we remove that code as a special-case of the more general pattern)?

[lebedev.ri]

In D52146#1236832, @spatel wrote:

Is this a generalization of D52001 (and if so, can we remove that code as a special-case of the more general pattern)?

No, i don't think so, why?

Like i wrote in the description:

Two folds are happening here:

1. https://rise4fun.com/Alive/oaFX
2. And then foldICmpWithHighBitMask() (D52001) fires on newly formed IR: https://rise4fun.com/Alive/wsP4

I.e. this fold actually allows D52001 to happen.

[spatel]

In D52146#1236849, @lebedev.ri wrote:

In D52146#1236832, @spatel wrote:

Is this a generalization of D52001 (and if so, can we remove that code as a special-case of the more general pattern)?

No, i don't think so, why?

Like i wrote in the description:

Two folds are happening here:

1. https://rise4fun.com/Alive/oaFX
2. And then foldICmpWithHighBitMask() (D52001) fires on newly formed IR: https://rise4fun.com/Alive/wsP4

I.e. this fold actually allows D52001 to happen.

Sorry, I misread what was happening in this patch series. Things look logically correct, but we should clarify for the record - what is the higher-level motivation for these folds? Particularly, for the cases with non-canonical pattern matching - do we have some important application that will benefit or data for how often those patterns occur across a range of benchmarks?

[lebedev.ri]

In D52146#1237101, @spatel wrote:

In D52146#1236849, @lebedev.ri wrote:

In D52146#1236832, @spatel wrote:

Is this a generalization of D52001 (and if so, can we remove that code as a special-case of the more general pattern)?

No, i don't think so, why?

Like i wrote in the description:

Two folds are happening here:

1. https://rise4fun.com/Alive/oaFX
2. And then foldICmpWithHighBitMask() (D52001) fires on newly formed IR: https://rise4fun.com/Alive/wsP4

I.e. this fold actually allows D52001 to happen.

Sorry, I misread what was happening in this patch series.

Great. I was worrying i was missing something obvious here.

In D52146#1237101, @spatel wrote:

Things look logically correct,

but we should clarify for the record - what is the higher-level motivation for these folds?
Particularly, for the cases with non-canonical pattern matching - do we have some important application
that will benefit or data for how often those patterns occur across a range of benchmarks?

The main reason is consistency.
I have seen all 4 of these variants to produce the mask in the wild.
I'm not aware of some 5'th variant. (at least right now?)

Sure, we may just forget these non-canonical patterns exist for the matter of this fold,
like we do in most other cases, but if we fail to canonicalize them, well, we fail.

I certainly understand the point about 'death by thousand cuts', but well,
if two more trivial patters notably matter, i suspect there is some larger problem..
(It would/will be oh so much simpler if each and every patter needn't be to manually found/tested/folded..)

Stats are not as impressive. LLVM stage 2

$ # (when the mask is constant, the actual number is higher since it fires more than once in some files)
$ find -iname *.stats | xargs grep D52146_CONSTANT | wc -l
157
$ # the canonical pattern variants.
$ find -iname *.stats | xargs grep D52146_CANONICAL
./llvm-stage2/tools/lld/lib/ReaderWriter/MachO/MachONormalizedFileToAtoms.stats:        "instcombine.D52146_CANONICAL": 1,
./llvm-stage2/tools/lld/wasm/InputChunks.stats: "instcombine.D52146_CANONICAL": 2,
$ find -iname *.stats | xargs grep D52146_UNCANONICAL
$ # well yeah, zero. given how few D52146_CANONICAL there are, i suspect this is not representable.

[spatel]

In D52146#1237294, @lebedev.ri wrote:

In D52146#1237101, @spatel wrote:

In D52146#1236849, @lebedev.ri wrote:

In D52146#1236832, @spatel wrote:

Is this a generalization of D52001 (and if so, can we remove that code as a special-case of the more general pattern)?

No, i don't think so, why?

Like i wrote in the description:

Two folds are happening here:

1. https://rise4fun.com/Alive/oaFX
2. And then foldICmpWithHighBitMask() (D52001) fires on newly formed IR: https://rise4fun.com/Alive/wsP4

I.e. this fold actually allows D52001 to happen.

Sorry, I misread what was happening in this patch series.

Great. I was worrying i was missing something obvious here.

In D52146#1237101, @spatel wrote:

Things look logically correct,

but we should clarify for the record - what is the higher-level motivation for these folds?
Particularly, for the cases with non-canonical pattern matching - do we have some important application
that will benefit or data for how often those patterns occur across a range of benchmarks?

The main reason is consistency.
I have seen all 4 of these variants to produce the mask in the wild.
I'm not aware of some 5'th variant. (at least right now?)

Sure, we may just forget these non-canonical patterns exist for the matter of this fold,
like we do in most other cases, but if we fail to canonicalize them, well, we fail.

I certainly understand the point about 'death by thousand cuts', but well,
if two more trivial patters notably matter, i suspect there is some larger problem..
(It would/will be oh so much simpler if each and every patter needn't be to manually found/tested/folded..)

Agreed - not sure how much work that automated/better solution requires, but I guess we'll eventually get there. But in the meantime, we should be aware of the compile-time implications of the current instcombine. Therefore, not adding folds without some real-world motivation. The perf of visitICmpInst is probably 1 of the most concerning for those that are watching the compile-time creep up, so that's why I'm raising it here.

Stats are not as impressive. LLVM stage 2

$ # (when the mask is constant, the actual number is higher since it fires more than once in some files)
$ find -iname *.stats | xargs grep D52146_CONSTANT | wc -l
157
$ # the canonical pattern variants.
$ find -iname *.stats | xargs grep D52146_CANONICAL
./llvm-stage2/tools/lld/lib/ReaderWriter/MachO/MachONormalizedFileToAtoms.stats:        "instcombine.D52146_CANONICAL": 1,
./llvm-stage2/tools/lld/wasm/InputChunks.stats: "instcombine.D52146_CANONICAL": 2,
$ find -iname *.stats | xargs grep D52146_UNCANONICAL
$ # well yeah, zero. given how few D52146_CANONICAL there are, i suspect this is not representable.

Thanks for collecting the data. So the non-canonical cases are closer to the edge, but this patch is definitely justified. LGTM.

llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp

Instruction *InstCombiner::foldICmpInstWithConstantNotInt(ICmpInst &I) {
 
   return nullptr;
 }
 
 /// Some comparisons can be simplified.
 /// In this case, we are looking for comparisons that look like
 /// a check for a lossy truncation.
 /// Folds:
-///   x & (-1 >> y) SrcPred x    to    x DstPred (-1 >> y)
+///   icmp SrcPred (x & Mask), x    to    icmp DstPred x, Mask
+/// Where Mask is some pattern that produces all-ones in low bits:
+///    (-1 >> y)
+///   ~(-1 << y)
 /// The Mask can be a constant, too.
 /// For some predicates, the operands are commutative.
 /// For others, x can only be on a specific side.
 static Value *foldICmpWithLowBitMaskedVal(ICmpInst &I,
                                           InstCombiner::BuilderTy &Builder) {
   ICmpInst::Predicate SrcPred;
   Value *X, *M;
-  auto m_Mask = m_CombineOr(m_LShr(m_AllOnes(), m_Value()), m_LowBitMask());
+  auto m_VariableMask = m_CombineOr(m_Not(m_Shl(m_AllOnes(), m_Value())),
+                                    m_LShr(m_AllOnes(), m_Value()));
+  auto m_Mask = m_CombineOr(m_VariableMask, m_LowBitMask());
   if (!match(&I, m_c_ICmp(SrcPred,
                           m_c_And(m_CombineAnd(m_Mask, m_Value(M)), m_Value(X)),
                           m_Deferred(X))))
     return nullptr;
 
   ICmpInst::Predicate DstPred;
   switch (SrcPred) {
   case ICmpInst::Predicate::ICMP_EQ:

llvm/trunk/test/Transforms/InstCombine/canonicalize-low-bit-mask-v2-and-icmp-eq-to-icmp-ule.ll

 ;   (x >> y) == 0
 
 ; ============================================================================ ;
 ; Basic positive tests
 ; ============================================================================ ;
 
 define i1 @p0(i8 %x, i8 %y) {
 ; CHECK-LABEL: @p0(
-; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i8 [[X_HIGHBITS]], 0
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   %t1 = xor i8 %t0, -1
   %t2 = and i8 %t1, %x
   %ret = icmp eq i8 %t2, %x
   ret i1 %ret
 }
 
 ; ============================================================================ ;
 ; Vector tests
 ; ============================================================================ ;
 
 define <2 x i1> @p1_vec(<2 x i8> %x, <2 x i8> %y) {
 ; CHECK-LABEL: @p1_vec(
-; CHECK-NEXT:    [[T0:%.*]] = shl <2 x i8> <i8 -1, i8 -1>, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor <2 x i8> [[T0]], <i8 -1, i8 -1>
-; CHECK-NEXT:    [[T2:%.*]] = and <2 x i8> [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq <2 x i8> [[T2]], [[X]]
-; CHECK-NEXT:    ret <2 x i1> [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr <2 x i8> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq <2 x i8> [[X_HIGHBITS]], zeroinitializer
+; CHECK-NEXT:    ret <2 x i1> [[TMP1]]
 ;
   %t0 = shl <2 x i8> <i8 -1, i8 -1>, %y
   %t1 = xor <2 x i8> %t0, <i8 -1, i8 -1>
   %t2 = and <2 x i8> %t1, %x
   %ret = icmp eq <2 x i8> %t2, %x
   ret <2 x i1> %ret
 }
 
 define <3 x i1> @p2_vec_undef0(<3 x i8> %x, <3 x i8> %y) {
 ; CHECK-LABEL: @p2_vec_undef0(
-; CHECK-NEXT:    [[T0:%.*]] = shl <3 x i8> <i8 -1, i8 undef, i8 -1>, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor <3 x i8> [[T0]], <i8 -1, i8 -1, i8 -1>
-; CHECK-NEXT:    [[T2:%.*]] = and <3 x i8> [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq <3 x i8> [[T2]], [[X]]
-; CHECK-NEXT:    ret <3 x i1> [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr <3 x i8> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq <3 x i8> [[X_HIGHBITS]], zeroinitializer
+; CHECK-NEXT:    ret <3 x i1> [[TMP1]]
 ;
   %t0 = shl <3 x i8> <i8 -1, i8 undef, i8 -1>, %y
   %t1 = xor <3 x i8> %t0, <i8 -1, i8 -1, i8 -1>
   %t2 = and <3 x i8> %t1, %x
   %ret = icmp eq <3 x i8> %t2, %x
   ret <3 x i1> %ret
 }
 
 define <3 x i1> @p3_vec_undef0(<3 x i8> %x, <3 x i8> %y) {
 ; CHECK-LABEL: @p3_vec_undef0(
-; CHECK-NEXT:    [[T0:%.*]] = shl <3 x i8> <i8 -1, i8 -1, i8 -1>, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor <3 x i8> [[T0]], <i8 -1, i8 undef, i8 -1>
-; CHECK-NEXT:    [[T2:%.*]] = and <3 x i8> [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq <3 x i8> [[T2]], [[X]]
-; CHECK-NEXT:    ret <3 x i1> [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr <3 x i8> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq <3 x i8> [[X_HIGHBITS]], zeroinitializer
+; CHECK-NEXT:    ret <3 x i1> [[TMP1]]
 ;
   %t0 = shl <3 x i8> <i8 -1, i8 -1, i8 -1>, %y
   %t1 = xor <3 x i8> %t0, <i8 -1, i8 undef, i8 -1>
   %t2 = and <3 x i8> %t1, %x
   %ret = icmp eq <3 x i8> %t2, %x
   ret <3 x i1> %ret
 }
 
 define <3 x i1> @p4_vec_undef2(<3 x i8> %x, <3 x i8> %y) {
 ; CHECK-LABEL: @p4_vec_undef2(
-; CHECK-NEXT:    [[T0:%.*]] = shl <3 x i8> <i8 -1, i8 undef, i8 -1>, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor <3 x i8> [[T0]], <i8 -1, i8 undef, i8 -1>
-; CHECK-NEXT:    [[T2:%.*]] = and <3 x i8> [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq <3 x i8> [[T2]], [[X]]
-; CHECK-NEXT:    ret <3 x i1> [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr <3 x i8> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq <3 x i8> [[X_HIGHBITS]], zeroinitializer
+; CHECK-NEXT:    ret <3 x i1> [[TMP1]]
 ;
   %t0 = shl <3 x i8> <i8 -1, i8 undef, i8 -1>, %y
   %t1 = xor <3 x i8> %t0, <i8 -1, i8 undef, i8 -1>
   %t2 = and <3 x i8> %t1, %x
   %ret = icmp eq <3 x i8> %t2, %x
   ret <3 x i1> %ret
 }
 
 ; ============================================================================ ;
 ; Commutativity tests.
 ; ============================================================================ ;
 
 declare i8 @gen8()
 
 define i1 @c0(i8 %y) {
 ; CHECK-LABEL: @c0(
-; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    [[X:%.*]] = call i8 @gen8()
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[X]], [[T1]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr i8 [[X]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i8 [[X_HIGHBITS]], 0
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   %t1 = xor i8 %t0, -1
   %x = call i8 @gen8()
   %t2 = and i8 %x, %t1 ; swapped order
   %ret = icmp eq i8 %t2, %x
   ret i1 %ret
 }
 
 define i1 @c1(i8 %y) {
 ; CHECK-LABEL: @c1(
-; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    [[X:%.*]] = call i8 @gen8()
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[X]], [[T1]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq i8 [[X]], [[T2]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr i8 [[X]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i8 [[X_HIGHBITS]], 0
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   %t1 = xor i8 %t0, -1
   %x = call i8 @gen8()
   %t2 = and i8 %t1, %x
   %ret = icmp eq i8 %x, %t2 ; swapped order
   ret i1 %ret
 }
 
 define i1 @c2(i8 %y) {
 ; CHECK-LABEL: @c2(
-; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    [[X:%.*]] = call i8 @gen8()
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[X]], [[T1]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq i8 [[X]], [[T2]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr i8 [[X]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i8 [[X_HIGHBITS]], 0
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   %t1 = xor i8 %t0, -1
   %x = call i8 @gen8()
   %t2 = and i8 %x, %t1 ; swapped order
   %ret = icmp eq i8 %x, %t2 ; swapped order
   ret i1 %ret
 }
 
 ; ============================================================================ ;
 ; One-use tests. We don't care about multi-uses here.
 ; ============================================================================ ;
 
 declare void @use8(i8)
 
 define i1 @oneuse0(i8 %x, i8 %y) {
 ; CHECK-LABEL: @oneuse0(
 ; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T0]])
-; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr i8 [[X:%.*]], [[Y]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i8 [[X_HIGHBITS]], 0
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   call void @use8(i8 %t0)
   %t1 = xor i8 %t0, -1
   %t2 = and i8 %t1, %x
   %ret = icmp eq i8 %t2, %x
   ret i1 %ret
 }
 
 define i1 @oneuse1(i8 %x, i8 %y) {
 ; CHECK-LABEL: @oneuse1(
 ; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    call void @use8(i8 [[T1]])
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp uge i8 [[T1]], [[X:%.*]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   %t1 = xor i8 %t0, -1
   call void @use8(i8 %t1)
   %t2 = and i8 %t1, %x
   %ret = icmp eq i8 %t2, %x
   ret i1 %ret
 }
 
 define i1 @oneuse2(i8 %x, i8 %y) {
 ; CHECK-LABEL: @oneuse2(
 ; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T2]])
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp uge i8 [[T1]], [[X]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   %t1 = xor i8 %t0, -1
   %t2 = and i8 %t1, %x
   call void @use8(i8 %t2)
   %ret = icmp eq i8 %t2, %x
   ret i1 %ret
 }
 
 define i1 @oneuse3(i8 %x, i8 %y) {
 ; CHECK-LABEL: @oneuse3(
 ; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T0]])
 ; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    call void @use8(i8 [[T1]])
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp uge i8 [[T1]], [[X:%.*]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   call void @use8(i8 %t0)
   %t1 = xor i8 %t0, -1
   call void @use8(i8 %t1)
   %t2 = and i8 %t1, %x
   %ret = icmp eq i8 %t2, %x
   ret i1 %ret
 }
 
 define i1 @oneuse4(i8 %x, i8 %y) {
 ; CHECK-LABEL: @oneuse4(
 ; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T0]])
 ; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T2]])
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp uge i8 [[T1]], [[X]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   call void @use8(i8 %t0)
   %t1 = xor i8 %t0, -1
   %t2 = and i8 %t1, %x
   call void @use8(i8 %t2)
   %ret = icmp eq i8 %t2, %x
   ret i1 %ret
 }
 
 define i1 @oneuse5(i8 %x, i8 %y) {
 ; CHECK-LABEL: @oneuse5(
 ; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T0]])
 ; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    call void @use8(i8 [[T1]])
 ; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T2]])
-; CHECK-NEXT:    [[RET:%.*]] = icmp eq i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp uge i8 [[T1]], [[X]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   call void @use8(i8 %t0)
   %t1 = xor i8 %t0, -1
   call void @use8(i8 %t1)
   %t2 = and i8 %t1, %x
   call void @use8(i8 %t2)
   %ret = icmp eq i8 %t2, %x

llvm/trunk/test/Transforms/InstCombine/canonicalize-low-bit-mask-v2-and-icmp-ne-to-icmp-ugt.ll

 ;   (x >> y) != 0
 
 ; ============================================================================ ;
 ; Basic positive tests
 ; ============================================================================ ;
 
 define i1 @p0(i8 %x, i8 %y) {
 ; CHECK-LABEL: @p0(
-; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i8 [[X_HIGHBITS]], 0
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   %t1 = xor i8 %t0, -1
   %t2 = and i8 %t1, %x
   %ret = icmp ne i8 %t2, %x
   ret i1 %ret
 }
 
 ; ============================================================================ ;
 ; Vector tests
 ; ============================================================================ ;
 
 define <2 x i1> @p1_vec(<2 x i8> %x, <2 x i8> %y) {
 ; CHECK-LABEL: @p1_vec(
-; CHECK-NEXT:    [[T0:%.*]] = shl <2 x i8> <i8 -1, i8 -1>, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor <2 x i8> [[T0]], <i8 -1, i8 -1>
-; CHECK-NEXT:    [[T2:%.*]] = and <2 x i8> [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne <2 x i8> [[T2]], [[X]]
-; CHECK-NEXT:    ret <2 x i1> [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr <2 x i8> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne <2 x i8> [[X_HIGHBITS]], zeroinitializer
+; CHECK-NEXT:    ret <2 x i1> [[TMP1]]
 ;
   %t0 = shl <2 x i8> <i8 -1, i8 -1>, %y
   %t1 = xor <2 x i8> %t0, <i8 -1, i8 -1>
   %t2 = and <2 x i8> %t1, %x
   %ret = icmp ne <2 x i8> %t2, %x
   ret <2 x i1> %ret
 }
 
 define <3 x i1> @p2_vec_undef0(<3 x i8> %x, <3 x i8> %y) {
 ; CHECK-LABEL: @p2_vec_undef0(
-; CHECK-NEXT:    [[T0:%.*]] = shl <3 x i8> <i8 -1, i8 undef, i8 -1>, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor <3 x i8> [[T0]], <i8 -1, i8 -1, i8 -1>
-; CHECK-NEXT:    [[T2:%.*]] = and <3 x i8> [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne <3 x i8> [[T2]], [[X]]
-; CHECK-NEXT:    ret <3 x i1> [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr <3 x i8> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne <3 x i8> [[X_HIGHBITS]], zeroinitializer
+; CHECK-NEXT:    ret <3 x i1> [[TMP1]]
 ;
   %t0 = shl <3 x i8> <i8 -1, i8 undef, i8 -1>, %y
   %t1 = xor <3 x i8> %t0, <i8 -1, i8 -1, i8 -1>
   %t2 = and <3 x i8> %t1, %x
   %ret = icmp ne <3 x i8> %t2, %x
   ret <3 x i1> %ret
 }
 
 define <3 x i1> @p3_vec_undef0(<3 x i8> %x, <3 x i8> %y) {
 ; CHECK-LABEL: @p3_vec_undef0(
-; CHECK-NEXT:    [[T0:%.*]] = shl <3 x i8> <i8 -1, i8 -1, i8 -1>, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor <3 x i8> [[T0]], <i8 -1, i8 undef, i8 -1>
-; CHECK-NEXT:    [[T2:%.*]] = and <3 x i8> [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne <3 x i8> [[T2]], [[X]]
-; CHECK-NEXT:    ret <3 x i1> [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr <3 x i8> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne <3 x i8> [[X_HIGHBITS]], zeroinitializer
+; CHECK-NEXT:    ret <3 x i1> [[TMP1]]
 ;
   %t0 = shl <3 x i8> <i8 -1, i8 -1, i8 -1>, %y
   %t1 = xor <3 x i8> %t0, <i8 -1, i8 undef, i8 -1>
   %t2 = and <3 x i8> %t1, %x
   %ret = icmp ne <3 x i8> %t2, %x
   ret <3 x i1> %ret
 }
 
 define <3 x i1> @p4_vec_undef2(<3 x i8> %x, <3 x i8> %y) {
 ; CHECK-LABEL: @p4_vec_undef2(
-; CHECK-NEXT:    [[T0:%.*]] = shl <3 x i8> <i8 -1, i8 undef, i8 -1>, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor <3 x i8> [[T0]], <i8 -1, i8 undef, i8 -1>
-; CHECK-NEXT:    [[T2:%.*]] = and <3 x i8> [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne <3 x i8> [[T2]], [[X]]
-; CHECK-NEXT:    ret <3 x i1> [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr <3 x i8> [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne <3 x i8> [[X_HIGHBITS]], zeroinitializer
+; CHECK-NEXT:    ret <3 x i1> [[TMP1]]
 ;
   %t0 = shl <3 x i8> <i8 -1, i8 undef, i8 -1>, %y
   %t1 = xor <3 x i8> %t0, <i8 -1, i8 undef, i8 -1>
   %t2 = and <3 x i8> %t1, %x
   %ret = icmp ne <3 x i8> %t2, %x
   ret <3 x i1> %ret
 }
 
 ; ============================================================================ ;
 ; Commutativity tests.
 ; ============================================================================ ;
 
 declare i8 @gen8()
 
 define i1 @c0(i8 %y) {
 ; CHECK-LABEL: @c0(
-; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    [[X:%.*]] = call i8 @gen8()
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[X]], [[T1]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr i8 [[X]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i8 [[X_HIGHBITS]], 0
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   %t1 = xor i8 %t0, -1
   %x = call i8 @gen8()
   %t2 = and i8 %x, %t1 ; swapped order
   %ret = icmp ne i8 %t2, %x
   ret i1 %ret
 }
 
 define i1 @c1(i8 %y) {
 ; CHECK-LABEL: @c1(
-; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    [[X:%.*]] = call i8 @gen8()
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[X]], [[T1]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne i8 [[X]], [[T2]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr i8 [[X]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i8 [[X_HIGHBITS]], 0
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   %t1 = xor i8 %t0, -1
   %x = call i8 @gen8()
   %t2 = and i8 %t1, %x
   %ret = icmp ne i8 %x, %t2 ; swapped order
   ret i1 %ret
 }
 
 define i1 @c2(i8 %y) {
 ; CHECK-LABEL: @c2(
-; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    [[X:%.*]] = call i8 @gen8()
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[X]], [[T1]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne i8 [[X]], [[T2]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr i8 [[X]], [[Y:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i8 [[X_HIGHBITS]], 0
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   %t1 = xor i8 %t0, -1
   %x = call i8 @gen8()
   %t2 = and i8 %x, %t1 ; swapped order
   %ret = icmp ne i8 %x, %t2 ; swapped order
   ret i1 %ret
 }
 
 ; ============================================================================ ;
 ; One-use tests. We don't care about multi-uses here.
 ; ============================================================================ ;
 
 declare void @use8(i8)
 
 define i1 @oneuse0(i8 %x, i8 %y) {
 ; CHECK-LABEL: @oneuse0(
 ; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T0]])
-; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[X_HIGHBITS:%.*]] = lshr i8 [[X:%.*]], [[Y]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i8 [[X_HIGHBITS]], 0
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   call void @use8(i8 %t0)
   %t1 = xor i8 %t0, -1
   %t2 = and i8 %t1, %x
   %ret = icmp ne i8 %t2, %x
   ret i1 %ret
 }
 
 define i1 @oneuse1(i8 %x, i8 %y) {
 ; CHECK-LABEL: @oneuse1(
 ; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    call void @use8(i8 [[T1]])
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i8 [[T1]], [[X:%.*]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   %t1 = xor i8 %t0, -1
   call void @use8(i8 %t1)
   %t2 = and i8 %t1, %x
   %ret = icmp ne i8 %t2, %x
   ret i1 %ret
 }
 
 define i1 @oneuse2(i8 %x, i8 %y) {
 ; CHECK-LABEL: @oneuse2(
 ; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
 ; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T2]])
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i8 [[T1]], [[X]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   %t1 = xor i8 %t0, -1
   %t2 = and i8 %t1, %x
   call void @use8(i8 %t2)
   %ret = icmp ne i8 %t2, %x
   ret i1 %ret
 }
 
 define i1 @oneuse3(i8 %x, i8 %y) {
 ; CHECK-LABEL: @oneuse3(
 ; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T0]])
 ; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    call void @use8(i8 [[T1]])
-; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i8 [[T1]], [[X:%.*]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   call void @use8(i8 %t0)
   %t1 = xor i8 %t0, -1
   call void @use8(i8 %t1)
   %t2 = and i8 %t1, %x
   %ret = icmp ne i8 %t2, %x
   ret i1 %ret
 }
 
 define i1 @oneuse4(i8 %x, i8 %y) {
 ; CHECK-LABEL: @oneuse4(
 ; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T0]])
 ; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T2]])
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i8 [[T1]], [[X]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   call void @use8(i8 %t0)
   %t1 = xor i8 %t0, -1
   %t2 = and i8 %t1, %x
   call void @use8(i8 %t2)
   %ret = icmp ne i8 %t2, %x
   ret i1 %ret
 }
 
 define i1 @oneuse5(i8 %x, i8 %y) {
 ; CHECK-LABEL: @oneuse5(
 ; CHECK-NEXT:    [[T0:%.*]] = shl i8 -1, [[Y:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T0]])
 ; CHECK-NEXT:    [[T1:%.*]] = xor i8 [[T0]], -1
 ; CHECK-NEXT:    call void @use8(i8 [[T1]])
 ; CHECK-NEXT:    [[T2:%.*]] = and i8 [[T1]], [[X:%.*]]
 ; CHECK-NEXT:    call void @use8(i8 [[T2]])
-; CHECK-NEXT:    [[RET:%.*]] = icmp ne i8 [[T2]], [[X]]
-; CHECK-NEXT:    ret i1 [[RET]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i8 [[T1]], [[X]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
 ;
   %t0 = shl i8 -1, %y
   call void @use8(i8 %t0)
   %t1 = xor i8 %t0, -1
   call void @use8(i8 %t1)
   %t2 = and i8 %t1, %x
   call void @use8(i8 %t2)
   %ret = icmp ne i8 %t2, %x