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Differential D52062

[InstCombine] Inefficient pattern for high-bits checking 3 (PR38708)
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Authored by lebedev.ri on Sep 13 2018, 2:43 PM.

Details

Reviewers
spatel
craig.topper
RKSimon
Commits
rG1b7fc870206a: [InstCombine] Inefficient pattern for high-bits checking 3 (PR38708)
rL342321: [InstCombine] Inefficient pattern for high-bits checking 3 (PR38708)
Summary

It is sometimes important to check that some newly-computed value
is non-negative and only n bits wide (where n is a variable.)
There are many ways to check that:
https://godbolt.org/z/o4RB8D
The last variant seems best?
(I'm sure there are some other variations i haven't thought of..)

The last (as far i know?) pattern, non-canonical due to the extra use.
https://godbolt.org/z/aCMsPk
https://rise4fun.com/Alive/I6f

https://bugs.llvm.org/show_bug.cgi?id=38708

Diff Detail

Repository
rL LLVM

Event Timeline

lebedev.ri created this revision.Sep 13 2018, 2:43 PM
lebedev.ri added a parent revision: D52001: [InstCombine] Inefficient pattern for high-bits checking 2 (PR38708).
spatel accepted this revision.Sep 14 2018, 9:34 AM

LGTM - might want to add a code comment that we're only expecting this pattern in the multi-use case otherwise, it would have been canonicalized to the 'not' form.

This revision is now accepted and ready to land.Sep 14 2018, 9:34 AM
lebedev.ri added a comment.Sep 15 2018, 5:04 AM
In D52062#1235062, @spatel wrote:

LGTM

Thank you for the review!

In D52062#1235062, @spatel wrote:

might want to add a code comment that we're only expecting this pattern in the multi-use case otherwise, it would have been canonicalized to the 'not' form.

Yeah, good idea.

Closed by commit rL342321: [InstCombine] Inefficient pattern for high-bits checking 3 (PR38708) (authored by lebedevri). · Explain WhySep 15 2018, 5:08 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

Diff 165639

llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp

Show First 20 Lines • Show All 4,618 Lines • ▼ Show 20 Lines case ICmpInst::ICMP_SGE:
LLVM_FALLTHROUGH; LLVM_FALLTHROUGH;
case ICmpInst::ICMP_SLE: case ICmpInst::ICMP_SLE:
// icmp sle i1 A, B -> A | ~B // icmp sle i1 A, B -> A | ~B
return BinaryOperator::CreateOr(Builder.CreateNot(B), A); return BinaryOperator::CreateOr(Builder.CreateNot(B), A);
} }
} }
// Transform pattern like: // Transform pattern like:
// (1 << Y) u<= X or ~(-1 << Y) u< X // (1 << Y) u<= X or ~(-1 << Y) u< X or ((1 << Y)+(-1)) u< X
// (1 << Y) u> X or ~(-1 << Y) u>= X // (1 << Y) u> X or ~(-1 << Y) u>= X or ((1 << Y)+(-1)) u>= X
// Into: // Into:
// (X l>> Y) != 0 // (X l>> Y) != 0
// (X l>> Y) == 0 // (X l>> Y) == 0
static Instruction *foldICmpWithHighBitMask(ICmpInst &Cmp, static Instruction *foldICmpWithHighBitMask(ICmpInst &Cmp,
InstCombiner::BuilderTy &Builder) { InstCombiner::BuilderTy &Builder) {
ICmpInst::Predicate Pred, NewPred; ICmpInst::Predicate Pred, NewPred;
Value *X, *Y; Value *X, *Y;
if (match(&Cmp, if (match(&Cmp,
m_c_ICmp(Pred, m_OneUse(m_Shl(m_One(), m_Value(Y))), m_Value(X)))) { m_c_ICmp(Pred, m_OneUse(m_Shl(m_One(), m_Value(Y))), m_Value(X)))) {
// We want X to be the icmp's second operand, so swap predicate if it isn't. // We want X to be the icmp's second operand, so swap predicate if it isn't.
if (Cmp.getOperand(0) == X) if (Cmp.getOperand(0) == X)
Pred = Cmp.getSwappedPredicate(); Pred = Cmp.getSwappedPredicate();
switch (Pred) { switch (Pred) {
case ICmpInst::ICMP_ULE: case ICmpInst::ICMP_ULE:
NewPred = ICmpInst::ICMP_NE; NewPred = ICmpInst::ICMP_NE;
break; break;
case ICmpInst::ICMP_UGT: case ICmpInst::ICMP_UGT:
NewPred = ICmpInst::ICMP_EQ; NewPred = ICmpInst::ICMP_EQ;
break; break;
default: default:
return nullptr; return nullptr;
} }
} else if (match(&Cmp, } else if (match(&Cmp, m_c_ICmp(Pred,
m_c_ICmp(Pred, m_OneUse(m_CombineOr(
m_OneUse(m_Not(m_Shl(m_AllOnes(), m_Value(Y)))), m_Not(m_Shl(m_AllOnes(), m_Value(Y))),
m_Add(m_Shl(m_One(), m_Value(Y)),
m_AllOnes()))),
m_Value(X)))) { m_Value(X)))) {
// The variant with 'add' is not canonical, (the variant with 'not' is)
// we only get it because it has extra uses, and can't be canonicalized,
// We want X to be the icmp's second operand, so swap predicate if it isn't. // We want X to be the icmp's second operand, so swap predicate if it isn't.
if (Cmp.getOperand(0) == X) if (Cmp.getOperand(0) == X)
Pred = Cmp.getSwappedPredicate(); Pred = Cmp.getSwappedPredicate();
switch (Pred) { switch (Pred) {
case ICmpInst::ICMP_ULT: case ICmpInst::ICMP_ULT:
NewPred = ICmpInst::ICMP_NE; NewPred = ICmpInst::ICMP_NE;
break; break;
▲ Show 20 Lines • Show All 751 Lines • Show Last 20 Lines

llvm/trunk/test/Transforms/InstCombine/icmp-uge-of-add-of-shl-one-by-bits-to-allones-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll

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; ============================================================================ ; ; ============================================================================ ;
; Basic positive tests ; Basic positive tests
; ============================================================================ ; ; ============================================================================ ;
define i1 @p0(i8 %val, i8 %bits) { define i1 @p0(i8 %val, i8 %bits) {
; CHECK-LABEL: @p0( ; CHECK-LABEL: @p0(
; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]]
; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: call void @use8(i8 [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0]], -1 ; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr i8 [[VAL:%.*]], [[BITS]]
; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[T1]], [[VAL:%.*]] ; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[VAL_HIGHBITS]], 0
; CHECK-NEXT: ret i1 [[R]] ; CHECK-NEXT: ret i1 [[R]]
; ;
%t0 = shl i8 1, %bits %t0 = shl i8 1, %bits
call void @use8(i8 %t0) call void @use8(i8 %t0)
%t1 = add i8 %t0, -1 %t1 = add i8 %t0, -1
%r = icmp uge i8 %t1, %val %r = icmp uge i8 %t1, %val
ret i1 %r ret i1 %r
} }
; ============================================================================ ; ; ============================================================================ ;
; Vector tests ; Vector tests
; ============================================================================ ; ; ============================================================================ ;
define <2 x i1> @p1_vec(<2 x i8> %val, <2 x i8> %bits) { define <2 x i1> @p1_vec(<2 x i8> %val, <2 x i8> %bits) {
; CHECK-LABEL: @p1_vec( ; CHECK-LABEL: @p1_vec(
; CHECK-NEXT: [[T0:%.*]] = shl <2 x i8> <i8 1, i8 1>, [[BITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl <2 x i8> <i8 1, i8 1>, [[BITS:%.*]]
; CHECK-NEXT: call void @use2i8(<2 x i8> [[T0]]) ; CHECK-NEXT: call void @use2i8(<2 x i8> [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add <2 x i8> [[T0]], <i8 -1, i8 -1> ; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr <2 x i8> [[VAL:%.*]], [[BITS]]
; CHECK-NEXT: [[R:%.*]] = icmp uge <2 x i8> [[T1]], [[VAL:%.*]] ; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[VAL_HIGHBITS]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[R]] ; CHECK-NEXT: ret <2 x i1> [[R]]
; ;
%t0 = shl <2 x i8> <i8 1, i8 1>, %bits %t0 = shl <2 x i8> <i8 1, i8 1>, %bits
call void @use2i8(<2 x i8> %t0) call void @use2i8(<2 x i8> %t0)
%t1 = add <2 x i8> %t0, <i8 -1, i8 -1> %t1 = add <2 x i8> %t0, <i8 -1, i8 -1>
%r = icmp uge <2 x i8> %t1, %val %r = icmp uge <2 x i8> %t1, %val
ret <2 x i1> %r ret <2 x i1> %r
} }
define <3 x i1> @p2_vec_undef0(<3 x i8> %val, <3 x i8> %bits) { define <3 x i1> @p2_vec_undef0(<3 x i8> %val, <3 x i8> %bits) {
; CHECK-LABEL: @p2_vec_undef0( ; CHECK-LABEL: @p2_vec_undef0(
; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> <i8 1, i8 undef, i8 1>, [[BITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> <i8 1, i8 undef, i8 1>, [[BITS:%.*]]
; CHECK-NEXT: call void @use3i8(<3 x i8> [[T0]]) ; CHECK-NEXT: call void @use3i8(<3 x i8> [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add <3 x i8> [[T0]], <i8 -1, i8 -1, i8 -1> ; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr <3 x i8> [[VAL:%.*]], [[BITS]]
; CHECK-NEXT: [[R:%.*]] = icmp uge <3 x i8> [[T1]], [[VAL:%.*]] ; CHECK-NEXT: [[R:%.*]] = icmp eq <3 x i8> [[VAL_HIGHBITS]], zeroinitializer
; CHECK-NEXT: ret <3 x i1> [[R]] ; CHECK-NEXT: ret <3 x i1> [[R]]
; ;
%t0 = shl <3 x i8> <i8 1, i8 undef, i8 1>, %bits %t0 = shl <3 x i8> <i8 1, i8 undef, i8 1>, %bits
call void @use3i8(<3 x i8> %t0) call void @use3i8(<3 x i8> %t0)
%t1 = add <3 x i8> %t0, <i8 -1, i8 -1, i8 -1> %t1 = add <3 x i8> %t0, <i8 -1, i8 -1, i8 -1>
%r = icmp uge <3 x i8> %t1, %val %r = icmp uge <3 x i8> %t1, %val
ret <3 x i1> %r ret <3 x i1> %r
} }
define <3 x i1> @p2_vec_undef1(<3 x i8> %val, <3 x i8> %bits) { define <3 x i1> @p2_vec_undef1(<3 x i8> %val, <3 x i8> %bits) {
; CHECK-LABEL: @p2_vec_undef1( ; CHECK-LABEL: @p2_vec_undef1(
; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> <i8 1, i8 1, i8 1>, [[BITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> <i8 1, i8 1, i8 1>, [[BITS:%.*]]
; CHECK-NEXT: call void @use3i8(<3 x i8> [[T0]]) ; CHECK-NEXT: call void @use3i8(<3 x i8> [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add <3 x i8> [[T0]], <i8 -1, i8 undef, i8 -1> ; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr <3 x i8> [[VAL:%.*]], [[BITS]]
; CHECK-NEXT: [[R:%.*]] = icmp uge <3 x i8> [[T1]], [[VAL:%.*]] ; CHECK-NEXT: [[R:%.*]] = icmp eq <3 x i8> [[VAL_HIGHBITS]], zeroinitializer
; CHECK-NEXT: ret <3 x i1> [[R]] ; CHECK-NEXT: ret <3 x i1> [[R]]
; ;
%t0 = shl <3 x i8> <i8 1, i8 1, i8 1>, %bits %t0 = shl <3 x i8> <i8 1, i8 1, i8 1>, %bits
call void @use3i8(<3 x i8> %t0) call void @use3i8(<3 x i8> %t0)
%t1 = add <3 x i8> %t0, <i8 -1, i8 undef, i8 -1> %t1 = add <3 x i8> %t0, <i8 -1, i8 undef, i8 -1>
%r = icmp uge <3 x i8> %t1, %val %r = icmp uge <3 x i8> %t1, %val
ret <3 x i1> %r ret <3 x i1> %r
} }
define <3 x i1> @p2_vec_undef2(<3 x i8> %val, <3 x i8> %bits) { define <3 x i1> @p2_vec_undef2(<3 x i8> %val, <3 x i8> %bits) {
; CHECK-LABEL: @p2_vec_undef2( ; CHECK-LABEL: @p2_vec_undef2(
; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> <i8 1, i8 undef, i8 1>, [[BITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> <i8 1, i8 undef, i8 1>, [[BITS:%.*]]
; CHECK-NEXT: call void @use3i8(<3 x i8> [[T0]]) ; CHECK-NEXT: call void @use3i8(<3 x i8> [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add <3 x i8> [[T0]], <i8 -1, i8 undef, i8 -1> ; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr <3 x i8> [[VAL:%.*]], [[BITS]]
; CHECK-NEXT: [[R:%.*]] = icmp uge <3 x i8> [[T1]], [[VAL:%.*]] ; CHECK-NEXT: [[R:%.*]] = icmp eq <3 x i8> [[VAL_HIGHBITS]], zeroinitializer
; CHECK-NEXT: ret <3 x i1> [[R]] ; CHECK-NEXT: ret <3 x i1> [[R]]
; ;
%t0 = shl <3 x i8> <i8 1, i8 undef, i8 1>, %bits %t0 = shl <3 x i8> <i8 1, i8 undef, i8 1>, %bits
call void @use3i8(<3 x i8> %t0) call void @use3i8(<3 x i8> %t0)
%t1 = add <3 x i8> %t0, <i8 -1, i8 undef, i8 -1> %t1 = add <3 x i8> %t0, <i8 -1, i8 undef, i8 -1>
%r = icmp uge <3 x i8> %t1, %val %r = icmp uge <3 x i8> %t1, %val
ret <3 x i1> %r ret <3 x i1> %r
} }
; ============================================================================ ; ; ============================================================================ ;
; Commutativity tests. ; Commutativity tests.
; ============================================================================ ; ; ============================================================================ ;
declare i8 @gen8() declare i8 @gen8()
define i1 @c0(i8 %bits) { define i1 @c0(i8 %bits) {
; CHECK-LABEL: @c0( ; CHECK-LABEL: @c0(
; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]]
; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: call void @use8(i8 [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0]], -1
; CHECK-NEXT: [[VAL:%.*]] = call i8 @gen8() ; CHECK-NEXT: [[VAL:%.*]] = call i8 @gen8()
; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[VAL]], [[T1]] ; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr i8 [[VAL]], [[BITS]]
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[VAL_HIGHBITS]], 0
; CHECK-NEXT: ret i1 [[R]] ; CHECK-NEXT: ret i1 [[R]]
; ;
%t0 = shl i8 1, %bits %t0 = shl i8 1, %bits
call void @use8(i8 %t0) call void @use8(i8 %t0)
%t1 = add i8 %t0, -1 %t1 = add i8 %t0, -1
%val = call i8 @gen8() %val = call i8 @gen8()
%r = icmp ule i8 %val, %t1 ; swapped order and predicate %r = icmp ule i8 %val, %t1 ; swapped order and predicate
ret i1 %r ret i1 %r
} }
; What if we have the same pattern on both sides? ; What if we have the same pattern on both sides?
define i1 @both(i8 %bits0, i8 %bits1) { define i1 @both(i8 %bits0, i8 %bits1) {
; CHECK-LABEL: @both( ; CHECK-LABEL: @both(
; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS0:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS0:%.*]]
; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: call void @use8(i8 [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0]], -1
; CHECK-NEXT: [[T2:%.*]] = shl i8 1, [[BITS1:%.*]] ; CHECK-NEXT: [[T2:%.*]] = shl i8 1, [[BITS1:%.*]]
; CHECK-NEXT: call void @use8(i8 [[T2]]) ; CHECK-NEXT: call void @use8(i8 [[T2]])
; CHECK-NEXT: [[T3:%.*]] = add i8 [[T2]], -1 ; CHECK-NEXT: [[T3:%.*]] = add i8 [[T2]], -1
; CHECK-NEXT: [[R:%.*]] = icmp uge i8 [[T1]], [[T3]] ; CHECK-NEXT: [[T3_HIGHBITS:%.*]] = lshr i8 [[T3]], [[BITS0]]
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[T3_HIGHBITS]], 0
; CHECK-NEXT: ret i1 [[R]] ; CHECK-NEXT: ret i1 [[R]]
; ;
%t0 = shl i8 1, %bits0 %t0 = shl i8 1, %bits0
call void @use8(i8 %t0) call void @use8(i8 %t0)
%t1 = add i8 %t0, -1 %t1 = add i8 %t0, -1
%t2 = shl i8 1, %bits1 %t2 = shl i8 1, %bits1
call void @use8(i8 %t2) call void @use8(i8 %t2)
%t3 = add i8 %t2, -1 %t3 = add i8 %t2, -1
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llvm/trunk/test/Transforms/InstCombine/icmp-ult-of-add-of-shl-one-by-bits-to-allones-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll

Show All 16 Lines
; ============================================================================ ; ; ============================================================================ ;
; Basic positive tests ; Basic positive tests
; ============================================================================ ; ; ============================================================================ ;
define i1 @p0(i8 %val, i8 %bits) { define i1 @p0(i8 %val, i8 %bits) {
; CHECK-LABEL: @p0( ; CHECK-LABEL: @p0(
; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]]
; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: call void @use8(i8 [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0]], -1 ; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr i8 [[VAL:%.*]], [[BITS]]
; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[T1]], [[VAL:%.*]] ; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[VAL_HIGHBITS]], 0
; CHECK-NEXT: ret i1 [[R]] ; CHECK-NEXT: ret i1 [[R]]
; ;
%t0 = shl i8 1, %bits %t0 = shl i8 1, %bits
call void @use8(i8 %t0) call void @use8(i8 %t0)
%t1 = add i8 %t0, -1 %t1 = add i8 %t0, -1
%r = icmp ult i8 %t1, %val %r = icmp ult i8 %t1, %val
ret i1 %r ret i1 %r
} }
; ============================================================================ ; ; ============================================================================ ;
; Vector tests ; Vector tests
; ============================================================================ ; ; ============================================================================ ;
define <2 x i1> @p1_vec(<2 x i8> %val, <2 x i8> %bits) { define <2 x i1> @p1_vec(<2 x i8> %val, <2 x i8> %bits) {
; CHECK-LABEL: @p1_vec( ; CHECK-LABEL: @p1_vec(
; CHECK-NEXT: [[T0:%.*]] = shl <2 x i8> <i8 1, i8 1>, [[BITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl <2 x i8> <i8 1, i8 1>, [[BITS:%.*]]
; CHECK-NEXT: call void @use2i8(<2 x i8> [[T0]]) ; CHECK-NEXT: call void @use2i8(<2 x i8> [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add <2 x i8> [[T0]], <i8 -1, i8 -1> ; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr <2 x i8> [[VAL:%.*]], [[BITS]]
; CHECK-NEXT: [[R:%.*]] = icmp ult <2 x i8> [[T1]], [[VAL:%.*]] ; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[VAL_HIGHBITS]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[R]] ; CHECK-NEXT: ret <2 x i1> [[R]]
; ;
%t0 = shl <2 x i8> <i8 1, i8 1>, %bits %t0 = shl <2 x i8> <i8 1, i8 1>, %bits
call void @use2i8(<2 x i8> %t0) call void @use2i8(<2 x i8> %t0)
%t1 = add <2 x i8> %t0, <i8 -1, i8 -1> %t1 = add <2 x i8> %t0, <i8 -1, i8 -1>
%r = icmp ult <2 x i8> %t1, %val %r = icmp ult <2 x i8> %t1, %val
ret <2 x i1> %r ret <2 x i1> %r
} }
define <3 x i1> @p2_vec_undef0(<3 x i8> %val, <3 x i8> %bits) { define <3 x i1> @p2_vec_undef0(<3 x i8> %val, <3 x i8> %bits) {
; CHECK-LABEL: @p2_vec_undef0( ; CHECK-LABEL: @p2_vec_undef0(
; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> <i8 1, i8 undef, i8 1>, [[BITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> <i8 1, i8 undef, i8 1>, [[BITS:%.*]]
; CHECK-NEXT: call void @use3i8(<3 x i8> [[T0]]) ; CHECK-NEXT: call void @use3i8(<3 x i8> [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add <3 x i8> [[T0]], <i8 -1, i8 -1, i8 -1> ; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr <3 x i8> [[VAL:%.*]], [[BITS]]
; CHECK-NEXT: [[R:%.*]] = icmp ult <3 x i8> [[T1]], [[VAL:%.*]] ; CHECK-NEXT: [[R:%.*]] = icmp ne <3 x i8> [[VAL_HIGHBITS]], zeroinitializer
; CHECK-NEXT: ret <3 x i1> [[R]] ; CHECK-NEXT: ret <3 x i1> [[R]]
; ;
%t0 = shl <3 x i8> <i8 1, i8 undef, i8 1>, %bits %t0 = shl <3 x i8> <i8 1, i8 undef, i8 1>, %bits
call void @use3i8(<3 x i8> %t0) call void @use3i8(<3 x i8> %t0)
%t1 = add <3 x i8> %t0, <i8 -1, i8 -1, i8 -1> %t1 = add <3 x i8> %t0, <i8 -1, i8 -1, i8 -1>
%r = icmp ult <3 x i8> %t1, %val %r = icmp ult <3 x i8> %t1, %val
ret <3 x i1> %r ret <3 x i1> %r
} }
define <3 x i1> @p2_vec_undef1(<3 x i8> %val, <3 x i8> %bits) { define <3 x i1> @p2_vec_undef1(<3 x i8> %val, <3 x i8> %bits) {
; CHECK-LABEL: @p2_vec_undef1( ; CHECK-LABEL: @p2_vec_undef1(
; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> <i8 1, i8 1, i8 1>, [[BITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> <i8 1, i8 1, i8 1>, [[BITS:%.*]]
; CHECK-NEXT: call void @use3i8(<3 x i8> [[T0]]) ; CHECK-NEXT: call void @use3i8(<3 x i8> [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add <3 x i8> [[T0]], <i8 -1, i8 undef, i8 -1> ; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr <3 x i8> [[VAL:%.*]], [[BITS]]
; CHECK-NEXT: [[R:%.*]] = icmp ult <3 x i8> [[T1]], [[VAL:%.*]] ; CHECK-NEXT: [[R:%.*]] = icmp ne <3 x i8> [[VAL_HIGHBITS]], zeroinitializer
; CHECK-NEXT: ret <3 x i1> [[R]] ; CHECK-NEXT: ret <3 x i1> [[R]]
; ;
%t0 = shl <3 x i8> <i8 1, i8 1, i8 1>, %bits %t0 = shl <3 x i8> <i8 1, i8 1, i8 1>, %bits
call void @use3i8(<3 x i8> %t0) call void @use3i8(<3 x i8> %t0)
%t1 = add <3 x i8> %t0, <i8 -1, i8 undef, i8 -1> %t1 = add <3 x i8> %t0, <i8 -1, i8 undef, i8 -1>
%r = icmp ult <3 x i8> %t1, %val %r = icmp ult <3 x i8> %t1, %val
ret <3 x i1> %r ret <3 x i1> %r
} }
define <3 x i1> @p2_vec_undef2(<3 x i8> %val, <3 x i8> %bits) { define <3 x i1> @p2_vec_undef2(<3 x i8> %val, <3 x i8> %bits) {
; CHECK-LABEL: @p2_vec_undef2( ; CHECK-LABEL: @p2_vec_undef2(
; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> <i8 1, i8 undef, i8 1>, [[BITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i8> <i8 1, i8 undef, i8 1>, [[BITS:%.*]]
; CHECK-NEXT: call void @use3i8(<3 x i8> [[T0]]) ; CHECK-NEXT: call void @use3i8(<3 x i8> [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add <3 x i8> [[T0]], <i8 -1, i8 undef, i8 -1> ; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr <3 x i8> [[VAL:%.*]], [[BITS]]
; CHECK-NEXT: [[R:%.*]] = icmp ult <3 x i8> [[T1]], [[VAL:%.*]] ; CHECK-NEXT: [[R:%.*]] = icmp ne <3 x i8> [[VAL_HIGHBITS]], zeroinitializer
; CHECK-NEXT: ret <3 x i1> [[R]] ; CHECK-NEXT: ret <3 x i1> [[R]]
; ;
%t0 = shl <3 x i8> <i8 1, i8 undef, i8 1>, %bits %t0 = shl <3 x i8> <i8 1, i8 undef, i8 1>, %bits
call void @use3i8(<3 x i8> %t0) call void @use3i8(<3 x i8> %t0)
%t1 = add <3 x i8> %t0, <i8 -1, i8 undef, i8 -1> %t1 = add <3 x i8> %t0, <i8 -1, i8 undef, i8 -1>
%r = icmp ult <3 x i8> %t1, %val %r = icmp ult <3 x i8> %t1, %val
ret <3 x i1> %r ret <3 x i1> %r
} }
; ============================================================================ ; ; ============================================================================ ;
; Commutativity tests. ; Commutativity tests.
; ============================================================================ ; ; ============================================================================ ;
declare i8 @gen8() declare i8 @gen8()
define i1 @c0(i8 %bits) { define i1 @c0(i8 %bits) {
; CHECK-LABEL: @c0( ; CHECK-LABEL: @c0(
; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS:%.*]]
; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: call void @use8(i8 [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0]], -1
; CHECK-NEXT: [[VAL:%.*]] = call i8 @gen8() ; CHECK-NEXT: [[VAL:%.*]] = call i8 @gen8()
; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[VAL]], [[T1]] ; CHECK-NEXT: [[VAL_HIGHBITS:%.*]] = lshr i8 [[VAL]], [[BITS]]
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[VAL_HIGHBITS]], 0
; CHECK-NEXT: ret i1 [[R]] ; CHECK-NEXT: ret i1 [[R]]
; ;
%t0 = shl i8 1, %bits %t0 = shl i8 1, %bits
call void @use8(i8 %t0) call void @use8(i8 %t0)
%t1 = add i8 %t0, -1 %t1 = add i8 %t0, -1
%val = call i8 @gen8() %val = call i8 @gen8()
%r = icmp ugt i8 %val, %t1 ; swapped order and predicate %r = icmp ugt i8 %val, %t1 ; swapped order and predicate
ret i1 %r ret i1 %r
} }
; What if we have the same pattern on both sides? ; What if we have the same pattern on both sides?
define i1 @both(i8 %bits0, i8 %bits1) { define i1 @both(i8 %bits0, i8 %bits1) {
; CHECK-LABEL: @both( ; CHECK-LABEL: @both(
; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS0:%.*]] ; CHECK-NEXT: [[T0:%.*]] = shl i8 1, [[BITS0:%.*]]
; CHECK-NEXT: call void @use8(i8 [[T0]]) ; CHECK-NEXT: call void @use8(i8 [[T0]])
; CHECK-NEXT: [[T1:%.*]] = add i8 [[T0]], -1
; CHECK-NEXT: [[T2:%.*]] = shl i8 1, [[BITS1:%.*]] ; CHECK-NEXT: [[T2:%.*]] = shl i8 1, [[BITS1:%.*]]
; CHECK-NEXT: call void @use8(i8 [[T2]]) ; CHECK-NEXT: call void @use8(i8 [[T2]])
; CHECK-NEXT: [[T3:%.*]] = add i8 [[T2]], -1 ; CHECK-NEXT: [[T3:%.*]] = add i8 [[T2]], -1
; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[T1]], [[T3]] ; CHECK-NEXT: [[T3_HIGHBITS:%.*]] = lshr i8 [[T3]], [[BITS0]]
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[T3_HIGHBITS]], 0
; CHECK-NEXT: ret i1 [[R]] ; CHECK-NEXT: ret i1 [[R]]
; ;
%t0 = shl i8 1, %bits0 %t0 = shl i8 1, %bits0
call void @use8(i8 %t0) call void @use8(i8 %t0)
%t1 = add i8 %t0, -1 %t1 = add i8 %t0, -1
%t2 = shl i8 1, %bits1 %t2 = shl i8 1, %bits1
call void @use8(i8 %t2) call void @use8(i8 %t2)
%t3 = add i8 %t2, -1 %t3 = add i8 %t2, -1
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