Add check for tied operands

[sidneym]

Summary

The "tied" attribute was not being checked.
When the registers mismatched no error is generated unless asserts are enabled.

[kparzysz]

In the longer term we should probably make the error messages more self-explanatory.

[bcain]

llvm/trunk/test/MC/Hexagon/tied-ops.s

1

I think you should use this run line instead:

# RUN: not llvm-mc -arch=hexagon -filetype=asm %s 2>%t; FileCheck --implicit-check-not="error:" %s <%t

llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp

default:
     break;
   case Match_Success:
     return false;
   case Match_MissingFeature:
     return Error(IDLoc, "invalid instruction");
   case Match_MnemonicFail:
     return Error(IDLoc, "unrecognized instruction");
   case Match_InvalidOperand:
+  case Match_InvalidTiedOperand:
     SMLoc ErrorLoc = IDLoc;
     if (ErrorInfo != ~0U) {
       if (ErrorInfo >= InstOperands.size())
         return Error(IDLoc, "too few operands for instruction");
 
       ErrorLoc = (static_cast<HexagonOperand *>(InstOperands[ErrorInfo].get()))
                      ->getStartLoc();
       if (ErrorLoc == SMLoc())

llvm/trunk/test/MC/Hexagon/tied-ops.s

+# RUN: llvm-mc -arch=hexagon -filetype=asm %s 2> %t; FileCheck %s < %t
+
+# Check that tied operands are caught
+
+  { r0 = sub(##_start, asl(r1, #1)) }
+# CHECK: error: invalid operand for instruction