This is an archive of the discontinued LLVM Phabricator instance.

[SelectionDAG][X86] Reorder the operands the MaskedStoreSDNode to put the value first.
ClosedPublic

Authored by craig.topper on Aug 7 2018, 12:13 PM.

Details

Summary

Previously the value being stored is the last operand in SDNode. This causes the type legalizer to visit the mask operand before the value operand. The type legalizer was more complicated because of this since we want the type of the value to drive the decisions.

This patch moves the value to be the first operand so we visit it first during type legalization. It also simplifies the type legalization code accordingly.

X86 is currently the only in tree target that uses this SDNode. Not sure if there are any users out of tree.

Diff Detail

Repository
rL LLVM

Event Timeline

craig.topper created this revision.Aug 7 2018, 12:13 PM
RKSimon added inline comments.Aug 12 2018, 6:44 AM
include/llvm/CodeGen/SelectionDAGNodes.h
2150 ↗(On Diff #159566)

Are these going to cause compiler warnings wrt the MaskedLoadStoreSDNode equivalents?

craig.topper added inline comments.Aug 12 2018, 6:24 PM
include/llvm/CodeGen/SelectionDAGNodes.h
2150 ↗(On Diff #159566)

I don't think so.

RKSimon accepted this revision.Aug 25 2018, 4:34 AM

LGTM

This revision is now accepted and ready to land.Aug 25 2018, 4:34 AM
This revision was automatically updated to reflect the committed changes.