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[X86] Preserve more liveness information in emitStackProbeInline
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Authored by thegameg on Jul 30 2018, 3:32 PM.

Details

Summary

This commit fixes two issues with the liveness information after the call:

  1. The code always spills RCX and RDX if InProlog == true, which results in a use of undefined phys reg.
  2. FinalReg, JoinReg, RoundedReg, SizeReg are not added as live-ins to the basic blocks that use them, therefore they are seen undefined.

PR38376

Diff Detail

Event Timeline

thegameg created this revision.Jul 30 2018, 3:32 PM
MatzeB accepted this revision.Jul 30 2018, 3:59 PM

Thanks for fixing machine verifier errors, LGTM.

PR38376

You can put https://llvm.org/PR38376 into the commit message so it becomes a clickable link in some terminal emulators or e-mail clients.

lib/Target/X86/X86FrameLowering.cpp
619–621

Can you explicitely state the assumption that no earlier prolog instruction changes RCX/RDX so that checking the block live-ins is enough?

This revision is now accepted and ready to land.Jul 30 2018, 3:59 PM
This revision was automatically updated to reflect the committed changes.
thegameg marked an inline comment as done.
rnk added a comment.Jul 31 2018, 10:45 AM

Thank you!