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Differential D48149

Expand constrained FP POWI
ClosedPublic

Authored by cameron.mcinally on Jun 13 2018, 1:29 PM.

Details

Reviewers
andrew.w.kaylor
craig.topper
uweigand
hfinkel
Commits
rG7caac670b223: [FPEnv] Expand constrained FP POWI
rL334863: [FPEnv] Expand constrained FP POWI
Summary

This is a continuation of D47491...

POWI is an oddball math intrinsic since its 2nd argument is always a scalar integer. Add a helper function to expand STRICT_FPOWI.

Also, update the SmallVector value for both ExpandStrictFPPOWI(...) and ExpandStrictFPOp(...). The new value, 32, was chosen assuming 1024b vectors with 32b FP being the smallest element size. Special thanks to Andy for decoding how SmallVector works.

Diff Detail

Repository
rL LLVM

Event Timeline

cameron.mcinally created this revision.Jun 13 2018, 1:29 PM
Herald added a subscriber: llvm-commits. · View Herald TranscriptJun 13 2018, 1:29 PM
craig.topper added inline comments.Jun 13 2018, 1:44 PM
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
1154 ↗(On Diff #151237)

Why couldn't we just detect that the type of Op.getOperand(j) is a scalar type and skip the extract? Then you could handle POWI in in this code without the separate function. Maybe with some asserts to ensure that type is vector everything but the last operand of POWI.

1192 ↗(On Diff #151237)

There's no reason for Opers to be a SmallVector.

You could just do

SDValue Opers[] = { Chain, Base, Power };
test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
337 ↗(On Diff #151237)

FMA is missing? I didn't catch it in the other patch.

342 ↗(On Diff #151237)

sqrt.v4f64 doesn't appear to be used.

craig.topper added inline comments.Jun 13 2018, 1:48 PM
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
729 ↗(On Diff #151237)

Should STRICT_FMUL/DIV/ADD/SUB be here even though I don't know how to test them? If some target did it someday, we would end up the default case which would do the wrong thing.

cameron.mcinally added inline comments.Jun 13 2018, 2:21 PM
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
729 ↗(On Diff #151237)

Ah, you're right. That's a typo.

There could definitely be a RISC-like target without vector arith ops.

1154 ↗(On Diff #151237)

Good call. I was hung up on checking the FPOWI opcode and missed the obvious...

test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
337 ↗(On Diff #151237)

I'll add those...

342 ↗(On Diff #151237)

It's debugging junk. I'll remove it.

cameron.mcinally added inline comments.Jun 13 2018, 2:28 PM
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
729 ↗(On Diff #151237)

These are also missing from SelectionDAGLegalize::LegalizeOp(...). I'll roll that change into this one, if there are no objections.

cameron.mcinally updated this revision to Diff 151263.Jun 13 2018, 3:38 PM

Suffering a little bit of project creep fixing up bits of code I pass on the way, but I think I've incorporated all of Craig's suggestions. Thanks again, Craig.

Also added two FMA tests and pulled the RUN lines from test/CodeGen/X86/fp-intrinsics.ll. I hope that is okay...

cameron.mcinally marked 10 inline comments as done.Jun 13 2018, 3:41 PM
cameron.mcinally added inline comments.
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
1154 ↗(On Diff #151237)

I made this change, but purposefully did not add an ASSERT checking for POWI. I suspect the fix I made is general enough. And, we might possibly see similar arguments when we get to the CMP/CVT/etc intrinsics. Okay with you, Craig?

1192 ↗(On Diff #151237)

This whole function was removed.

cameron.mcinally marked 4 inline comments as done.Jun 13 2018, 3:44 PM
cameron.mcinally added inline comments.Jun 13 2018, 3:59 PM
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
1154 ↗(On Diff #151237)

Should Op.getOperand(j) be snapped into a temp since there is more than one use? I'm not sure of the LLVM coding standards on that.

craig.topper added inline comments.Jun 13 2018, 4:42 PM
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
1154 ↗(On Diff #151237)

Yeah start with

SDValue Oper = Op.getOperand(j)

Then if its a vector just

Oper = DAG.getNodE(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Oper, Idx)

Then you don't need the else at all.

cameron.mcinally updated this revision to Diff 151298.Jun 13 2018, 8:27 PM

Create a temp for Op.getOperand(j).

cameron.mcinally marked an inline comment as done.Jun 13 2018, 8:27 PM
craig.topper accepted this revision.Jun 15 2018, 10:52 AM

LGTM

This revision is now accepted and ready to land.Jun 15 2018, 10:52 AM
Closed by commit rL334863: [FPEnv] Expand constrained FP POWI (authored by mcinally). · Explain WhyJun 15 2018, 2:04 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
include/
llvm/
CodeGen/
4 lines
lib/
CodeGen/
SelectionDAG/
4 lines
22 lines
test/
CodeGen/
X86/
4 lines
629 lines

Diff 151559

llvm/trunk/include/llvm/CodeGen/TargetLowering.h

Show First 20 Lines • Show All 765 Lines • ▼ Show 20 Lines LegalizeAction getOperationAction(unsigned Op, EVT VT) const {
if (Op >= array_lengthof(OpActions[0])) return Custom; if (Op >= array_lengthof(OpActions[0])) return Custom;
return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op]; return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op];
} }
LegalizeAction getStrictFPOperationAction(unsigned Op, EVT VT) const { LegalizeAction getStrictFPOperationAction(unsigned Op, EVT VT) const {
unsigned EqOpc; unsigned EqOpc;
switch (Op) { switch (Op) {
default: llvm_unreachable("Unexpected FP pseudo-opcode"); default: llvm_unreachable("Unexpected FP pseudo-opcode");
case ISD::STRICT_FADD: EqOpc = ISD::FADD; break;
case ISD::STRICT_FSUB: EqOpc = ISD::FSUB; break;
case ISD::STRICT_FMUL: EqOpc = ISD::FMUL; break;
case ISD::STRICT_FDIV: EqOpc = ISD::FDIV; break;
case ISD::STRICT_FSQRT: EqOpc = ISD::FSQRT; break; case ISD::STRICT_FSQRT: EqOpc = ISD::FSQRT; break;
case ISD::STRICT_FPOW: EqOpc = ISD::FPOW; break; case ISD::STRICT_FPOW: EqOpc = ISD::FPOW; break;
case ISD::STRICT_FPOWI: EqOpc = ISD::FPOWI; break; case ISD::STRICT_FPOWI: EqOpc = ISD::FPOWI; break;
case ISD::STRICT_FMA: EqOpc = ISD::FMA; break; case ISD::STRICT_FMA: EqOpc = ISD::FMA; break;
case ISD::STRICT_FSIN: EqOpc = ISD::FSIN; break; case ISD::STRICT_FSIN: EqOpc = ISD::FSIN; break;
case ISD::STRICT_FCOS: EqOpc = ISD::FCOS; break; case ISD::STRICT_FCOS: EqOpc = ISD::FCOS; break;
case ISD::STRICT_FEXP: EqOpc = ISD::FEXP; break; case ISD::STRICT_FEXP: EqOpc = ISD::FEXP; break;
case ISD::STRICT_FEXP2: EqOpc = ISD::FEXP2; break; case ISD::STRICT_FEXP2: EqOpc = ISD::FEXP2; break;
▲ Show 20 Lines • Show All 2,886 Lines • Show Last 20 Lines

llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Show First 20 Lines • Show All 1,084 Lines • ▼ Show 20 Lines if (Action == TargetLowering::Expand) {
SDValue NewVal; SDValue NewVal;
NewVal = DAG.getNode(ISD::TRAP, SDLoc(Node), Node->getVTList(), NewVal = DAG.getNode(ISD::TRAP, SDLoc(Node), Node->getVTList(),
Node->getOperand(0)); Node->getOperand(0));
ReplaceNode(Node, NewVal.getNode()); ReplaceNode(Node, NewVal.getNode());
LegalizeOp(NewVal.getNode()); LegalizeOp(NewVal.getNode());
return; return;
} }
break; break;
case ISD::STRICT_FADD:
case ISD::STRICT_FSUB:
case ISD::STRICT_FMUL:
case ISD::STRICT_FDIV:
case ISD::STRICT_FSQRT: case ISD::STRICT_FSQRT:
case ISD::STRICT_FMA: case ISD::STRICT_FMA:
case ISD::STRICT_FPOW: case ISD::STRICT_FPOW:
case ISD::STRICT_FPOWI: case ISD::STRICT_FPOWI:
case ISD::STRICT_FSIN: case ISD::STRICT_FSIN:
case ISD::STRICT_FCOS: case ISD::STRICT_FCOS:
case ISD::STRICT_FEXP: case ISD::STRICT_FEXP:
case ISD::STRICT_FEXP2: case ISD::STRICT_FEXP2:
▲ Show 20 Lines • Show All 3,689 Lines • Show Last 20 Lines

llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

Show First 20 Lines • Show All 287 Lines • ▼ Show 20 Lines for (SDNode::value_iterator J = Node->value_begin(), E = Node->value_end();
HasVectorValue |= J->isVector(); HasVectorValue |= J->isVector();
if (!HasVectorValue) if (!HasVectorValue)
return TranslateLegalizeResults(Op, Result); return TranslateLegalizeResults(Op, Result);
TargetLowering::LegalizeAction Action = TargetLowering::Legal; TargetLowering::LegalizeAction Action = TargetLowering::Legal;
switch (Op.getOpcode()) { switch (Op.getOpcode()) {
default: default:
return TranslateLegalizeResults(Op, Result); return TranslateLegalizeResults(Op, Result);
case ISD::STRICT_FADD:
case ISD::STRICT_FSUB:
case ISD::STRICT_FMUL:
case ISD::STRICT_FDIV:
case ISD::STRICT_FSQRT: case ISD::STRICT_FSQRT:
case ISD::STRICT_FMA: case ISD::STRICT_FMA:
case ISD::STRICT_FPOW: case ISD::STRICT_FPOW:
case ISD::STRICT_FPOWI: case ISD::STRICT_FPOWI:
case ISD::STRICT_FSIN: case ISD::STRICT_FSIN:
case ISD::STRICT_FCOS: case ISD::STRICT_FCOS:
case ISD::STRICT_FEXP: case ISD::STRICT_FEXP:
case ISD::STRICT_FEXP2: case ISD::STRICT_FEXP2:
▲ Show 20 Lines • Show All 416 Lines • ▼ Show 20 Lines case ISD::SETCC:
return UnrollVSETCC(Op); return UnrollVSETCC(Op);
case ISD::BITREVERSE: case ISD::BITREVERSE:
return ExpandBITREVERSE(Op); return ExpandBITREVERSE(Op);
case ISD::CTLZ: case ISD::CTLZ:
case ISD::CTLZ_ZERO_UNDEF: case ISD::CTLZ_ZERO_UNDEF:
return ExpandCTLZ(Op); return ExpandCTLZ(Op);
case ISD::CTTZ_ZERO_UNDEF: case ISD::CTTZ_ZERO_UNDEF:
return ExpandCTTZ_ZERO_UNDEF(Op); return ExpandCTTZ_ZERO_UNDEF(Op);
case ISD::STRICT_FADD:
case ISD::STRICT_FSUB:
case ISD::STRICT_FMUL:
case ISD::STRICT_FDIV:
case ISD::STRICT_FSQRT: case ISD::STRICT_FSQRT:
case ISD::STRICT_FMA: case ISD::STRICT_FMA:
case ISD::STRICT_FPOW: case ISD::STRICT_FPOW:
case ISD::STRICT_FPOWI:
case ISD::STRICT_FSIN: case ISD::STRICT_FSIN:
case ISD::STRICT_FCOS: case ISD::STRICT_FCOS:
case ISD::STRICT_FEXP: case ISD::STRICT_FEXP:
case ISD::STRICT_FEXP2: case ISD::STRICT_FEXP2:
case ISD::STRICT_FLOG: case ISD::STRICT_FLOG:
case ISD::STRICT_FLOG10: case ISD::STRICT_FLOG10:
case ISD::STRICT_FLOG2: case ISD::STRICT_FLOG2:
case ISD::STRICT_FRINT: case ISD::STRICT_FRINT:
▲ Show 20 Lines • Show All 390 Lines • ▼ Show 20 LinesSDValue VectorLegalizer::ExpandStrictFPOp(SDValue Op) {
EVT EltVT = VT.getVectorElementType(); EVT EltVT = VT.getVectorElementType();
unsigned NumElems = VT.getVectorNumElements(); unsigned NumElems = VT.getVectorNumElements();
unsigned NumOpers = Op.getNumOperands(); unsigned NumOpers = Op.getNumOperands();
const TargetLowering &TLI = DAG.getTargetLoweringInfo(); const TargetLowering &TLI = DAG.getTargetLoweringInfo();
EVT ValueVTs[] = {EltVT, MVT::Other}; EVT ValueVTs[] = {EltVT, MVT::Other};
SDValue Chain = Op.getOperand(0); SDValue Chain = Op.getOperand(0);
SDLoc dl(Op); SDLoc dl(Op);
SmallVector<SDValue, 8> OpValues; SmallVector<SDValue, 32> OpValues;
SmallVector<SDValue, 8> OpChains; SmallVector<SDValue, 32> OpChains;
for (unsigned i = 0; i < NumElems; ++i) { for (unsigned i = 0; i < NumElems; ++i) {
SmallVector<SDValue, 4> Opers; SmallVector<SDValue, 4> Opers;
SDValue Idx = DAG.getConstant(i, dl, SDValue Idx = DAG.getConstant(i, dl,
TLI.getVectorIdxTy(DAG.getDataLayout())); TLI.getVectorIdxTy(DAG.getDataLayout()));
// The Chain is the first operand. // The Chain is the first operand.
Opers.push_back(Chain); Opers.push_back(Chain);
// Now process the remaining operands. // Now process the remaining operands.
for (unsigned j = 1; j < NumOpers; ++j) { for (unsigned j = 1; j < NumOpers; ++j) {
SDValue Oper = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, SDValue Oper = Op.getOperand(j);
EltVT, Op.getOperand(j), Idx); EVT OperVT = Oper.getValueType();
if (OperVT.isVector())
Oper = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
EltVT, Oper, Idx);
Opers.push_back(Oper); Opers.push_back(Oper);
} }
SDValue ScalarOp = DAG.getNode(Op->getOpcode(), dl, ValueVTs, Opers); SDValue ScalarOp = DAG.getNode(Op->getOpcode(), dl, ValueVTs, Opers);
OpValues.push_back(ScalarOp.getValue(0)); OpValues.push_back(ScalarOp.getValue(0));
OpChains.push_back(ScalarOp.getValue(1)); OpChains.push_back(ScalarOp.getValue(1));
} }
Show All 40 Lines

llvm/trunk/test/CodeGen/X86/fp-intrinsics.ll

Show All 27 Lines
; // downward, this shouldn't be simplified. ; // downward, this shouldn't be simplified.
; return a - 0; ; return a - 0;
; } ; }
; ;
; CHECK-LABEL: f2 ; CHECK-LABEL: f2
; COMMON: subsd ; COMMON: subsd
define double @f2(double %a) { define double @f2(double %a) {
entry: entry:
%div = call double @llvm.experimental.constrained.fsub.f64( %sub = call double @llvm.experimental.constrained.fsub.f64(
double %a, double %a,
double 0.000000e+00, double 0.000000e+00,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret double %div ret double %sub
} }
; Verify that '-((-a)*b)' isn't simplified to 'a*b' when the rounding mode is ; Verify that '-((-a)*b)' isn't simplified to 'a*b' when the rounding mode is
; unknown. ; unknown.
; ;
; double f3(double a, double b) { ; double f3(double a, double b) {
; // Because the intermediate value involved in this calculation may require ; // Because the intermediate value involved in this calculation may require
; // rounding, this shouldn't be simplified. ; // rounding, this shouldn't be simplified.
▲ Show 20 Lines • Show All 246 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O3 -mtriple=x86_64-pc-linux < %s | FileCheck %s ; RUN: llc -O3 -mtriple=x86_64-pc-linux < %s | FileCheck --check-prefix=COMMON --check-prefix=NO-FMA --check-prefix=FMACALL64 --check-prefix=FMACALL32 %s
; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+fma < %s | FileCheck -check-prefix=COMMON --check-prefix=HAS-FMA --check-prefix=FMA64 --check-prefix=FMA32 %s
define <2 x double> @constrained_vector_fdiv() { define <2 x double> @constrained_vector_fdiv() {
; CHECK-LABEL: constrained_vector_fdiv: ; NO-FMA-LABEL: constrained_vector_fdiv:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.000000e+00,2.000000e+00] ; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [1.000000e+00,2.000000e+00]
; CHECK-NEXT: divpd {{.*}}(%rip), %xmm0 ; NO-FMA-NEXT: divpd {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_fdiv:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm0 = [1.000000e+00,2.000000e+00]
; HAS-FMA-NEXT: vdivpd {{.*}}(%rip), %xmm0, %xmm0
; HAS-FMA-NEXT: retq
entry: entry:
%div = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64( %div = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64(
<2 x double> <double 1.000000e+00, double 2.000000e+00>, <2 x double> <double 1.000000e+00, double 2.000000e+00>,
<2 x double> <double 1.000000e+01, double 1.000000e+01>, <2 x double> <double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %div ret <2 x double> %div
} }
define <2 x double> @constrained_vector_fmul(<2 x double> %a) { define <2 x double> @constrained_vector_fmul(<2 x double> %a) {
; CHECK-LABEL: constrained_vector_fmul: ; NO-FMA-LABEL: constrained_vector_fmul:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.797693e+308,1.797693e+308] ; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [1.797693e+308,1.797693e+308]
; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm0 ; NO-FMA-NEXT: mulpd {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_fmul:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm0 = [1.797693e+308,1.797693e+308]
; HAS-FMA-NEXT: vmulpd {{.*}}(%rip), %xmm0, %xmm0
; HAS-FMA-NEXT: retq
entry: entry:
%mul = call <2 x double> @llvm.experimental.constrained.fmul.v2f64( %mul = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(
<2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<2 x double> <double 2.000000e+00, double 3.000000e+00>, <2 x double> <double 2.000000e+00, double 3.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %mul ret <2 x double> %mul
} }
define <2 x double> @constrained_vector_fadd() { define <2 x double> @constrained_vector_fadd() {
; CHECK-LABEL: constrained_vector_fadd: ; NO-FMA-LABEL: constrained_vector_fadd:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.797693e+308,1.797693e+308] ; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [1.797693e+308,1.797693e+308]
; CHECK-NEXT: addpd {{.*}}(%rip), %xmm0 ; NO-FMA-NEXT: addpd {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_fadd:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm0 = [1.797693e+308,1.797693e+308]
; HAS-FMA-NEXT: vaddpd {{.*}}(%rip), %xmm0, %xmm0
; HAS-FMA-NEXT: retq
entry: entry:
%add = call <2 x double> @llvm.experimental.constrained.fadd.v2f64( %add = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(
<2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<2 x double> <double 1.000000e+00, double 1.000000e-01>, <2 x double> <double 1.000000e+00, double 1.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %add ret <2 x double> %add
} }
define <2 x double> @constrained_vector_fsub() { define <2 x double> @constrained_vector_fsub() {
; CHECK-LABEL: constrained_vector_fsub: ; NO-FMA-LABEL: constrained_vector_fsub:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: movapd {{.*#+}} xmm0 = [-1.797693e+308,-1.797693e+308] ; NO-FMA-NEXT: movapd {{.*#+}} xmm0 = [-1.797693e+308,-1.797693e+308]
; CHECK-NEXT: subpd {{.*}}(%rip), %xmm0 ; NO-FMA-NEXT: subpd {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_fsub:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm0 = [-1.797693e+308,-1.797693e+308]
; HAS-FMA-NEXT: vsubpd {{.*}}(%rip), %xmm0, %xmm0
; HAS-FMA-NEXT: retq
entry: entry:
%sub = call <2 x double> @llvm.experimental.constrained.fsub.v2f64( %sub = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(
<2 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>, <2 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>,
<2 x double> <double 1.000000e+00, double 1.000000e-01>, <2 x double> <double 1.000000e+00, double 1.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %sub ret <2 x double> %sub
} }
define <2 x double> @constrained_vector_fma_v2f64() {
; NO-FMA-LABEL: constrained_vector_fma_v2f64:
; NO-FMA: # %bb.0: # %entry
; NO-FMA-NEXT: subq $24, %rsp
; NO-FMA-NEXT: .cfi_def_cfa_offset 32
; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; NO-FMA-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; NO-FMA-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
; NO-FMA-NEXT: callq fma
; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; NO-FMA-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; NO-FMA-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
; NO-FMA-NEXT: callq fma
; NO-FMA-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; NO-FMA-NEXT: addq $24, %rsp
; NO-FMA-NEXT: .cfi_def_cfa_offset 8
; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_fma_v2f64:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm1 = [1.500000e+00,5.000000e-01]
; HAS-FMA-NEXT: vmovapd {{.*#+}} xmm0 = [3.500000e+00,2.500000e+00]
; HAS-FMA-NEXT: vfmadd213pd {{.*#+}} xmm0 = (xmm1 * xmm0) + mem
; HAS-FMA-NEXT: retq
entry:
%fma = call <2 x double> @llvm.experimental.constrained.fma.v2f64(
<2 x double> <double 1.5, double 0.5>,
<2 x double> <double 3.5, double 2.5>,
<2 x double> <double 5.5, double 4.5>,
metadata !"round.dynamic",
metadata !"fpexcept.strict")
ret <2 x double> %fma
}
define <4 x float> @constrained_vector_fma_v4f32() {
; NO-FMA-LABEL: constrained_vector_fma_v4f32:
; NO-FMA: # %bb.0: # %entry
; NO-FMA-NEXT: subq $40, %rsp
; NO-FMA-NEXT: .cfi_def_cfa_offset 48
; NO-FMA-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; NO-FMA-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; NO-FMA-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; NO-FMA-NEXT: callq fmaf
; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; NO-FMA-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; NO-FMA-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; NO-FMA-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; NO-FMA-NEXT: callq fmaf
; NO-FMA-NEXT: unpcklps (%rsp), %xmm0 # 16-byte Folded Reload
; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; NO-FMA-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; NO-FMA-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; NO-FMA-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; NO-FMA-NEXT: callq fmaf
; NO-FMA-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; NO-FMA-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; NO-FMA-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; NO-FMA-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; NO-FMA-NEXT: callq fmaf
; NO-FMA-NEXT: unpcklps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; NO-FMA-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; NO-FMA-NEXT: addq $40, %rsp
; NO-FMA-NEXT: .cfi_def_cfa_offset 8
; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_fma_v4f32:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: vmovaps {{.*#+}} xmm1 = [3.500000e+00,2.500000e+00,1.500000e+00,5.000000e-01]
; HAS-FMA-NEXT: vmovaps {{.*#+}} xmm0 = [7.500000e+00,6.500000e+00,5.500000e+00,4.500000e+00]
; HAS-FMA-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + mem
; HAS-FMA-NEXT: retq
entry:
%fma = call <4 x float> @llvm.experimental.constrained.fma.v4f32(
<4 x float> <float 3.5, float 2.5, float 1.5, float 0.5>,
<4 x float> <float 7.5, float 6.5, float 5.5, float 4.5>,
<4 x float> <float 11.5, float 10.5, float 9.5, float 8.5>,
metadata !"round.dynamic",
metadata !"fpexcept.strict")
ret <4 x float> %fma
}
define <2 x double> @constrained_vector_sqrt() { define <2 x double> @constrained_vector_sqrt() {
; CHECK-LABEL: constrained_vector_sqrt: ; NO-FMA-LABEL: constrained_vector_sqrt:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: sqrtpd {{.*}}(%rip), %xmm0 ; NO-FMA-NEXT: sqrtpd {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_sqrt:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: vsqrtpd {{.*}}(%rip), %xmm0
; HAS-FMA-NEXT: retq
entry: entry:
%sqrt = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64( %sqrt = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %sqrt ret <2 x double> %sqrt
} }
define <2 x double> @constrained_vector_pow() { define <2 x double> @constrained_vector_pow() {
; CHECK-LABEL: constrained_vector_pow: ; NO-FMA-LABEL: constrained_vector_pow:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; NO-FMA-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; NO-FMA-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq pow ; NO-FMA-NEXT: callq pow
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq pow ; NO-FMA-NEXT: callq pow
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; NO-FMA-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; NO-FMA-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; NO-FMA-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_pow:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: subq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 32
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
; HAS-FMA-NEXT: callq pow
; HAS-FMA-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
; HAS-FMA-NEXT: callq pow
; HAS-FMA-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; HAS-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; HAS-FMA-NEXT: addq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 8
; HAS-FMA-NEXT: retq
entry: entry:
%pow = call <2 x double> @llvm.experimental.constrained.pow.v2f64( %pow = call <2 x double> @llvm.experimental.constrained.pow.v2f64(
<2 x double> <double 42.1, double 42.2>, <2 x double> <double 42.1, double 42.2>,
<2 x double> <double 3.0, double 3.0>, <2 x double> <double 3.0, double 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %pow ret <2 x double> %pow
} }
define <2 x double> @constrained_vector_powi() {
; NO-FMA-LABEL: constrained_vector_powi:
; NO-FMA: # %bb.0: # %entry
; NO-FMA-NEXT: subq $24, %rsp
; NO-FMA-NEXT: .cfi_def_cfa_offset 32
; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; NO-FMA-NEXT: movl $3, %edi
; NO-FMA-NEXT: callq __powidf2
; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; NO-FMA-NEXT: movl $3, %edi
; NO-FMA-NEXT: callq __powidf2
; NO-FMA-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; NO-FMA-NEXT: addq $24, %rsp
; NO-FMA-NEXT: .cfi_def_cfa_offset 8
; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_powi:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: subq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 32
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: movl $3, %edi
; HAS-FMA-NEXT: callq __powidf2
; HAS-FMA-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: movl $3, %edi
; HAS-FMA-NEXT: callq __powidf2
; HAS-FMA-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; HAS-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; HAS-FMA-NEXT: addq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 8
; HAS-FMA-NEXT: retq
entry:
%powi = call <2 x double> @llvm.experimental.constrained.powi.v2f64(
<2 x double> <double 42.1, double 42.2>,
i32 3,
metadata !"round.dynamic",
metadata !"fpexcept.strict")
ret <2 x double> %powi
}
define <2 x double> @constrained_vector_sin() { define <2 x double> @constrained_vector_sin() {
; CHECK-LABEL: constrained_vector_sin: ; NO-FMA-LABEL: constrained_vector_sin:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; NO-FMA-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; NO-FMA-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq sin ; NO-FMA-NEXT: callq sin
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq sin ; NO-FMA-NEXT: callq sin
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; NO-FMA-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; NO-FMA-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; NO-FMA-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_sin:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: subq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 32
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq sin
; HAS-FMA-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq sin
; HAS-FMA-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; HAS-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; HAS-FMA-NEXT: addq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 8
; HAS-FMA-NEXT: retq
entry: entry:
%sin = call <2 x double> @llvm.experimental.constrained.sin.v2f64( %sin = call <2 x double> @llvm.experimental.constrained.sin.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %sin ret <2 x double> %sin
} }
define <2 x double> @constrained_vector_cos() { define <2 x double> @constrained_vector_cos() {
; CHECK-LABEL: constrained_vector_cos: ; NO-FMA-LABEL: constrained_vector_cos:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; NO-FMA-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; NO-FMA-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq cos ; NO-FMA-NEXT: callq cos
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq cos ; NO-FMA-NEXT: callq cos
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; NO-FMA-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; NO-FMA-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; NO-FMA-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_cos:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: subq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 32
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq cos
; HAS-FMA-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq cos
; HAS-FMA-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; HAS-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; HAS-FMA-NEXT: addq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 8
; HAS-FMA-NEXT: retq
entry: entry:
%cos = call <2 x double> @llvm.experimental.constrained.cos.v2f64( %cos = call <2 x double> @llvm.experimental.constrained.cos.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %cos ret <2 x double> %cos
} }
define <2 x double> @constrained_vector_exp() { define <2 x double> @constrained_vector_exp() {
; CHECK-LABEL: constrained_vector_exp: ; NO-FMA-LABEL: constrained_vector_exp:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; NO-FMA-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; NO-FMA-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp ; NO-FMA-NEXT: callq exp
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp ; NO-FMA-NEXT: callq exp
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; NO-FMA-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; NO-FMA-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; NO-FMA-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_exp:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: subq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 32
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq exp
; HAS-FMA-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq exp
; HAS-FMA-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; HAS-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; HAS-FMA-NEXT: addq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 8
; HAS-FMA-NEXT: retq
entry: entry:
%exp = call <2 x double> @llvm.experimental.constrained.exp.v2f64( %exp = call <2 x double> @llvm.experimental.constrained.exp.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %exp ret <2 x double> %exp
} }
define <2 x double> @constrained_vector_exp2() { define <2 x double> @constrained_vector_exp2() {
; CHECK-LABEL: constrained_vector_exp2: ; NO-FMA-LABEL: constrained_vector_exp2:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; NO-FMA-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; NO-FMA-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp2 ; NO-FMA-NEXT: callq exp2
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp2 ; NO-FMA-NEXT: callq exp2
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; NO-FMA-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; NO-FMA-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; NO-FMA-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_exp2:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: subq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 32
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq exp2
; HAS-FMA-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq exp2
; HAS-FMA-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; HAS-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; HAS-FMA-NEXT: addq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 8
; HAS-FMA-NEXT: retq
entry: entry:
%exp2 = call <2 x double> @llvm.experimental.constrained.exp2.v2f64( %exp2 = call <2 x double> @llvm.experimental.constrained.exp2.v2f64(
<2 x double> <double 42.1, double 42.0>, <2 x double> <double 42.1, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %exp2 ret <2 x double> %exp2
} }
define <2 x double> @constrained_vector_log() { define <2 x double> @constrained_vector_log() {
; CHECK-LABEL: constrained_vector_log: ; NO-FMA-LABEL: constrained_vector_log:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; NO-FMA-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; NO-FMA-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log ; NO-FMA-NEXT: callq log
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log ; NO-FMA-NEXT: callq log
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; NO-FMA-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; NO-FMA-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; NO-FMA-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_log:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: subq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 32
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq log
; HAS-FMA-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq log
; HAS-FMA-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; HAS-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; HAS-FMA-NEXT: addq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 8
; HAS-FMA-NEXT: retq
entry: entry:
%log = call <2 x double> @llvm.experimental.constrained.log.v2f64( %log = call <2 x double> @llvm.experimental.constrained.log.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %log ret <2 x double> %log
} }
define <2 x double> @constrained_vector_log10() { define <2 x double> @constrained_vector_log10() {
; CHECK-LABEL: constrained_vector_log10: ; NO-FMA-LABEL: constrained_vector_log10:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; NO-FMA-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; NO-FMA-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log10 ; NO-FMA-NEXT: callq log10
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log10 ; NO-FMA-NEXT: callq log10
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; NO-FMA-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; NO-FMA-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; NO-FMA-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_log10:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: subq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 32
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq log10
; HAS-FMA-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq log10
; HAS-FMA-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; HAS-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; HAS-FMA-NEXT: addq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 8
; HAS-FMA-NEXT: retq
entry: entry:
%log10 = call <2 x double> @llvm.experimental.constrained.log10.v2f64( %log10 = call <2 x double> @llvm.experimental.constrained.log10.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %log10 ret <2 x double> %log10
} }
define <2 x double> @constrained_vector_log2() { define <2 x double> @constrained_vector_log2() {
; CHECK-LABEL: constrained_vector_log2: ; NO-FMA-LABEL: constrained_vector_log2:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; NO-FMA-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; NO-FMA-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log2 ; NO-FMA-NEXT: callq log2
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log2 ; NO-FMA-NEXT: callq log2
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; NO-FMA-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; NO-FMA-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; NO-FMA-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_log2:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: subq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 32
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq log2
; HAS-FMA-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; HAS-FMA-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; HAS-FMA-NEXT: callq log2
; HAS-FMA-NEXT: vunpcklpd (%rsp), %xmm0, %xmm0 # 16-byte Folded Reload
; HAS-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; HAS-FMA-NEXT: addq $24, %rsp
; HAS-FMA-NEXT: .cfi_def_cfa_offset 8
; HAS-FMA-NEXT: retq
entry: entry:
%log2 = call <2 x double> @llvm.experimental.constrained.log2.v2f64( %log2 = call <2 x double> @llvm.experimental.constrained.log2.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %log2 ret <2 x double> %log2
} }
define <2 x double> @constrained_vector_rint() { define <2 x double> @constrained_vector_rint() {
; CHECK-LABEL: constrained_vector_rint: ; NO-FMA-LABEL: constrained_vector_rint:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; NO-FMA-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; NO-FMA-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq rint ; NO-FMA-NEXT: callq rint
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq rint ; NO-FMA-NEXT: callq rint
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; NO-FMA-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; NO-FMA-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; NO-FMA-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_rint:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: vroundpd $4, {{.*}}(%rip), %xmm0
; HAS-FMA-NEXT: retq
entry: entry:
%rint = call <2 x double> @llvm.experimental.constrained.rint.v2f64( %rint = call <2 x double> @llvm.experimental.constrained.rint.v2f64(
<2 x double> <double 42.1, double 42.0>, <2 x double> <double 42.1, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %rint ret <2 x double> %rint
} }
define <2 x double> @constrained_vector_nearbyint() { define <2 x double> @constrained_vector_nearbyint() {
; CHECK-LABEL: constrained_vector_nearbyint: ; NO-FMA-LABEL: constrained_vector_nearbyint:
; CHECK: # %bb.0: # %entry ; NO-FMA: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; NO-FMA-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; NO-FMA-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq nearbyint ; NO-FMA-NEXT: callq nearbyint
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; NO-FMA-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; NO-FMA-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq nearbyint ; NO-FMA-NEXT: callq nearbyint
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; NO-FMA-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; NO-FMA-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; NO-FMA-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; NO-FMA-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; NO-FMA-NEXT: retq
;
; HAS-FMA-LABEL: constrained_vector_nearbyint:
; HAS-FMA: # %bb.0: # %entry
; HAS-FMA-NEXT: vroundpd $12, {{.*}}(%rip), %xmm0
; HAS-FMA-NEXT: retq
entry: entry:
%nearby = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64( %nearby = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(
<2 x double> <double 42.1, double 42.0>, <2 x double> <double 42.1, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
ret <2 x double> %nearby ret <2 x double> %nearby
} }
declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double>, <2 x double>, <2 x double>, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float>, <4 x float>, <4 x float>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata)
declare <4 x double> @llvm.experimental.constrained.sqrt.v4f64(<4 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.pow.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.pow.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.powi.v2f64(<2 x double>, i32, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.sin.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.sin.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.cos.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.cos.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.exp.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.exp.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.exp2.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.exp2.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.log.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.log.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.log10.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.log10.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.log2.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.log2.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.rint.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.rint.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(<2 x double>, metadata, metadata)