[llvm-exegesis] Fix failing assert when creating Snippet for LAHF.

[courbet]

Thanks !

tools/llvm-exegesis/lib/MCInstrDescView.cpp

static void randomize(const Variable &Var, llvm::MCOperand &AssignedValue) {
   default:
     break;
   }
 }
 
 static void setRegisterOperandValue(const RegisterOperandAssignment &ROV,
                                     InstructionInstance &II) {
   assert(ROV.Op);
-  assert(ROV.Op->IsExplicit);
+  if (ROV.Op->IsExplicit) {
     auto &AssignedValue = II.getValueFor(*ROV.Op);
     if (AssignedValue.isValid()) {
       assert(AssignedValue.isReg() && AssignedValue.getReg() == ROV.Reg);
       return;
     }
     AssignedValue = llvm::MCOperand::createReg(ROV.Reg);
+  } else {
+    assert(ROV.Op->ImplicitReg != nullptr);
+    assert(ROV.Reg == *ROV.Op->ImplicitReg);
+  }
 }
 
 size_t randomBit(const llvm::BitVector &Vector) {
   assert(Vector.any());
   auto Itr = Vector.set_bits_begin();
   for (size_t I = randomIndex(Vector.count()); I != 0; --I)
     ++Itr;
   return *Itr;

unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp

 TEST_F(LatencySnippetGeneratorTest, DependencyThroughOtherOpcode) {
   // CMP64rr
   // explicit use 0       : reg RegClass=GR64
   // explicit use 1       : reg RegClass=GR64
   // implicit def         : EFLAGS
 
   const unsigned Opcode = llvm::X86::CMP64rr;
   auto Conf = checkAndGetConfiguration(Opcode);
-  EXPECT_THAT(Conf.Info, testing::HasSubstr("cycle through CMOVLE16rr"));
+  EXPECT_THAT(Conf.Info, testing::HasSubstr("cycle through"));
   ASSERT_THAT(Conf.Snippet, testing::SizeIs(2));
+  const llvm::MCInst Instr = Conf.Snippet[0];
+  EXPECT_THAT(Instr.getOpcode(), Opcode);
   // TODO: check that the two instructions alias each other.
 }
 
+TEST_F(LatencySnippetGeneratorTest, LAHF) {
+  const unsigned Opcode = llvm::X86::LAHF;
+  auto Conf = checkAndGetConfiguration(Opcode);
+  EXPECT_THAT(Conf.Info, testing::HasSubstr("cycle through"));
+  ASSERT_THAT(Conf.Snippet, testing::SizeIs(2));
+  const llvm::MCInst Instr = Conf.Snippet[0];
+  EXPECT_THAT(Instr.getOpcode(), Opcode);
+}
+
 class UopsSnippetGeneratorTest : public X86SnippetGeneratorTest {
 protected:
   UopsSnippetGeneratorTest() : Runner(State) {}
 
   BenchmarkConfiguration checkAndGetConfiguration(unsigned Opcode) {
     randomGenerator().seed(0); // Initialize seed.
     auto ConfOrError = Runner.generateConfiguration(Opcode);
     EXPECT_FALSE(ConfOrError.takeError()); // Valid configuration.