[ARM] Allow CMPZ transforms even if the input has multiple uses.

[efriedma]

Summary

It looks like this got left in by accident in r289794; I can't think of any reason the check would be necessary. (Maybe it was meant to be a check that the AND has one use? But we check that a few lines earlier.)

[SjoerdMeijer]

The initial commit showed problem in testing, and my fix added the check that the AND has a single use. Looks like indeed that we just forgot to remove the other check as I also don't see why it would be necessary. Thanks for fixing.

[SjoerdMeijer]

Showed some decent improvements in a few benchmarks. Cheers.

[ronniemitchell3232]

In D47921#1126108, @SjoerdMeijer wrote:

The initial commit showed problem in testing, and my fix added the check that the AND has a single use. Looks like indeed that we just forgot to remove the other check as I also don't see why it would be necessary. Thanks for fixing.

[ronniemitchell3232]

In D47921#1126108, @SjoerdMeijer wrote:

The initial commit showed problem in testing, and my fix added the check that the AND has a single use. Looks like indeed that we just forgot to remove the other check as I also don't see why it would be necessary. Thanks for fixing.

llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp

void ARMDAGToDAGISel::SelectCMPZ(SDNode *N, bool &SwitchEQNEToPLMI) {
 
   SDValue Zero = N->getOperand(1);
   if (!isa<ConstantSDNode>(Zero) || !cast<ConstantSDNode>(Zero)->isNullValue() ||
       And->getOpcode() != ISD::AND)
     return;
   SDValue X = And.getOperand(0);
   auto C = dyn_cast<ConstantSDNode>(And.getOperand(1));
 
-  if (!C || !X->hasOneUse())
+  if (!C)
     return;
   auto Range = getContiguousRangeOfSetBits(C->getAPIntValue());
   if (!Range)
     return;
 
   // There are several ways to lower this:
   SDNode *NewN;
   SDLoc dl(N);

llvm/trunk/test/CodeGen/ARM/and-cmpz.ll

 
 true:
   ret i32 1
 
 false:
   ret i32 2
 }
 
+; CHECK-LABEL: single_bit_multi_use:
+; CHECK: lsls r0, r0, #23
+; T2-NEXT: mov
+; T2-NEXT: it
+; T1-NEXT: bmi
+define i32 @single_bit_multi_use(i32 %p, i32* %z) {
+  store i32 %p, i32* %z
+  %a = and i32 %p, 256
+  %b = icmp eq i32 %a, 0
+  br i1 %b, label %true, label %false
+
+true:
+  ret i32 1
+
+false:
+  ret i32 2
+}
+
 ; CHECK-LABEL: multi_bit_lsb_ubfx:
 ; CHECK: lsls r0, r0, #24
 ; T2-NEXT: mov
 ; T2-NEXT: it
 ; T1-NEXT: beq
 define i32 @multi_bit_lsb_ubfx(i32 %p) {
   %a = and i32 %p, 255
   %b = icmp eq i32 %a, 0

llvm/trunk/test/CodeGen/ARM/load_i1_select.ll

 ; RUN: llc < %s | FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
 target triple = "thumbv7-apple-ios0.0.0"
 
 ; Codegen should only compare one bit of the loaded value.
 ; rdar://10887484
 
 ; CHECK-LABEL: foo:
 ; CHECK: ldrb r[[R0:[0-9]+]], [r0]
-; CHECK: tst.w r[[R0]], #1
+; CHECK: lsls r{{[0-9]+}}, r[[R0]], #31
 define void @foo(i8* %call, double* %p) nounwind {
 entry:
   %tmp2 = load i8, i8* %call
   %tmp3 = trunc i8 %tmp2 to i1
   %cond = select i1 %tmp3, double 2.000000e+00, double 1.000000e+00
   store double %cond, double* %p
   ret void
 }

llvm/trunk/test/CodeGen/Thumb/thumb-shrink-wrapping.ll

 
 define i1 @beq_to_bx(i32* %y, i32 %head) {
 ; CHECK-LABEL: beq_to_bx:
 ; DISABLE: push {r4, lr}
 ; CHECK: cmp r2, #0
 ; CHECK-NEXT: beq [[EXIT_LABEL:LBB[0-9_]+]]
 ; ENABLE: push {r4, lr}
 
-; CHECK: tst r3, r4
+; CHECK: lsls    r4, r3, #30
 ; ENABLE-NEXT: ldr [[POP:r[4567]]], [sp, #4]
 ; ENABLE-NEXT: mov lr, [[POP]]
 ; ENABLE-NEXT: pop {[[POP]]}
 ; ENABLE-NEXT: add sp, #4
-; CHECK-NEXT: beq [[EXIT_LABEL]]
+; CHECK-NEXT: bpl [[EXIT_LABEL]]
 
 ; CHECK: str r1, [r2]
 ; CHECK: str r3, [r2]
 ; CHECK-NEXT: movs r0, #0
 ; CHECK-NEXT: [[EXIT_LABEL]]: @ %cleanup
 ; ENABLE-NEXT: bx lr
 ; DISABLE-V5-NEXT: pop {r4, pc}
 ; DISABLE-V4T-NEXT: pop {r4}