[X86] Fix Windows `i1 zeroext` conventions to use i8 instead of i32

[rnk]

Summary

Re-lands r328386 and r328443, reverting r328482.

Incorporates fixes from @mstorsjo in D44876 (thanks!) so that small
parameters in i8 and i16 do not end up in the SysV register parameters
(EDI, ESI, etc).

I added tests for how we receive small parameters, since that is the
important part. It's always safe to store more bytes than will be read,
but the assumptions you make when loading them are what really matter.

[mstorsjo]

LGTM.

As I wrote in http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20180319/536996.html, it also seems like the same issue is present for non-windows calling conventions, although I guess that's a separate issue.

[rnk]

In D44900#1048436, @mstorsjo wrote:

LGTM.

As I wrote in http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20180319/536996.html, it also seems like the same issue is present for non-windows calling conventions, although I guess that's a separate issue.

I think you're right, GCC (on Linux) emits those sign/zero extensions, but LLVM does not: https://godbolt.org/g/yqNXp7 This must have been an intentional decision, but I can find no evidence for it in the SysV ABI doc.

[rnk]

I'm self-hosting clang on win64 to validate this a little more, btw.

llvm/lib/Target/X86/X86CallingConv.td

def CC_X86_64_HHVM_C : CallingConv<[
   CCDelegateTo<CC_X86_64_C>
 ]>;
 
 // Calling convention used on Win64
 def CC_X86_Win64_C : CallingConv<[
   // FIXME: Handle byval stuff.
   // FIXME: Handle varargs.
 
-  // Promote i1/i8/i16/v1i1 arguments to i32.
-  CCIfType<[i1, i8, i16, v1i1], CCPromoteToType<i32>>,
+  // Promote i1/v1i1 arguments to i8.
+  CCIfType<[i1, v1i1], CCPromoteToType<i8>>,
 
   // The 'nest' parameter, if any, is passed in R10.
   CCIfNest<CCAssignToReg<[R10]>>,
 
   // A SwiftError is passed in R12.
   CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R12]>>>,
 
   // 128 bit vectors are passed by pointer
   CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCPassIndirect<i64>>,
 
 
   // 256 bit vectors are passed by pointer
   CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64], CCPassIndirect<i64>>,
 
   // 512 bit vectors are passed by pointer
   CCIfType<[v16i32, v16f32, v8f64, v8i64], CCPassIndirect<i64>>,
 
   // Long doubles are passed by pointer
   CCIfType<[f80], CCPassIndirect<i64>>,
 
   // The first 4 MMX vector arguments are passed in GPRs.
   CCIfType<[x86mmx], CCBitConvertToType<i64>>,
 
   // The first 4 integer arguments are passed in integer registers.
+  CCIfType<[i8 ], CCAssignToRegWithShadow<[CL  , DL  , R8B , R9B ],
+                                          [XMM0, XMM1, XMM2, XMM3]>>,
+  CCIfType<[i16], CCAssignToRegWithShadow<[CX  , DX  , R8W , R9W ],
+                                          [XMM0, XMM1, XMM2, XMM3]>>,
   CCIfType<[i32], CCAssignToRegWithShadow<[ECX , EDX , R8D , R9D ],
                                           [XMM0, XMM1, XMM2, XMM3]>>,
 
   // Do not pass the sret argument in RCX, the Win64 thiscall calling
   // convention requires "this" to be passed in RCX.
   CCIfCC<"CallingConv::X86_ThisCall",
     CCIfSRet<CCIfType<[i64], CCAssignToRegWithShadow<[RDX , R8  , R9  ],
                                                      [XMM1, XMM2, XMM3]>>>>,
 
   CCIfType<[i64], CCAssignToRegWithShadow<[RCX , RDX , R8  , R9  ],
                                           [XMM0, XMM1, XMM2, XMM3]>>,
 
   // The first 4 FP/Vector arguments are passed in XMM registers.
   CCIfType<[f32, f64, v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
            CCAssignToRegWithShadow<[XMM0, XMM1, XMM2, XMM3],
                                    [RCX , RDX , R8  , R9  ]>>,
 
   // Integer/FP values get stored in stack slots that are 8 bytes in size and
   // 8-byte aligned if there are no more registers to hold them.
-  CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>
+  CCIfType<[i8, i16, i32, i64, f32, f64], CCAssignToStack<8, 8>>
 ]>;
 
 def CC_X86_Win64_VectorCall : CallingConv<[
   CCCustom<"CC_X86_64_VectorCall">,
 
   // Delegate to fastcall to handle integer types.
   CCDelegateTo<CC_X86_Win64_C>
 ]>;
def CC_X86_32_MCU : CallingConv<[
   // in integer registers.
   CCIfNotVarArg<CCIfType<[i32], CCCustom<"CC_X86_32_MCUInReg">>>,
 
   // Otherwise, same as everything else.
   CCDelegateTo<CC_X86_32_Common>
 ]>;
 
 def CC_X86_32_FastCall : CallingConv<[
-  // Promote i1/i8/i16/v1i1 arguments to i32.
-  CCIfType<[i1, i8, i16, v1i1], CCPromoteToType<i32>>,
+  // Promote i1 to i8.
+  CCIfType<[i1], CCPromoteToType<i8>>,
 
   // The 'nest' parameter, if any, is passed in EAX.
   CCIfNest<CCAssignToReg<[EAX]>>,
 
   // The first 2 integer arguments are passed in ECX/EDX
+  CCIfInReg<CCIfType<[ i8], CCAssignToReg<[ CL,  DL]>>>,
+  CCIfInReg<CCIfType<[i16], CCAssignToReg<[ CX,  DX]>>>,
   CCIfInReg<CCIfType<[i32], CCAssignToReg<[ECX, EDX]>>>,
 
   // Otherwise, same as everything else.
   CCDelegateTo<CC_X86_32_Common>
 ]>;
 
 def CC_X86_Win32_VectorCall : CallingConv<[
   // Pass floating point in XMMs

llvm/lib/Target/X86/X86ISelLowering.cpp

if (VA.isRegLoc()) {
             "Currently the only custom case is when we split v64i1 to 2 regs");
 
         // v64i1 values, in regcall calling convention, that are
         // compiled to 32 bit arch, are split up into two registers.
         ArgValue =
             getv64i1Argument(VA, ArgLocs[++I], Chain, DAG, dl, Subtarget);
       } else {
         const TargetRegisterClass *RC;
-        if (RegVT == MVT::i32)
+        if (RegVT == MVT::i8)
+          RC = &X86::GR8RegClass;
+        else if (RegVT == MVT::i16)
+          RC = &X86::GR16RegClass;
+        else if (RegVT == MVT::i32)
           RC = &X86::GR32RegClass;
         else if (Is64Bit && RegVT == MVT::i64)
           RC = &X86::GR64RegClass;
         else if (RegVT == MVT::f32)
           RC = Subtarget.hasAVX512() ? &X86::FR32XRegClass : &X86::FR32RegClass;
         else if (RegVT == MVT::f64)
           RC = Subtarget.hasAVX512() ? &X86::FR64XRegClass : &X86::FR64RegClass;
         else if (RegVT == MVT::f80)

llvm/test/CodeGen/X86/avx512-intel-ocl.ll

 ; WIN32-NEXT:    calll _func_float16_mask
 ; WIN32-NEXT:    retl
 ;
 ; WIN64-KNL-LABEL: testf16_inp_mask:
 ; WIN64-KNL:       # %bb.0:
 ; WIN64-KNL-NEXT:    subq $40, %rsp
 ; WIN64-KNL-NEXT:    .seh_stackalloc 40
 ; WIN64-KNL-NEXT:    .seh_endprologue
+; WIN64-KNL-NEXT:    # kill: def $dx killed $dx def $edx
 ; WIN64-KNL-NEXT:    vmovaps (%rcx), %zmm0
 ; WIN64-KNL-NEXT:    kmovw %edx, %k1
 ; WIN64-KNL-NEXT:    callq func_float16_mask
 ; WIN64-KNL-NEXT:    nop
 ; WIN64-KNL-NEXT:    addq $40, %rsp
 ; WIN64-KNL-NEXT:    retq
 ; WIN64-KNL-NEXT:    .seh_handlerdata
 ; WIN64-KNL-NEXT:    .text
 ; WIN64-KNL-NEXT:    .seh_endproc
 ;
 ; WIN64-SKX-LABEL: testf16_inp_mask:
 ; WIN64-SKX:       # %bb.0:
 ; WIN64-SKX-NEXT:    subq $40, %rsp
 ; WIN64-SKX-NEXT:    .seh_stackalloc 40
 ; WIN64-SKX-NEXT:    .seh_endprologue
+; WIN64-SKX-NEXT:    # kill: def $dx killed $dx def $edx
 ; WIN64-SKX-NEXT:    vmovaps (%rcx), %zmm0
 ; WIN64-SKX-NEXT:    kmovd %edx, %k1
 ; WIN64-SKX-NEXT:    callq func_float16_mask
 ; WIN64-SKX-NEXT:    nop
 ; WIN64-SKX-NEXT:    addq $40, %rsp
 ; WIN64-SKX-NEXT:    retq
 ; WIN64-SKX-NEXT:    .seh_handlerdata
 ; WIN64-SKX-NEXT:    .text

llvm/test/CodeGen/X86/h-registers-0.ll

 }
 
 define i16 @qux16(i16 inreg %x) nounwind {
 ; X86-64-LABEL: qux16:
 ; X86-64: movl %edi, %eax
 ; X86-64: movzbl %ah, %eax
 
 ; WIN64-LABEL:  qux16:
-; WIN64:  movzbl %ch, %eax
+; WIN64:  movzwl  %cx, %eax
+; WIN64:  shrl    $8, %eax
 
 ; X86-32-LABEL: qux16:
 ; X86-32: movzbl %ah, %eax
   %t0 = lshr i16 %x, 8
   ret i16 %t0
 }

llvm/test/CodeGen/X86/test-shrink.ll

 ; CHECK-LINUX64-NEXT:    callq bar
 ; CHECK-LINUX64-NEXT:    popq %rax
 ; CHECK-LINUX64-NEXT:  .LBB4_2: # %no
 ; CHECK-LINUX64-NEXT:    retq
 ;
 ; CHECK-WIN32-64-LABEL: g16xh:
 ; CHECK-WIN32-64:       # %bb.0:
 ; CHECK-WIN32-64-NEXT:    subq $40, %rsp
+; CHECK-WIN32-64-NEXT:    # kill: def $cx killed $cx def $ecx
 ; CHECK-WIN32-64-NEXT:    testl $2048, %ecx # imm = 0x800
 ; CHECK-WIN32-64-NEXT:    jne .LBB4_2
 ; CHECK-WIN32-64-NEXT:  # %bb.1: # %yes
 ; CHECK-WIN32-64-NEXT:    callq bar
 ; CHECK-WIN32-64-NEXT:  .LBB4_2: # %no
 ; CHECK-WIN32-64-NEXT:    addq $40, %rsp
 ; CHECK-WIN32-64-NEXT:    retq
 ;

 ; CHECK-LINUX64-NEXT:    callq bar
 ; CHECK-LINUX64-NEXT:    popq %rax
 ; CHECK-LINUX64-NEXT:  .LBB5_2: # %no
 ; CHECK-LINUX64-NEXT:    retq
 ;
 ; CHECK-WIN32-64-LABEL: g16xl:
 ; CHECK-WIN32-64:       # %bb.0:
 ; CHECK-WIN32-64-NEXT:    subq $40, %rsp
+; CHECK-WIN32-64-NEXT:    # kill: def $cx killed $cx def $ecx
 ; CHECK-WIN32-64-NEXT:    testb $8, %cl
 ; CHECK-WIN32-64-NEXT:    jne .LBB5_2
 ; CHECK-WIN32-64-NEXT:  # %bb.1: # %yes
 ; CHECK-WIN32-64-NEXT:    callq bar
 ; CHECK-WIN32-64-NEXT:  .LBB5_2: # %no
 ; CHECK-WIN32-64-NEXT:    addq $40, %rsp
 ; CHECK-WIN32-64-NEXT:    retq
 ;

 ; CHECK-LINUX64-NEXT:    pushq %rax
 ; CHECK-LINUX64-NEXT:    callq bar
 ; CHECK-LINUX64-NEXT:    popq %rax
 ; CHECK-LINUX64-NEXT:    retq
 ;
 ; CHECK-WIN32-64-LABEL: truncand32:
 ; CHECK-WIN32-64:       # %bb.0:
 ; CHECK-WIN32-64-NEXT:    subq $40, %rsp
+; CHECK-WIN32-64-NEXT:    # kill: def $cx killed $cx def $ecx
 ; CHECK-WIN32-64-NEXT:    testl $2049, %ecx # imm = 0x801
 ; CHECK-WIN32-64-NEXT:    je .LBB11_1
 ; CHECK-WIN32-64-NEXT:  # %bb.2: # %no
 ; CHECK-WIN32-64-NEXT:    addq $40, %rsp
 ; CHECK-WIN32-64-NEXT:    retq
 ; CHECK-WIN32-64-NEXT:  .LBB11_1: # %yes
 ; CHECK-WIN32-64-NEXT:    callq bar
 ; CHECK-WIN32-64-NEXT:    addq $40, %rsp

 ; CHECK-LINUX64-NEXT:    pushq %rax
 ; CHECK-LINUX64-NEXT:    callq bar
 ; CHECK-LINUX64-NEXT:    popq %rax
 ; CHECK-LINUX64-NEXT:    retq
 ;
 ; CHECK-WIN32-64-LABEL: testw:
 ; CHECK-WIN32-64:       # %bb.0:
 ; CHECK-WIN32-64-NEXT:    subq $40, %rsp
+; CHECK-WIN32-64-NEXT:    # kill: def $cx killed $cx def $ecx
 ; CHECK-WIN32-64-NEXT:    testw $2049, %cx # imm = 0x801
 ; CHECK-WIN32-64-NEXT:    jne .LBB12_2
 ; CHECK-WIN32-64-NEXT:  # %bb.1: # %yes
 ; CHECK-WIN32-64-NEXT:    callq bar
 ; CHECK-WIN32-64-NEXT:  .LBB12_2: # %no
 ; CHECK-WIN32-64-NEXT:    addq $40, %rsp
 ; CHECK-WIN32-64-NEXT:    retq
 ;

llvm/test/CodeGen/X86/vec_cast.ll

 ; CHECK-LIN-NEXT:    pinsrw $1, %esi, %xmm0
 ; CHECK-LIN-NEXT:    pinsrw $2, %edx, %xmm0
 ; CHECK-LIN-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
 ; CHECK-LIN-NEXT:    psrad $16, %xmm0
 ; CHECK-LIN-NEXT:    retq
 ;
 ; CHECK-WIN-LABEL: b:
 ; CHECK-WIN:       # %bb.0:
+; CHECK-WIN-NEXT:    # kill: def $r8w killed $r8w def $r8d
+; CHECK-WIN-NEXT:    # kill: def $dx killed $dx def $edx
+; CHECK-WIN-NEXT:    # kill: def $cx killed $cx def $ecx
 ; CHECK-WIN-NEXT:    movd %ecx, %xmm0
 ; CHECK-WIN-NEXT:    pinsrw $1, %edx, %xmm0
 ; CHECK-WIN-NEXT:    pinsrw $2, %r8d, %xmm0
 ; CHECK-WIN-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
 ; CHECK-WIN-NEXT:    psrad $16, %xmm0
 ; CHECK-WIN-NEXT:    retq
   %c = sext <3 x i16> %a to <3 x i32>
   ret <3 x i32> %c
 }
 
 define <1 x i32> @c(<1 x i16> %a) nounwind {
 ; CHECK-LIN-LABEL: c:
 ; CHECK-LIN:       # %bb.0:
 ; CHECK-LIN-NEXT:    movd %edi, %xmm0
 ; CHECK-LIN-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,0,2,1,4,5,6,7]
 ; CHECK-LIN-NEXT:    psrad $16, %xmm0
 ; CHECK-LIN-NEXT:    movd %xmm0, %eax
 ; CHECK-LIN-NEXT:    retq
 ;
 ; CHECK-WIN-LABEL: c:
 ; CHECK-WIN:       # %bb.0:
+; CHECK-WIN-NEXT:    # kill: def $cx killed $cx def $ecx
 ; CHECK-WIN-NEXT:    movd %ecx, %xmm0
 ; CHECK-WIN-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,0,2,1,4,5,6,7]
 ; CHECK-WIN-NEXT:    psrad $16, %xmm0
 ; CHECK-WIN-NEXT:    movd %xmm0, %eax
 ; CHECK-WIN-NEXT:    retq
   %c = sext <1 x i16> %a to <1 x i32>
   ret <1 x i32> %c
 }

 ; CHECK-LIN-NEXT:    pinsrw $1, %esi, %xmm0
 ; CHECK-LIN-NEXT:    pinsrw $2, %edx, %xmm0
 ; CHECK-LIN-NEXT:    pxor %xmm1, %xmm1
 ; CHECK-LIN-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
 ; CHECK-LIN-NEXT:    retq
 ;
 ; CHECK-WIN-LABEL: e:
 ; CHECK-WIN:       # %bb.0:
+; CHECK-WIN-NEXT:    # kill: def $r8w killed $r8w def $r8d
+; CHECK-WIN-NEXT:    # kill: def $dx killed $dx def $edx
+; CHECK-WIN-NEXT:    # kill: def $cx killed $cx def $ecx
 ; CHECK-WIN-NEXT:    movd %ecx, %xmm0
 ; CHECK-WIN-NEXT:    pinsrw $1, %edx, %xmm0
 ; CHECK-WIN-NEXT:    pinsrw $2, %r8d, %xmm0
 ; CHECK-WIN-NEXT:    pxor %xmm1, %xmm1
 ; CHECK-WIN-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
 ; CHECK-WIN-NEXT:    retq
   %c = zext <3 x i16> %a to <3 x i32>
   ret <3 x i32> %c
 }
 
 define <1 x i32> @f(<1 x i16> %a) nounwind {
 ; CHECK-LIN-LABEL: f:
 ; CHECK-LIN:       # %bb.0:
 ; CHECK-LIN-NEXT:    movd %edi, %xmm0
 ; CHECK-LIN-NEXT:    pxor %xmm1, %xmm1
 ; CHECK-LIN-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
 ; CHECK-LIN-NEXT:    movd %xmm0, %eax
 ; CHECK-LIN-NEXT:    retq
 ;
 ; CHECK-WIN-LABEL: f:
 ; CHECK-WIN:       # %bb.0:
+; CHECK-WIN-NEXT:    # kill: def $cx killed $cx def $ecx
 ; CHECK-WIN-NEXT:    movd %ecx, %xmm0
 ; CHECK-WIN-NEXT:    pxor %xmm1, %xmm1
 ; CHECK-WIN-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
 ; CHECK-WIN-NEXT:    movd %xmm0, %eax
 ; CHECK-WIN-NEXT:    retq
   %c = zext <1 x i16> %a to <1 x i32>
   ret <1 x i32> %c
 }

llvm/test/CodeGen/X86/win-smallparams.ll

+; When we accept small parameters on Windows, make sure we do not assume they
+; are zero or sign extended in memory or in registers.
+
+; RUN: llc < %s -mtriple=x86_64-windows-msvc | FileCheck %s --check-prefix=WIN64
+; RUN: llc < %s -mtriple=x86_64-windows-gnu | FileCheck %s --check-prefix=WIN64
+; RUN: llc < %s -mtriple=i686-windows-msvc | FileCheck %s --check-prefix=WIN32
+; RUN: llc < %s -mtriple=i686-windows-gnu | FileCheck %s --check-prefix=WIN32
+
+define void @call() {
+entry:
+  %rv = call i32 @manyargs(i8 1, i16 2, i8 3, i16 4, i8 5, i16 6)
+  ret void
+}
+
+define i32 @manyargs(i8 %a, i16 %b, i8 %c, i16 %d, i8 %e, i16 %f) {
+entry:
+  %aa = sext i8 %a to i32
+  %bb = sext i16 %b to i32
+  %cc = zext i8 %c to i32
+  %dd = zext i16 %d to i32
+  %ee = zext i8 %e to i32
+  %ff = zext i16 %f to i32
+  %t0 = add i32 %aa, %bb
+  %t1 = add i32 %t0, %cc
+  %t2 = add i32 %t1, %dd
+  %t3 = add i32 %t2, %ee
+  %t4 = add i32 %t3, %ff
+  ret i32 %t4
+}
+
+; WIN64-LABEL: call:
+; WIN64-DAG: movw $6, 40(%rsp)
+; WIN64-DAG: movb $5, 32(%rsp)
+; WIN64-DAG: movb $1, %cl
+; WIN64-DAG: movw $2, %dx
+; WIN64-DAG: movb $3, %r8b
+; WIN64-DAG: movw $4, %r9w
+; WIN64: callq manyargs
+
+; WIN64-LABEL: manyargs:
+; WIN64-DAG: movsbl %cl,
+; WIN64-DAG: movswl %dx,
+; WIN64-DAG: movzbl %r8b,
+; WIN64-DAG: movzwl %r9w,
+; WIN64-DAG: movzbl 40(%rsp),
+; WIN64-DAG: movzwl 48(%rsp),
+; WIN64: retq
+
+
+; WIN32-LABEL: _call:
+; WIN32: pushl $6
+; WIN32: pushl $5
+; WIN32: pushl $4
+; WIN32: pushl $3
+; WIN32: pushl $2
+; WIN32: pushl $1
+; WIN32: calll _manyargs
+
+; WIN32-LABEL: _manyargs:
+; WIN32-DAG: movsbl 4(%esp),
+; WIN32-DAG: movswl 8(%esp),
+; WIN32-DAG: movzbl 12(%esp),
+; WIN32-DAG: movzwl 16(%esp),
+; WIN32-DAG: movzbl 20(%esp),
+; WIN32-DAG: movzwl 24(%esp),
+; WIN32: retl
+

llvm/test/CodeGen/X86/win32-bool.ll

+; RUN: llc < %s -mtriple=i686-windows-msvc | FileCheck %s
+; RUN: llc < %s -mtriple=i686-windows-gnu | FileCheck %s
+
+define x86_fastcallcc i32 @pass_fast_bool(i1 inreg zeroext %b) {
+entry:
+  %cond = select i1 %b, i32 66, i32 0
+  ret i32 %cond
+}
+
+; CHECK-LABEL: @pass_fast_bool@4:
+; CHECK-DAG: testb %cl, %cl
+; CHECK-DAG: movl    $66,
+; CHECK:     retl
+
+define x86_vectorcallcc i32 @pass_vector_bool(i1 inreg zeroext %b) {
+entry:
+  %cond = select i1 %b, i32 66, i32 0
+  ret i32 %cond
+}
+
+; CHECK-LABEL: pass_vector_bool@@4:
+; CHECK-DAG: testb %cl, %cl
+; CHECK-DAG: movl    $66,
+; CHECK:     retl
+
+define zeroext i1 @ret_true() {
+entry:
+  ret i1 true
+}
+
+; CHECK-LABEL: ret_true:
+; CHECK:     movb $1, %al
+; CHECK:     retl

llvm/test/CodeGen/X86/win64-bool.ll

+; RUN: llc < %s -mtriple=x86_64-windows-msvc | FileCheck %s --check-prefix=CHECK
+; RUN: llc < %s -mtriple=x86_64-windows-gnu | FileCheck %s --check-prefix=CHECK
+
+define i32 @pass_bool(i1 zeroext %b) {
+entry:
+  %cond = select i1 %b, i32 66, i32 0
+  ret i32 %cond
+}
+
+; CHECK-LABEL: pass_bool:
+; CHECK-DAG: testb %cl, %cl
+; CHECK-DAG: movl    $66,
+; CHECK:     cmovel {{.*}}, %eax
+; CHECK:     retq
+
+define zeroext i1 @ret_true() {
+entry:
+  ret i1 true
+}
+
+; CHECK-LABEL: ret_true:
+; CHECK:     movb $1, %al
+; CHECK:     retq

llvm/test/CodeGen/X86/xor.ll

 ; X64-LIN-NEXT:    movl %eax, %esi
 ; X64-LIN-NEXT:    jne .LBB4_1
 ; X64-LIN-NEXT:  # %bb.2: # %bb12
 ; X64-LIN-NEXT:    movl %edi, %eax
 ; X64-LIN-NEXT:    retq
 ;
 ; X64-WIN-LABEL: test5:
 ; X64-WIN:       # %bb.0: # %entry
+; X64-WIN-NEXT:    # kill: def $dx killed $dx def $edx
+; X64-WIN-NEXT:    # kill: def $cx killed $cx def $ecx
 ; X64-WIN-NEXT:    .p2align 4, 0x90
 ; X64-WIN-NEXT:  .LBB4_1: # %bb
 ; X64-WIN-NEXT:    # =>This Inner Loop Header: Depth=1
 ; X64-WIN-NEXT:    xorl %edx, %ecx
 ; X64-WIN-NEXT:    movl %ecx, %eax
 ; X64-WIN-NEXT:    notl %eax
 ; X64-WIN-NEXT:    andl %edx, %eax
 ; X64-WIN-NEXT:    addl %eax, %eax

 ; X64-LIN-NEXT:    movq %xmm0, %rcx
 ; X64-LIN-NEXT:    xorl %eax, %eax
 ; X64-LIN-NEXT:    cmpq $1, %rcx
 ; X64-LIN-NEXT:    setne %al
 ; X64-LIN-NEXT:    retq
 ;
 ; X64-WIN-LABEL: PR17487:
 ; X64-WIN:       # %bb.0:
-; X64-WIN-NEXT:    movd %ecx, %xmm0
+; X64-WIN-NEXT:    movzbl %cl, %eax
+; X64-WIN-NEXT:    movd %eax, %xmm0
 ; X64-WIN-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
 ; X64-WIN-NEXT:    pandn __xmm@{{.*}}(%rip), %xmm0
 ; X64-WIN-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
 ; X64-WIN-NEXT:    movq %xmm0, %rcx
 ; X64-WIN-NEXT:    xorl %eax, %eax
 ; X64-WIN-NEXT:    cmpq $1, %rcx
 ; X64-WIN-NEXT:    setne %al
 ; X64-WIN-NEXT:    retq