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Differential D44390

[InstCombine] [NFC] Add tests for peeking through FP casts for sign-bit compares (PR36682)
ClosedPublic

Authored by lebedev.ri on Mar 12 2018, 8:49 AM.

Details

Reviewers
spatel
majnemer
efriedma
arsenm
Commits
rG92e359ed676e: [InstCombine] [NFC] Add tests for peeking through FP casts for sign-bit…
rL327301: [InstCombine] [NFC] Add tests for peeking through FP casts for sign-bit…
Summary

This pattern came up in PR36682:
https://bugs.llvm.org/show_bug.cgi?id=36682
https://godbolt.org/g/LhuD9A

Tests for proposed fix in D44367.

Looking at the IR pattern in question, as per alive-nj, for all the type combinations i checked
(input: i16, i32, i64; intermediate: half/i16, float/i32, double/i64)
for the following icmp comparisons the sitofp+bitcast can be dropped:

  • eq 0
  • ne 0
  • slt 0
  • sle 0
  • sge 0
  • sgt 0
  • slt 1
  • sge 1
  • sle -1
  • sgt -1

I did not check vectors, but i'm guessing it's the same there.

alivenj-bitcast.txt18 KBDownload

Thus all these cases are in the testcase (along with the vector variant with additional undef element in the middle).
There are no negative patterns here (unless alive-nj lied/is broken), all of these should be optimized.

Generated with

bitcast.cpp3 KBDownload

Diff Detail

Repository
rL LLVM

Event Timeline

lebedev.ri created this revision.Mar 12 2018, 8:49 AM
Herald added a subscriber: wdng. · View Herald TranscriptMar 12 2018, 8:49 AM
spatel added inline comments.Mar 12 2018, 9:04 AM
test/Transforms/InstCombine/cast-int-icmp-eq-0.ll
89–100

As the current check line shows, this verifies that we canonicalize the predicate to 'slt'. Once that canonicalization is made, the test is identical to a later test (see below), so I don't think it's worth duplicating this or similar tests with sle/sge predicates. Remove all of those?

define i1 @i32_cast_cmp_slt_int_1_sitofp_float(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_1_sitofp_float(
; CHECK-NEXT:    [[F:%.*]] = sitofp i32 [[I:%.*]] to float
; CHECK-NEXT:    [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[B]], 1
; CHECK-NEXT:    ret i1 [[CMP]]
;
  %f = sitofp i32 %i to float
  %b = bitcast float %f to i32
  %cmp = icmp slt i32 %b, 1
  ret i1 %cmp
}
spatel added a subscriber: nlopes.Mar 12 2018, 9:11 AM

cc @nlopes because the online version of Alive at https://rise4fun.com/Alive/ doesn't recognize 'sitofp' as a valid opcode.

lebedev.ri added a comment.Mar 12 2018, 9:39 AM
In D44390#1034858, @spatel wrote:

cc @nlopes because the online version of Alive at https://rise4fun.com/Alive/ doesn't recognize 'sitofp' as a valid opcode.

Also see https://github.com/nunoplopes/alive/issues/41#issuecomment-372133708

lebedev.ri updated this revision to Diff 138043.EditedMar 12 2018, 10:03 AM
lebedev.ri marked an inline comment as done.

Removed 4 patterns:

  • sle 0 which is canonicalized to slt 1, so don't test it.
  • sge 0 which is canonicalized to sgt -1, so don't test it.
  • sge 1 which is canonicalized to sgt 0, so don't test it.
  • sle -1 which is canonicalized to slt 0, so don't test it.

(those canonical variants are already tested here.)

spatel accepted this revision.Mar 12 2018, 10:33 AM

LGTM.

This revision is now accepted and ready to land.Mar 12 2018, 10:33 AM
Closed by commit rL327301: [InstCombine] [NFC] Add tests for peeking through FP casts for sign-bit… (authored by lebedevri). · Explain WhyMar 12 2018, 10:45 AM
This revision was automatically updated to reflect the committed changes.
lebedev.ri mentioned this in D44416: [InstCombine] [NFC] Add tests for peeking through unsigned FP casts for zero-equality compares (PR36682).Mar 13 2018, 4:35 AM
lebedev.ri mentioned this in D44421: [InstSimplify] [NFC] Add tests for peeking through unsigned FP casts for sign compares (PR36682).Mar 13 2018, 4:58 AM
lebedev.ri mentioned this in D44424: [InstCombine] peek through unsigned FP casts for zero-equality compares (PR36682).Mar 13 2018, 6:20 AM
lebedev.ri mentioned this in D44425: [InstSimplify] peek through unsigned FP casts for sign-bit compares (PR36682).Mar 13 2018, 7:06 AM
Diffusion mentioned this in rL327534: [InstCombine] [NFC] Add tests for peeking through unsigned FP casts for zero….Mar 14 2018, 10:33 AM
Diffusion mentioned this in rL327535: [InstSimplify] [NFC] Add tests for peeking through unsigned FP casts for sign….
Diffusion mentioned this in rL327642: [InstSimplify] peek through unsigned FP casts for sign-bit compares (PR36682).Mar 15 2018, 9:23 AM
Diffusion mentioned this in rL327799: [InstCombine] peek through unsigned FP casts for zero-equality compares….Mar 18 2018, 8:55 AM

Revision Contents

PathSize
test/
Transforms/
InstCombine/
2349 lines

Diff 138023

test/Transforms/InstCombine/cast-int-icmp-eq-0.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
; target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
; This is https://bugs.llvm.org/show_bug.cgi?id=36682
; FIXME: *all* of these are true tests.
; In *all* of these, sitofp and bitcast should be instcombine'd out.
define i1 @i32_cast_cmp_eq_int_0_sitofp_float(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_eq_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to float
%b = bitcast float %f to i32
%cmp = icmp eq i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_eq_int_0_sitofp_float_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_eq_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp eq <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_ne_int_0_sitofp_float(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_ne_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to float
%b = bitcast float %f to i32
%cmp = icmp ne i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_ne_int_0_sitofp_float_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_ne_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp ne <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_slt_int_0_sitofp_float(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to float
%b = bitcast float %f to i32
%cmp = icmp slt i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_slt_int_0_sitofp_float_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp slt <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sle_int_0_sitofp_float(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sle_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to float
%b = bitcast float %f to i32
%cmp = icmp sle i32 %b, 0
ret i1 %cmp
}
spatelUnsubmitted
Done
ReplyInline Actions

As the current check line shows, this verifies that we canonicalize the predicate to 'slt'. Once that canonicalization is made, the test is identical to a later test (see below), so I don't think it's worth duplicating this or similar tests with sle/sge predicates. Remove all of those?

define i1 @i32_cast_cmp_slt_int_1_sitofp_float(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_1_sitofp_float(
; CHECK-NEXT:    [[F:%.*]] = sitofp i32 [[I:%.*]] to float
; CHECK-NEXT:    [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[B]], 1
; CHECK-NEXT:    ret i1 [[CMP]]
;
  %f = sitofp i32 %i to float
  %b = bitcast float %f to i32
  %cmp = icmp slt i32 %b, 1
  ret i1 %cmp
}
spatel: As the current check line shows, this verifies that we canonicalize the predicate to 'slt'.
define <3 x i1> @i32_cast_cmp_sle_int_0_sitofp_float_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sle_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 1, i32 undef, i32 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sle <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sge_int_0_sitofp_float(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sge_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to float
%b = bitcast float %f to i32
%cmp = icmp sge i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sge_int_0_sitofp_float_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sge_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 -1, i32 undef, i32 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sge <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sgt_int_0_sitofp_float(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sgt_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to float
%b = bitcast float %f to i32
%cmp = icmp sgt i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sgt_int_0_sitofp_float_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sgt_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sgt <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_slt_int_1_sitofp_float(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_1_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to float
%b = bitcast float %f to i32
%cmp = icmp slt i32 %b, 1
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_slt_int_1_sitofp_float_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_1_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 1, i32 undef, i32 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp slt <3 x i32> %b, <i32 1, i32 undef, i32 1>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sge_int_1_sitofp_float(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sge_int_1_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to float
%b = bitcast float %f to i32
%cmp = icmp sge i32 %b, 1
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sge_int_1_sitofp_float_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sge_int_1_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sge <3 x i32> %b, <i32 1, i32 undef, i32 1>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sle_int_m1_sitofp_float(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sle_int_m1_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to float
%b = bitcast float %f to i32
%cmp = icmp sle i32 %b, -1
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sle_int_m1_sitofp_float_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sle_int_m1_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sle <3 x i32> %b, <i32 -1, i32 undef, i32 -1>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sgt_int_m1_sitofp_float(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sgt_int_m1_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to float
%b = bitcast float %f to i32
%cmp = icmp sgt i32 %b, -1
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sgt_int_m1_sitofp_float_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sgt_int_m1_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 -1, i32 undef, i32 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sgt <3 x i32> %b, <i32 -1, i32 undef, i32 -1>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_eq_int_0_sitofp_double(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_eq_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to double
%b = bitcast double %f to i64
%cmp = icmp eq i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_eq_int_0_sitofp_double_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_eq_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp eq <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_ne_int_0_sitofp_double(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_ne_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to double
%b = bitcast double %f to i64
%cmp = icmp ne i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_ne_int_0_sitofp_double_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_ne_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp ne <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_slt_int_0_sitofp_double(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to double
%b = bitcast double %f to i64
%cmp = icmp slt i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_slt_int_0_sitofp_double_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp slt <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sle_int_0_sitofp_double(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sle_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to double
%b = bitcast double %f to i64
%cmp = icmp sle i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sle_int_0_sitofp_double_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sle_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 1, i64 undef, i64 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sle <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sge_int_0_sitofp_double(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sge_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to double
%b = bitcast double %f to i64
%cmp = icmp sge i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sge_int_0_sitofp_double_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sge_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 -1, i64 undef, i64 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sge <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sgt_int_0_sitofp_double(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sgt_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to double
%b = bitcast double %f to i64
%cmp = icmp sgt i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sgt_int_0_sitofp_double_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sgt_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sgt <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_slt_int_1_sitofp_double(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_1_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to double
%b = bitcast double %f to i64
%cmp = icmp slt i64 %b, 1
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_slt_int_1_sitofp_double_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_1_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 1, i64 undef, i64 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp slt <3 x i64> %b, <i64 1, i64 undef, i64 1>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sge_int_1_sitofp_double(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sge_int_1_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to double
%b = bitcast double %f to i64
%cmp = icmp sge i64 %b, 1
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sge_int_1_sitofp_double_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sge_int_1_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sge <3 x i64> %b, <i64 1, i64 undef, i64 1>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sle_int_m1_sitofp_double(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sle_int_m1_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to double
%b = bitcast double %f to i64
%cmp = icmp sle i64 %b, -1
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sle_int_m1_sitofp_double_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sle_int_m1_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sle <3 x i64> %b, <i64 -1, i64 undef, i64 -1>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sgt_int_m1_sitofp_double(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sgt_int_m1_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to double
%b = bitcast double %f to i64
%cmp = icmp sgt i64 %b, -1
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sgt_int_m1_sitofp_double_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sgt_int_m1_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 -1, i64 undef, i64 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sgt <3 x i64> %b, <i64 -1, i64 undef, i64 -1>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_eq_int_0_sitofp_half(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_eq_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to half
%b = bitcast half %f to i16
%cmp = icmp eq i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_eq_int_0_sitofp_half_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_eq_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp eq <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_ne_int_0_sitofp_half(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_ne_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to half
%b = bitcast half %f to i16
%cmp = icmp ne i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_ne_int_0_sitofp_half_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_ne_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp ne <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_slt_int_0_sitofp_half(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to half
%b = bitcast half %f to i16
%cmp = icmp slt i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_slt_int_0_sitofp_half_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp slt <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sle_int_0_sitofp_half(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sle_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to half
%b = bitcast half %f to i16
%cmp = icmp sle i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sle_int_0_sitofp_half_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sle_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 1, i16 undef, i16 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sle <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sge_int_0_sitofp_half(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sge_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i16 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to half
%b = bitcast half %f to i16
%cmp = icmp sge i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sge_int_0_sitofp_half_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sge_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 -1, i16 undef, i16 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sge <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sgt_int_0_sitofp_half(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sgt_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to half
%b = bitcast half %f to i16
%cmp = icmp sgt i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sgt_int_0_sitofp_half_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sgt_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sgt <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_slt_int_1_sitofp_half(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_1_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to half
%b = bitcast half %f to i16
%cmp = icmp slt i16 %b, 1
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_slt_int_1_sitofp_half_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_slt_int_1_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 1, i16 undef, i16 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp slt <3 x i16> %b, <i16 1, i16 undef, i16 1>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sge_int_1_sitofp_half(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sge_int_1_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to half
%b = bitcast half %f to i16
%cmp = icmp sge i16 %b, 1
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sge_int_1_sitofp_half_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sge_int_1_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sge <3 x i16> %b, <i16 1, i16 undef, i16 1>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sle_int_m1_sitofp_half(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sle_int_m1_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to half
%b = bitcast half %f to i16
%cmp = icmp sle i16 %b, -1
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sle_int_m1_sitofp_half_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sle_int_m1_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sle <3 x i16> %b, <i16 -1, i16 undef, i16 -1>
ret <3 x i1> %cmp
}
define i1 @i32_cast_cmp_sgt_int_m1_sitofp_half(i32 %i) {
; CHECK-LABEL: @i32_cast_cmp_sgt_int_m1_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i32 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i16 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i32 %i to half
%b = bitcast half %f to i16
%cmp = icmp sgt i16 %b, -1
ret i1 %cmp
}
define <3 x i1> @i32_cast_cmp_sgt_int_m1_sitofp_half_vec(<3 x i32> %i) {
; CHECK-LABEL: @i32_cast_cmp_sgt_int_m1_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 -1, i16 undef, i16 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i32> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sgt <3 x i16> %b, <i16 -1, i16 undef, i16 -1>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_eq_int_0_sitofp_float(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_eq_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to float
%b = bitcast float %f to i32
%cmp = icmp eq i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_eq_int_0_sitofp_float_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_eq_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp eq <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_ne_int_0_sitofp_float(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_ne_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to float
%b = bitcast float %f to i32
%cmp = icmp ne i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_ne_int_0_sitofp_float_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_ne_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp ne <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_slt_int_0_sitofp_float(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_slt_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to float
%b = bitcast float %f to i32
%cmp = icmp slt i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_slt_int_0_sitofp_float_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_slt_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp slt <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sle_int_0_sitofp_float(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sle_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to float
%b = bitcast float %f to i32
%cmp = icmp sle i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sle_int_0_sitofp_float_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sle_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 1, i32 undef, i32 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sle <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sge_int_0_sitofp_float(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sge_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to float
%b = bitcast float %f to i32
%cmp = icmp sge i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sge_int_0_sitofp_float_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sge_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 -1, i32 undef, i32 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sge <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sgt_int_0_sitofp_float(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sgt_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to float
%b = bitcast float %f to i32
%cmp = icmp sgt i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sgt_int_0_sitofp_float_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sgt_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sgt <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_slt_int_1_sitofp_float(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_slt_int_1_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to float
%b = bitcast float %f to i32
%cmp = icmp slt i32 %b, 1
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_slt_int_1_sitofp_float_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_slt_int_1_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 1, i32 undef, i32 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp slt <3 x i32> %b, <i32 1, i32 undef, i32 1>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sge_int_1_sitofp_float(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sge_int_1_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to float
%b = bitcast float %f to i32
%cmp = icmp sge i32 %b, 1
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sge_int_1_sitofp_float_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sge_int_1_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sge <3 x i32> %b, <i32 1, i32 undef, i32 1>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sle_int_m1_sitofp_float(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sle_int_m1_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to float
%b = bitcast float %f to i32
%cmp = icmp sle i32 %b, -1
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sle_int_m1_sitofp_float_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sle_int_m1_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sle <3 x i32> %b, <i32 -1, i32 undef, i32 -1>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sgt_int_m1_sitofp_float(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sgt_int_m1_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to float
%b = bitcast float %f to i32
%cmp = icmp sgt i32 %b, -1
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sgt_int_m1_sitofp_float_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sgt_int_m1_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 -1, i32 undef, i32 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sgt <3 x i32> %b, <i32 -1, i32 undef, i32 -1>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_eq_int_0_sitofp_double(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_eq_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to double
%b = bitcast double %f to i64
%cmp = icmp eq i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_eq_int_0_sitofp_double_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_eq_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp eq <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_ne_int_0_sitofp_double(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_ne_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to double
%b = bitcast double %f to i64
%cmp = icmp ne i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_ne_int_0_sitofp_double_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_ne_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp ne <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_slt_int_0_sitofp_double(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_slt_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to double
%b = bitcast double %f to i64
%cmp = icmp slt i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_slt_int_0_sitofp_double_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_slt_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp slt <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sle_int_0_sitofp_double(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sle_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to double
%b = bitcast double %f to i64
%cmp = icmp sle i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sle_int_0_sitofp_double_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sle_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 1, i64 undef, i64 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sle <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sge_int_0_sitofp_double(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sge_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to double
%b = bitcast double %f to i64
%cmp = icmp sge i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sge_int_0_sitofp_double_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sge_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 -1, i64 undef, i64 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sge <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sgt_int_0_sitofp_double(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sgt_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to double
%b = bitcast double %f to i64
%cmp = icmp sgt i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sgt_int_0_sitofp_double_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sgt_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sgt <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_slt_int_1_sitofp_double(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_slt_int_1_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to double
%b = bitcast double %f to i64
%cmp = icmp slt i64 %b, 1
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_slt_int_1_sitofp_double_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_slt_int_1_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 1, i64 undef, i64 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp slt <3 x i64> %b, <i64 1, i64 undef, i64 1>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sge_int_1_sitofp_double(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sge_int_1_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to double
%b = bitcast double %f to i64
%cmp = icmp sge i64 %b, 1
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sge_int_1_sitofp_double_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sge_int_1_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sge <3 x i64> %b, <i64 1, i64 undef, i64 1>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sle_int_m1_sitofp_double(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sle_int_m1_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to double
%b = bitcast double %f to i64
%cmp = icmp sle i64 %b, -1
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sle_int_m1_sitofp_double_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sle_int_m1_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sle <3 x i64> %b, <i64 -1, i64 undef, i64 -1>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sgt_int_m1_sitofp_double(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sgt_int_m1_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to double
%b = bitcast double %f to i64
%cmp = icmp sgt i64 %b, -1
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sgt_int_m1_sitofp_double_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sgt_int_m1_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 -1, i64 undef, i64 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sgt <3 x i64> %b, <i64 -1, i64 undef, i64 -1>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_eq_int_0_sitofp_half(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_eq_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to half
%b = bitcast half %f to i16
%cmp = icmp eq i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_eq_int_0_sitofp_half_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_eq_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp eq <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_ne_int_0_sitofp_half(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_ne_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to half
%b = bitcast half %f to i16
%cmp = icmp ne i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_ne_int_0_sitofp_half_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_ne_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp ne <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_slt_int_0_sitofp_half(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_slt_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to half
%b = bitcast half %f to i16
%cmp = icmp slt i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_slt_int_0_sitofp_half_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_slt_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp slt <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sle_int_0_sitofp_half(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sle_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to half
%b = bitcast half %f to i16
%cmp = icmp sle i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sle_int_0_sitofp_half_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sle_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 1, i16 undef, i16 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sle <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sge_int_0_sitofp_half(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sge_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i16 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to half
%b = bitcast half %f to i16
%cmp = icmp sge i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sge_int_0_sitofp_half_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sge_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 -1, i16 undef, i16 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sge <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sgt_int_0_sitofp_half(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sgt_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to half
%b = bitcast half %f to i16
%cmp = icmp sgt i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sgt_int_0_sitofp_half_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sgt_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sgt <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_slt_int_1_sitofp_half(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_slt_int_1_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to half
%b = bitcast half %f to i16
%cmp = icmp slt i16 %b, 1
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_slt_int_1_sitofp_half_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_slt_int_1_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 1, i16 undef, i16 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp slt <3 x i16> %b, <i16 1, i16 undef, i16 1>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sge_int_1_sitofp_half(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sge_int_1_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to half
%b = bitcast half %f to i16
%cmp = icmp sge i16 %b, 1
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sge_int_1_sitofp_half_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sge_int_1_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sge <3 x i16> %b, <i16 1, i16 undef, i16 1>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sle_int_m1_sitofp_half(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sle_int_m1_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to half
%b = bitcast half %f to i16
%cmp = icmp sle i16 %b, -1
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sle_int_m1_sitofp_half_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sle_int_m1_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sle <3 x i16> %b, <i16 -1, i16 undef, i16 -1>
ret <3 x i1> %cmp
}
define i1 @i64_cast_cmp_sgt_int_m1_sitofp_half(i64 %i) {
; CHECK-LABEL: @i64_cast_cmp_sgt_int_m1_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i64 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i16 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i64 %i to half
%b = bitcast half %f to i16
%cmp = icmp sgt i16 %b, -1
ret i1 %cmp
}
define <3 x i1> @i64_cast_cmp_sgt_int_m1_sitofp_half_vec(<3 x i64> %i) {
; CHECK-LABEL: @i64_cast_cmp_sgt_int_m1_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 -1, i16 undef, i16 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i64> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sgt <3 x i16> %b, <i16 -1, i16 undef, i16 -1>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_eq_int_0_sitofp_float(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_eq_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to float
%b = bitcast float %f to i32
%cmp = icmp eq i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_eq_int_0_sitofp_float_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_eq_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp eq <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_ne_int_0_sitofp_float(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_ne_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to float
%b = bitcast float %f to i32
%cmp = icmp ne i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_ne_int_0_sitofp_float_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_ne_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp ne <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_slt_int_0_sitofp_float(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_slt_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to float
%b = bitcast float %f to i32
%cmp = icmp slt i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_slt_int_0_sitofp_float_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_slt_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp slt <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sle_int_0_sitofp_float(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sle_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to float
%b = bitcast float %f to i32
%cmp = icmp sle i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sle_int_0_sitofp_float_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sle_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 1, i32 undef, i32 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sle <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sge_int_0_sitofp_float(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sge_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to float
%b = bitcast float %f to i32
%cmp = icmp sge i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sge_int_0_sitofp_float_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sge_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 -1, i32 undef, i32 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sge <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sgt_int_0_sitofp_float(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sgt_int_0_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to float
%b = bitcast float %f to i32
%cmp = icmp sgt i32 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sgt_int_0_sitofp_float_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sgt_int_0_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sgt <3 x i32> %b, <i32 0, i32 undef, i32 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_slt_int_1_sitofp_float(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_slt_int_1_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to float
%b = bitcast float %f to i32
%cmp = icmp slt i32 %b, 1
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_slt_int_1_sitofp_float_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_slt_int_1_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 1, i32 undef, i32 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp slt <3 x i32> %b, <i32 1, i32 undef, i32 1>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sge_int_1_sitofp_float(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sge_int_1_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to float
%b = bitcast float %f to i32
%cmp = icmp sge i32 %b, 1
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sge_int_1_sitofp_float_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sge_int_1_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sge <3 x i32> %b, <i32 1, i32 undef, i32 1>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sle_int_m1_sitofp_float(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sle_int_m1_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to float
%b = bitcast float %f to i32
%cmp = icmp sle i32 %b, -1
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sle_int_m1_sitofp_float_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sle_int_m1_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sle <3 x i32> %b, <i32 -1, i32 undef, i32 -1>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sgt_int_m1_sitofp_float(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sgt_int_m1_sitofp_float(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to float
; CHECK-NEXT: [[B:%.*]] = bitcast float [[F]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to float
%b = bitcast float %f to i32
%cmp = icmp sgt i32 %b, -1
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sgt_int_m1_sitofp_float_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sgt_int_m1_sitofp_float_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x float>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 -1, i32 undef, i32 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x float>
%b = bitcast <3 x float> %f to <3 x i32>
%cmp = icmp sgt <3 x i32> %b, <i32 -1, i32 undef, i32 -1>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_eq_int_0_sitofp_double(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_eq_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to double
%b = bitcast double %f to i64
%cmp = icmp eq i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_eq_int_0_sitofp_double_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_eq_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp eq <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_ne_int_0_sitofp_double(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_ne_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to double
%b = bitcast double %f to i64
%cmp = icmp ne i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_ne_int_0_sitofp_double_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_ne_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp ne <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_slt_int_0_sitofp_double(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_slt_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to double
%b = bitcast double %f to i64
%cmp = icmp slt i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_slt_int_0_sitofp_double_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_slt_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp slt <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sle_int_0_sitofp_double(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sle_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to double
%b = bitcast double %f to i64
%cmp = icmp sle i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sle_int_0_sitofp_double_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sle_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 1, i64 undef, i64 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sle <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sge_int_0_sitofp_double(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sge_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to double
%b = bitcast double %f to i64
%cmp = icmp sge i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sge_int_0_sitofp_double_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sge_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 -1, i64 undef, i64 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sge <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sgt_int_0_sitofp_double(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sgt_int_0_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to double
%b = bitcast double %f to i64
%cmp = icmp sgt i64 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sgt_int_0_sitofp_double_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sgt_int_0_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sgt <3 x i64> %b, <i64 0, i64 undef, i64 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_slt_int_1_sitofp_double(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_slt_int_1_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to double
%b = bitcast double %f to i64
%cmp = icmp slt i64 %b, 1
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_slt_int_1_sitofp_double_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_slt_int_1_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 1, i64 undef, i64 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp slt <3 x i64> %b, <i64 1, i64 undef, i64 1>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sge_int_1_sitofp_double(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sge_int_1_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to double
%b = bitcast double %f to i64
%cmp = icmp sge i64 %b, 1
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sge_int_1_sitofp_double_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sge_int_1_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sge <3 x i64> %b, <i64 1, i64 undef, i64 1>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sle_int_m1_sitofp_double(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sle_int_m1_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to double
%b = bitcast double %f to i64
%cmp = icmp sle i64 %b, -1
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sle_int_m1_sitofp_double_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sle_int_m1_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sle <3 x i64> %b, <i64 -1, i64 undef, i64 -1>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sgt_int_m1_sitofp_double(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sgt_int_m1_sitofp_double(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to double
; CHECK-NEXT: [[B:%.*]] = bitcast double [[F]] to i64
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to double
%b = bitcast double %f to i64
%cmp = icmp sgt i64 %b, -1
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sgt_int_m1_sitofp_double_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sgt_int_m1_sitofp_double_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x double>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 -1, i64 undef, i64 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x double>
%b = bitcast <3 x double> %f to <3 x i64>
%cmp = icmp sgt <3 x i64> %b, <i64 -1, i64 undef, i64 -1>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_eq_int_0_sitofp_half(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_eq_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to half
%b = bitcast half %f to i16
%cmp = icmp eq i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_eq_int_0_sitofp_half_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_eq_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp eq <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_ne_int_0_sitofp_half(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_ne_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to half
%b = bitcast half %f to i16
%cmp = icmp ne i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_ne_int_0_sitofp_half_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_ne_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp ne <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_slt_int_0_sitofp_half(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_slt_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to half
%b = bitcast half %f to i16
%cmp = icmp slt i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_slt_int_0_sitofp_half_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_slt_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp slt <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sle_int_0_sitofp_half(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sle_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to half
%b = bitcast half %f to i16
%cmp = icmp sle i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sle_int_0_sitofp_half_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sle_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 1, i16 undef, i16 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sle <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sge_int_0_sitofp_half(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sge_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i16 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to half
%b = bitcast half %f to i16
%cmp = icmp sge i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sge_int_0_sitofp_half_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sge_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 -1, i16 undef, i16 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sge <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sgt_int_0_sitofp_half(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sgt_int_0_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to half
%b = bitcast half %f to i16
%cmp = icmp sgt i16 %b, 0
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sgt_int_0_sitofp_half_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sgt_int_0_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sgt <3 x i16> %b, <i16 0, i16 undef, i16 0>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_slt_int_1_sitofp_half(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_slt_int_1_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[B]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to half
%b = bitcast half %f to i16
%cmp = icmp slt i16 %b, 1
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_slt_int_1_sitofp_half_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_slt_int_1_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 1, i16 undef, i16 1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp slt <3 x i16> %b, <i16 1, i16 undef, i16 1>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sge_int_1_sitofp_half(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sge_int_1_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to half
%b = bitcast half %f to i16
%cmp = icmp sge i16 %b, 1
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sge_int_1_sitofp_half_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sge_int_1_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sge <3 x i16> %b, <i16 1, i16 undef, i16 1>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sle_int_m1_sitofp_half(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sle_int_m1_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[B]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to half
%b = bitcast half %f to i16
%cmp = icmp sle i16 %b, -1
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sle_int_m1_sitofp_half_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sle_int_m1_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sle <3 x i16> %b, <i16 -1, i16 undef, i16 -1>
ret <3 x i1> %cmp
}
define i1 @i16_cast_cmp_sgt_int_m1_sitofp_half(i16 %i) {
; CHECK-LABEL: @i16_cast_cmp_sgt_int_m1_sitofp_half(
; CHECK-NEXT: [[F:%.*]] = sitofp i16 [[I:%.*]] to half
; CHECK-NEXT: [[B:%.*]] = bitcast half [[F]] to i16
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i16 [[B]], -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%f = sitofp i16 %i to half
%b = bitcast half %f to i16
%cmp = icmp sgt i16 %b, -1
ret i1 %cmp
}
define <3 x i1> @i16_cast_cmp_sgt_int_m1_sitofp_half_vec(<3 x i16> %i) {
; CHECK-LABEL: @i16_cast_cmp_sgt_int_m1_sitofp_half_vec(
; CHECK-NEXT: [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x half>
; CHECK-NEXT: [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 -1, i16 undef, i16 -1>
; CHECK-NEXT: ret <3 x i1> [[CMP]]
;
%f = sitofp <3 x i16> %i to <3 x half>
%b = bitcast <3 x half> %f to <3 x i16>
%cmp = icmp sgt <3 x i16> %b, <i16 -1, i16 undef, i16 -1>
ret <3 x i1> %cmp
}