[InstCombine] peek through FP casts for sign-bit compares (PR36682)

[spatel]

Summary

This pattern came up in PR36682:
https://bugs.llvm.org/show_bug.cgi?id=36682
https://godbolt.org/g/LhuD9A

The 'undef' in the vector test is just there to verify a recent improvement in pattern-matching: vector constant matches can include undef elements.

[lebedev.ri]

In the mean time i experimented with generating the testcases (clearly, overdone it), and this patch does not handle all the cases i've come up with. Or maybe the cases are just invalid, which is more likely.

cast-int-icmp-eq-0.ll128 KBDownload

(with this patch)

Generated with:

/tmp$ clang++ bitcast.cpp
/build/llvm/test/Transforms/InstCombine$ /tmp/a.out > cast-int-icmp-eq-0.ll; /build/llvm/utils/update_test_checks.py --opt=/build/llvm-build-Clang-release/bin/opt cast-int-icmp-eq-0.ll

bitcast.cpp3 KBDownload

[spatel]

In D44367#1034194, @lebedev.ri wrote:

In the mean time i experimented with generating the testcases (clearly, overdone it), and this patch does not handle all the cases i've come up with. Or maybe the cases are just invalid, which is more likely.

Nice. I thought about the X == 0 and X != 0 cases just after I posted this. I think those are safe to add in a small follow-up patch.

We should canonicalize other signbit-check predicates (sle / sge) to this form. Are you seeing any of those cases fail to match with this patch?

[lebedev.ri]

In D44367#1034208, @spatel wrote:

In D44367#1034194, @lebedev.ri wrote:

In the mean time i experimented with generating the testcases (clearly, overdone it), and this patch does not handle all the cases i've come up with. Or maybe the cases are just invalid, which is more likely.

Nice. I thought about the X == 0 and X != 0 cases just after I posted this. I think those are safe to add in a small follow-up patch.

We should canonicalize other signbit-check predicates (sle / sge) to this form. Are you seeing any of those cases fail to match with this patch?

Eh, hard to say, there are more not changed patterns than changed, as you can see from the attached cast-int-icmp-eq-0.ll.
In particular, if the sizes change (when input size != bitcast fp type), then it's not handled.
All uitofp are not handled, obviously. And non slt 0/sgt -1 condition codes are not touched, too.

Should some version of that cast-int-icmp-eq-0.ll be committed? (anything missing from it?)

[spatel]

In D44367#1034211, @lebedev.ri wrote:

In D44367#1034208, @spatel wrote:

In D44367#1034194, @lebedev.ri wrote:

In the mean time i experimented with generating the testcases (clearly, overdone it), and this patch does not handle all the cases i've come up with. Or maybe the cases are just invalid, which is more likely.

Nice. I thought about the X == 0 and X != 0 cases just after I posted this. I think those are safe to add in a small follow-up patch.

We should canonicalize other signbit-check predicates (sle / sge) to this form. Are you seeing any of those cases fail to match with this patch?

Eh, hard to say, there are more not changed patterns than changed, as you can see from the attached cast-int-icmp-eq-0.ll.
In particular, if the sizes change (when input size != bitcast fp type), then it's not handled.

The tests in this patch have size-changing casts (both larger and smaller than the original type). Did I miss something?

All uitofp are not handled, obviously. And non slt 0/sgt -1 condition codes are not touched, too.

I think uitofp followed by a signbit check will be optimized away completely to true/false, so that can go in InstSimplify. That's another small, independent patch.

Should some version of that cast-int-icmp-eq-0.ll be committed? (anything missing from it?)

Sure - if you want to check it in, I can rebase this patch to show the diffs. Including some weird FP types like PPC_FP128 might be interesting. And having some 'undef' in vector tests as I have here also increases coverage.
But I don't see much value in repeating every test for every combination of types, sle/sge, or vector+scalar repeats of everything (if we know the transform works for at least one vector type, then it almost certainly works in the other cases).

[lebedev.ri]

Ok, i have limited the test generator to just the sitofp, slt 0 / sle -1 / sgt -1 / sge 0, added undef in the middle of vector variant.
Good news is that all the scalar cases are indeed handled.
Bad news is that half of the vector cases is not handled.

cast-int-icmp-eq-0.ll17 KBDownload

<- just all the vector cases, with your patch.

$ grep "CHECK-NEXT" cast-int-icmp-eq-0.ll | grep icmp | wc -l
36
$ grep "CHECK-NEXT" cast-int-icmp-eq-0.ll | grep bitcast | wc -l
18 # (so exactly half)
$ grep "CHECK-NEXT" cast-int-icmp-eq-0.ll | grep -B 1 -A 1 bitcast
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x float>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x float>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x double>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x double>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x half>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x half>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x float>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x float>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x double>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x double>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x half>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x half>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x float>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x float>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i32> [[B]], <i32 0, i32 undef, i32 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x double>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x double>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i64> [[B]], <i64 0, i64 undef, i64 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x half>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>
--
; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x half>
; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <3 x i16> [[B]], <i16 0, i16 undef, i16 0>

Unless it is because i'm using yesterday's trunk, I think the test coverage needs improving.
I think i should go ahead and commit that initial testfile now, unless it is too large?

[spatel]

In D44367#1034253, @lebedev.ri wrote:

Ok, i have limited the test generator to just the sitofp, slt 0 / sle -1 / sgt -1 / sge 0, added undef in the middle of vector variant.
Good news is that all the scalar cases are indeed handled.
Bad news is that half of the vector cases is not handled.

Ah, you're detecting a missing undef pattern match for m_Zero(). Nobody made that change to that matcher yet, unlike m_AllOnes().

Unless it is because i'm using yesterday's trunk, I think the test coverage needs improving.
I think i should go ahead and commit that initial testfile now, unless it is too large?

I think that's fine. We can always remove some tests if we think they don't add value.

[spatel]

In D44367#1034254, @spatel wrote:

In D44367#1034253, @lebedev.ri wrote:

Ok, i have limited the test generator to just the sitofp, slt 0 / sle -1 / sgt -1 / sge 0, added undef in the middle of vector variant.
Good news is that all the scalar cases are indeed handled.
Bad news is that half of the vector cases is not handled.

Ah, you're detecting a missing undef pattern match for m_Zero(). Nobody made that change to that matcher yet, unlike m_AllOnes().

To make that clear - if you make the vector constants 'zeroinitializer' or make all elements explicitly '0' rather than including undef, I expect them to be folded.

[lebedev.ri]

Looking more at this, as per alive-nj, for all the type combinations i checked
(input: i16, i32, i64; intermediate: half/i16, float/i32, double/i64)
for the following icmp comparisons the sitofp+bitcast can be dropped:

• eq 0
• ne 0
• slt 0
• sle 0
• sge 0
• sgt 0
• slt 1
• sge 1
• sle -1
• sgt -1

I did not check vectors, but i'm guessing it's the same there.

alivenj-bitcast.txt18 KBDownload

Will put up the testcase diff up next.

[spatel]

Patch updated:
This is only a rebase with the new tests from rL327301 and deleting the redundant ones.

Should we handle x < 1, x > 0, x == 0, and x != 0 in this patch too?

[lebedev.ri]

In D44367#1035270, @spatel wrote:

Patch updated:
This is only a rebase with the new tests from rL327301 and deleting the redundant ones.

Thanks, looks like a start!

Should we handle x < 1, x > 0, x == 0, and x != 0 in this patch too?

Those don't really match the differential's subject, i'd say they should be in the next one[s].
(I suppose i can implement those cases now that there is an example :))

[spatel]

In D44367#1035281, @lebedev.ri wrote:

Those don't really match the differential's subject, i'd say they should be in the next one[s].
(I suppose i can implement those cases now that there is an example :))

No need - I already have the patch done. I just wasn't sure whether 1 step or multiple would be preferred.
I haven't worked on the uitofp InstSimplify patch if you want to handle that one.

[lebedev.ri]

In D44367#1035291, @spatel wrote:

In D44367#1035281, @lebedev.ri wrote:

Those don't really match the differential's subject, i'd say they should be in the next one[s].
(I suppose i can implement those cases now that there is an example :))

No need - I already have the patch done. I just wasn't sure whether 1 step or multiple would be preferred.

I haven't worked on the uitofp InstSimplify patch if you want to handle that one.

Ok, sounds good, i'll look into that then.

[lebedev.ri]

In D44367#1035664, @lebedev.ri wrote:

In D44367#1035291, @spatel wrote:

In D44367#1035281, @lebedev.ri wrote:

Those don't really match the differential's subject, i'd say they should be in the next one[s].
(I suppose i can implement those cases now that there is an example :))

No need - I already have the patch done. I just wasn't sure whether 1 step or multiple would be preferred.

I haven't worked on the uitofp InstSimplify patch if you want to handle that one.

Ok, sounds good, i'll look into that then.

And done, D44416 / D44421 / D44424 / D44425.
Only two patterns in each, others are either canonicalized to them, or are invalid as per alive.

[lebedev.ri]

This needs a rebase now that D44424 has landed, but otherwise this looks good to me, since it's very similar to those two commits.

[spatel]

Patch updated:
Rebased against trunk.

[lebedev.ri]

In D44367#1041895, @spatel wrote:

Patch updated:
Rebased against trunk.

Oh, sure, i did not realize this was blocked on me :)
LGTM, thank you!

llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp

if (Op0->getType()->isPointerTy() && I.isEquality()) {
     if (auto *Alloca = dyn_cast<AllocaInst>(GetUnderlyingObject(Op0, DL)))
       if (Instruction *New = foldAllocaCmp(I, Alloca, Op1))
         return New;
     if (auto *Alloca = dyn_cast<AllocaInst>(GetUnderlyingObject(Op1, DL)))
       if (Instruction *New = foldAllocaCmp(I, Alloca, Op0))
         return New;
   }
 
+  // Sign-bit checks are preserved through signed floating-point casts:
+  // icmp slt (bitcast (sitofp X)),  0 --> icmp slt X,  0
+  // icmp sgt (bitcast (sitofp X)), -1 --> icmp sgt X, -1
   Value *X;
+  if (match(Op0, m_BitCast(m_SIToFP(m_Value(X))))) {
+    if (Pred == ICmpInst::ICMP_SLT && match(Op1, m_Zero()))
+      return new ICmpInst(Pred, X, ConstantInt::getNullValue(X->getType()));
+    if (Pred == ICmpInst::ICMP_SGT && match(Op1, m_AllOnes()))
+      return new ICmpInst(Pred, X, ConstantInt::getAllOnesValue(X->getType()));
+  }
 
   // Zero-equality checks are preserved through unsigned floating-point casts:
   // icmp eq (bitcast (uitofp X)), 0 --> icmp eq X, 0
   // icmp ne (bitcast (uitofp X)), 0 --> icmp ne X, 0
   if (match(Op0, m_BitCast(m_UIToFP(m_Value(X)))))
     if (I.isEquality() && match(Op1, m_Zero()))
       return new ICmpInst(Pred, X, ConstantInt::getNullValue(X->getType()));
 

llvm/trunk/test/Transforms/InstCombine/cast-int-icmp-eq-0.ll

;
   %f = sitofp <3 x i32> %i to  <3 x float>
   %b = bitcast <3 x float> %f to <3 x i32>
   %cmp = icmp ne <3 x i32> %b, <i32 0, i32 undef, i32 0>
   ret <3 x i1> %cmp
 }
 
 define i1 @i32_cast_cmp_slt_int_0_sitofp_float(i32 %i) {
 ; CHECK-LABEL: @i32_cast_cmp_slt_int_0_sitofp_float(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i32 [[I:%.*]] to float
-; CHECK-NEXT:    [[B:%.*]] = bitcast float [[F]] to i32
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[B]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[I:%.*]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i32 %i to float
   %b = bitcast float %f to i32
   %cmp = icmp slt i32 %b, 0
   ret i1 %cmp
 }
 
;
   %f = sitofp <3 x i32> %i to  <3 x float>
   %b = bitcast <3 x float> %f to <3 x i32>
   %cmp = icmp slt <3 x i32> %b, <i32 1, i32 undef, i32 1>
   ret <3 x i1> %cmp
 }
 
 define i1 @i32_cast_cmp_sgt_int_m1_sitofp_float(i32 %i) {
 ; CHECK-LABEL: @i32_cast_cmp_sgt_int_m1_sitofp_float(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i32 [[I:%.*]] to float
-; CHECK-NEXT:    [[B:%.*]] = bitcast float [[F]] to i32
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[B]], -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[I:%.*]], -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i32 %i to float
   %b = bitcast float %f to i32
   %cmp = icmp sgt i32 %b, -1
   ret i1 %cmp
 }
 
 define <3 x i1> @i32_cast_cmp_sgt_int_m1_sitofp_float_vec(<3 x i32> %i) {
 ; CHECK-LABEL: @i32_cast_cmp_sgt_int_m1_sitofp_float_vec(
-; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x float>
-; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 -1, i32 undef, i32 -1>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i32> [[I:%.*]], <i32 -1, i32 -1, i32 -1>
 ; CHECK-NEXT:    ret <3 x i1> [[CMP]]
 ;
   %f = sitofp <3 x i32> %i to  <3 x float>
   %b = bitcast <3 x float> %f to <3 x i32>
   %cmp = icmp sgt <3 x i32> %b, <i32 -1, i32 undef, i32 -1>
   ret <3 x i1> %cmp
 }
 
;
   %f = sitofp <3 x i32> %i to  <3 x double>
   %b = bitcast <3 x double> %f to <3 x i64>
   %cmp = icmp ne <3 x i64> %b, <i64 0, i64 undef, i64 0>
   ret <3 x i1> %cmp
 }
 
 define i1 @i32_cast_cmp_slt_int_0_sitofp_double(i32 %i) {
 ; CHECK-LABEL: @i32_cast_cmp_slt_int_0_sitofp_double(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i32 [[I:%.*]] to double
-; CHECK-NEXT:    [[B:%.*]] = bitcast double [[F]] to i64
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i64 [[B]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[I:%.*]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i32 %i to double
   %b = bitcast double %f to i64
   %cmp = icmp slt i64 %b, 0
   ret i1 %cmp
 }
 
;
   %f = sitofp <3 x i32> %i to  <3 x double>
   %b = bitcast <3 x double> %f to <3 x i64>
   %cmp = icmp slt <3 x i64> %b, <i64 1, i64 undef, i64 1>
   ret <3 x i1> %cmp
 }
 
 define i1 @i32_cast_cmp_sgt_int_m1_sitofp_double(i32 %i) {
 ; CHECK-LABEL: @i32_cast_cmp_sgt_int_m1_sitofp_double(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i32 [[I:%.*]] to double
-; CHECK-NEXT:    [[B:%.*]] = bitcast double [[F]] to i64
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i64 [[B]], -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[I:%.*]], -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i32 %i to double
   %b = bitcast double %f to i64
   %cmp = icmp sgt i64 %b, -1
   ret i1 %cmp
 }
 
 define <3 x i1> @i32_cast_cmp_sgt_int_m1_sitofp_double_vec(<3 x i32> %i) {
 ; CHECK-LABEL: @i32_cast_cmp_sgt_int_m1_sitofp_double_vec(
-; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x double>
-; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 -1, i64 undef, i64 -1>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i32> [[I:%.*]], <i32 -1, i32 -1, i32 -1>
 ; CHECK-NEXT:    ret <3 x i1> [[CMP]]
 ;
   %f = sitofp <3 x i32> %i to  <3 x double>
   %b = bitcast <3 x double> %f to <3 x i64>
   %cmp = icmp sgt <3 x i64> %b, <i64 -1, i64 undef, i64 -1>
   ret <3 x i1> %cmp
 }
 
;
   %f = sitofp <3 x i32> %i to  <3 x half>
   %b = bitcast <3 x half> %f to <3 x i16>
   %cmp = icmp ne <3 x i16> %b, <i16 0, i16 undef, i16 0>
   ret <3 x i1> %cmp
 }
 
 define i1 @i32_cast_cmp_slt_int_0_sitofp_half(i32 %i) {
 ; CHECK-LABEL: @i32_cast_cmp_slt_int_0_sitofp_half(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i32 [[I:%.*]] to half
-; CHECK-NEXT:    [[B:%.*]] = bitcast half [[F]] to i16
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i16 [[B]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[I:%.*]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i32 %i to half
   %b = bitcast half %f to i16
   %cmp = icmp slt i16 %b, 0
   ret i1 %cmp
 }
 
;
   %f = sitofp <3 x i32> %i to  <3 x half>
   %b = bitcast <3 x half> %f to <3 x i16>
   %cmp = icmp slt <3 x i16> %b, <i16 1, i16 undef, i16 1>
   ret <3 x i1> %cmp
 }
 
 define i1 @i32_cast_cmp_sgt_int_m1_sitofp_half(i32 %i) {
 ; CHECK-LABEL: @i32_cast_cmp_sgt_int_m1_sitofp_half(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i32 [[I:%.*]] to half
-; CHECK-NEXT:    [[B:%.*]] = bitcast half [[F]] to i16
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i16 [[B]], -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[I:%.*]], -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i32 %i to half
   %b = bitcast half %f to i16
   %cmp = icmp sgt i16 %b, -1
   ret i1 %cmp
 }
 
 define <3 x i1> @i32_cast_cmp_sgt_int_m1_sitofp_half_vec(<3 x i32> %i) {
 ; CHECK-LABEL: @i32_cast_cmp_sgt_int_m1_sitofp_half_vec(
-; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i32> [[I:%.*]] to <3 x half>
-; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 -1, i16 undef, i16 -1>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i32> [[I:%.*]], <i32 -1, i32 -1, i32 -1>
 ; CHECK-NEXT:    ret <3 x i1> [[CMP]]
 ;
   %f = sitofp <3 x i32> %i to  <3 x half>
   %b = bitcast <3 x half> %f to <3 x i16>
   %cmp = icmp sgt <3 x i16> %b, <i16 -1, i16 undef, i16 -1>
   ret <3 x i1> %cmp
 }
 
;
   %f = sitofp <3 x i64> %i to  <3 x float>
   %b = bitcast <3 x float> %f to <3 x i32>
   %cmp = icmp ne <3 x i32> %b, <i32 0, i32 undef, i32 0>
   ret <3 x i1> %cmp
 }
 
 define i1 @i64_cast_cmp_slt_int_0_sitofp_float(i64 %i) {
 ; CHECK-LABEL: @i64_cast_cmp_slt_int_0_sitofp_float(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i64 [[I:%.*]] to float
-; CHECK-NEXT:    [[B:%.*]] = bitcast float [[F]] to i32
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[B]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i64 [[I:%.*]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i64 %i to float
   %b = bitcast float %f to i32
   %cmp = icmp slt i32 %b, 0
   ret i1 %cmp
 }
 
;
   %f = sitofp <3 x i64> %i to  <3 x float>
   %b = bitcast <3 x float> %f to <3 x i32>
   %cmp = icmp slt <3 x i32> %b, <i32 1, i32 undef, i32 1>
   ret <3 x i1> %cmp
 }
 
 define i1 @i64_cast_cmp_sgt_int_m1_sitofp_float(i64 %i) {
 ; CHECK-LABEL: @i64_cast_cmp_sgt_int_m1_sitofp_float(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i64 [[I:%.*]] to float
-; CHECK-NEXT:    [[B:%.*]] = bitcast float [[F]] to i32
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[B]], -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i64 [[I:%.*]], -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i64 %i to float
   %b = bitcast float %f to i32
   %cmp = icmp sgt i32 %b, -1
   ret i1 %cmp
 }
 
 define <3 x i1> @i64_cast_cmp_sgt_int_m1_sitofp_float_vec(<3 x i64> %i) {
 ; CHECK-LABEL: @i64_cast_cmp_sgt_int_m1_sitofp_float_vec(
-; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x float>
-; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 -1, i32 undef, i32 -1>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i64> [[I:%.*]], <i64 -1, i64 -1, i64 -1>
 ; CHECK-NEXT:    ret <3 x i1> [[CMP]]
 ;
   %f = sitofp <3 x i64> %i to  <3 x float>
   %b = bitcast <3 x float> %f to <3 x i32>
   %cmp = icmp sgt <3 x i32> %b, <i32 -1, i32 undef, i32 -1>
   ret <3 x i1> %cmp
 }
 
;
   %f = sitofp <3 x i64> %i to  <3 x double>
   %b = bitcast <3 x double> %f to <3 x i64>
   %cmp = icmp ne <3 x i64> %b, <i64 0, i64 undef, i64 0>
   ret <3 x i1> %cmp
 }
 
 define i1 @i64_cast_cmp_slt_int_0_sitofp_double(i64 %i) {
 ; CHECK-LABEL: @i64_cast_cmp_slt_int_0_sitofp_double(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i64 [[I:%.*]] to double
-; CHECK-NEXT:    [[B:%.*]] = bitcast double [[F]] to i64
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i64 [[B]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i64 [[I:%.*]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i64 %i to double
   %b = bitcast double %f to i64
   %cmp = icmp slt i64 %b, 0
   ret i1 %cmp
 }
 
;
   %f = sitofp <3 x i64> %i to  <3 x double>
   %b = bitcast <3 x double> %f to <3 x i64>
   %cmp = icmp slt <3 x i64> %b, <i64 1, i64 undef, i64 1>
   ret <3 x i1> %cmp
 }
 
 define i1 @i64_cast_cmp_sgt_int_m1_sitofp_double(i64 %i) {
 ; CHECK-LABEL: @i64_cast_cmp_sgt_int_m1_sitofp_double(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i64 [[I:%.*]] to double
-; CHECK-NEXT:    [[B:%.*]] = bitcast double [[F]] to i64
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i64 [[B]], -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i64 [[I:%.*]], -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i64 %i to double
   %b = bitcast double %f to i64
   %cmp = icmp sgt i64 %b, -1
   ret i1 %cmp
 }
 
 define <3 x i1> @i64_cast_cmp_sgt_int_m1_sitofp_double_vec(<3 x i64> %i) {
 ; CHECK-LABEL: @i64_cast_cmp_sgt_int_m1_sitofp_double_vec(
-; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x double>
-; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 -1, i64 undef, i64 -1>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i64> [[I:%.*]], <i64 -1, i64 -1, i64 -1>
 ; CHECK-NEXT:    ret <3 x i1> [[CMP]]
 ;
   %f = sitofp <3 x i64> %i to  <3 x double>
   %b = bitcast <3 x double> %f to <3 x i64>
   %cmp = icmp sgt <3 x i64> %b, <i64 -1, i64 undef, i64 -1>
   ret <3 x i1> %cmp
 }
 
;
   %f = sitofp <3 x i64> %i to  <3 x half>
   %b = bitcast <3 x half> %f to <3 x i16>
   %cmp = icmp ne <3 x i16> %b, <i16 0, i16 undef, i16 0>
   ret <3 x i1> %cmp
 }
 
 define i1 @i64_cast_cmp_slt_int_0_sitofp_half(i64 %i) {
 ; CHECK-LABEL: @i64_cast_cmp_slt_int_0_sitofp_half(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i64 [[I:%.*]] to half
-; CHECK-NEXT:    [[B:%.*]] = bitcast half [[F]] to i16
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i16 [[B]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i64 [[I:%.*]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i64 %i to half
   %b = bitcast half %f to i16
   %cmp = icmp slt i16 %b, 0
   ret i1 %cmp
 }
 
;
   %f = sitofp <3 x i64> %i to  <3 x half>
   %b = bitcast <3 x half> %f to <3 x i16>
   %cmp = icmp slt <3 x i16> %b, <i16 1, i16 undef, i16 1>
   ret <3 x i1> %cmp
 }
 
 define i1 @i64_cast_cmp_sgt_int_m1_sitofp_half(i64 %i) {
 ; CHECK-LABEL: @i64_cast_cmp_sgt_int_m1_sitofp_half(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i64 [[I:%.*]] to half
-; CHECK-NEXT:    [[B:%.*]] = bitcast half [[F]] to i16
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i16 [[B]], -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i64 [[I:%.*]], -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i64 %i to half
   %b = bitcast half %f to i16
   %cmp = icmp sgt i16 %b, -1
   ret i1 %cmp
 }
 
 define <3 x i1> @i64_cast_cmp_sgt_int_m1_sitofp_half_vec(<3 x i64> %i) {
 ; CHECK-LABEL: @i64_cast_cmp_sgt_int_m1_sitofp_half_vec(
-; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i64> [[I:%.*]] to <3 x half>
-; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 -1, i16 undef, i16 -1>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i64> [[I:%.*]], <i64 -1, i64 -1, i64 -1>
 ; CHECK-NEXT:    ret <3 x i1> [[CMP]]
 ;
   %f = sitofp <3 x i64> %i to  <3 x half>
   %b = bitcast <3 x half> %f to <3 x i16>
   %cmp = icmp sgt <3 x i16> %b, <i16 -1, i16 undef, i16 -1>
   ret <3 x i1> %cmp
 }
 
;
   %f = sitofp <3 x i16> %i to  <3 x float>
   %b = bitcast <3 x float> %f to <3 x i32>
   %cmp = icmp ne <3 x i32> %b, <i32 0, i32 undef, i32 0>
   ret <3 x i1> %cmp
 }
 
 define i1 @i16_cast_cmp_slt_int_0_sitofp_float(i16 %i) {
 ; CHECK-LABEL: @i16_cast_cmp_slt_int_0_sitofp_float(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i16 [[I:%.*]] to float
-; CHECK-NEXT:    [[B:%.*]] = bitcast float [[F]] to i32
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[B]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i16 [[I:%.*]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i16 %i to float
   %b = bitcast float %f to i32
   %cmp = icmp slt i32 %b, 0
   ret i1 %cmp
 }
 
;
   %f = sitofp <3 x i16> %i to  <3 x float>
   %b = bitcast <3 x float> %f to <3 x i32>
   %cmp = icmp slt <3 x i32> %b, <i32 1, i32 undef, i32 1>
   ret <3 x i1> %cmp
 }
 
 define i1 @i16_cast_cmp_sgt_int_m1_sitofp_float(i16 %i) {
 ; CHECK-LABEL: @i16_cast_cmp_sgt_int_m1_sitofp_float(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i16 [[I:%.*]] to float
-; CHECK-NEXT:    [[B:%.*]] = bitcast float [[F]] to i32
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[B]], -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i16 [[I:%.*]], -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i16 %i to float
   %b = bitcast float %f to i32
   %cmp = icmp sgt i32 %b, -1
   ret i1 %cmp
 }
 
 define <3 x i1> @i16_cast_cmp_sgt_int_m1_sitofp_float_vec(<3 x i16> %i) {
 ; CHECK-LABEL: @i16_cast_cmp_sgt_int_m1_sitofp_float_vec(
-; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x float>
-; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x float> [[F]] to <3 x i32>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i32> [[B]], <i32 -1, i32 undef, i32 -1>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i16> [[I:%.*]], <i16 -1, i16 -1, i16 -1>
 ; CHECK-NEXT:    ret <3 x i1> [[CMP]]
 ;
   %f = sitofp <3 x i16> %i to  <3 x float>
   %b = bitcast <3 x float> %f to <3 x i32>
   %cmp = icmp sgt <3 x i32> %b, <i32 -1, i32 undef, i32 -1>
   ret <3 x i1> %cmp
 }
 
;
   %f = sitofp <3 x i16> %i to  <3 x double>
   %b = bitcast <3 x double> %f to <3 x i64>
   %cmp = icmp ne <3 x i64> %b, <i64 0, i64 undef, i64 0>
   ret <3 x i1> %cmp
 }
 
 define i1 @i16_cast_cmp_slt_int_0_sitofp_double(i16 %i) {
 ; CHECK-LABEL: @i16_cast_cmp_slt_int_0_sitofp_double(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i16 [[I:%.*]] to double
-; CHECK-NEXT:    [[B:%.*]] = bitcast double [[F]] to i64
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i64 [[B]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i16 [[I:%.*]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i16 %i to double
   %b = bitcast double %f to i64
   %cmp = icmp slt i64 %b, 0
   ret i1 %cmp
 }
 
;
   %f = sitofp <3 x i16> %i to  <3 x double>
   %b = bitcast <3 x double> %f to <3 x i64>
   %cmp = icmp slt <3 x i64> %b, <i64 1, i64 undef, i64 1>
   ret <3 x i1> %cmp
 }
 
 define i1 @i16_cast_cmp_sgt_int_m1_sitofp_double(i16 %i) {
 ; CHECK-LABEL: @i16_cast_cmp_sgt_int_m1_sitofp_double(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i16 [[I:%.*]] to double
-; CHECK-NEXT:    [[B:%.*]] = bitcast double [[F]] to i64
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i64 [[B]], -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i16 [[I:%.*]], -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i16 %i to double
   %b = bitcast double %f to i64
   %cmp = icmp sgt i64 %b, -1
   ret i1 %cmp
 }
 
 define <3 x i1> @i16_cast_cmp_sgt_int_m1_sitofp_double_vec(<3 x i16> %i) {
 ; CHECK-LABEL: @i16_cast_cmp_sgt_int_m1_sitofp_double_vec(
-; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x double>
-; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i64> [[B]], <i64 -1, i64 undef, i64 -1>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i16> [[I:%.*]], <i16 -1, i16 -1, i16 -1>
 ; CHECK-NEXT:    ret <3 x i1> [[CMP]]
 ;
   %f = sitofp <3 x i16> %i to  <3 x double>
   %b = bitcast <3 x double> %f to <3 x i64>
   %cmp = icmp sgt <3 x i64> %b, <i64 -1, i64 undef, i64 -1>
   ret <3 x i1> %cmp
 }
 
;
   %f = sitofp <3 x i16> %i to  <3 x half>
   %b = bitcast <3 x half> %f to <3 x i16>
   %cmp = icmp ne <3 x i16> %b, <i16 0, i16 undef, i16 0>
   ret <3 x i1> %cmp
 }
 
 define i1 @i16_cast_cmp_slt_int_0_sitofp_half(i16 %i) {
 ; CHECK-LABEL: @i16_cast_cmp_slt_int_0_sitofp_half(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i16 [[I:%.*]] to half
-; CHECK-NEXT:    [[B:%.*]] = bitcast half [[F]] to i16
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i16 [[B]], 0
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i16 [[I:%.*]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i16 %i to half
   %b = bitcast half %f to i16
   %cmp = icmp slt i16 %b, 0
   ret i1 %cmp
 }
 
;
   %f = sitofp <3 x i16> %i to  <3 x half>
   %b = bitcast <3 x half> %f to <3 x i16>
   %cmp = icmp slt <3 x i16> %b, <i16 1, i16 undef, i16 1>
   ret <3 x i1> %cmp
 }
 
 define i1 @i16_cast_cmp_sgt_int_m1_sitofp_half(i16 %i) {
 ; CHECK-LABEL: @i16_cast_cmp_sgt_int_m1_sitofp_half(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i16 [[I:%.*]] to half
-; CHECK-NEXT:    [[B:%.*]] = bitcast half [[F]] to i16
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i16 [[B]], -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i16 [[I:%.*]], -1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %f = sitofp i16 %i to half
   %b = bitcast half %f to i16
   %cmp = icmp sgt i16 %b, -1
   ret i1 %cmp
 }
 
 define <3 x i1> @i16_cast_cmp_sgt_int_m1_sitofp_half_vec(<3 x i16> %i) {
 ; CHECK-LABEL: @i16_cast_cmp_sgt_int_m1_sitofp_half_vec(
-; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i16> [[I:%.*]] to <3 x half>
-; CHECK-NEXT:    [[B:%.*]] = bitcast <3 x half> [[F]] to <3 x i16>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i16> [[B]], <i16 -1, i16 undef, i16 -1>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <3 x i16> [[I:%.*]], <i16 -1, i16 -1, i16 -1>
 ; CHECK-NEXT:    ret <3 x i1> [[CMP]]
 ;
   %f = sitofp <3 x i16> %i to  <3 x half>
   %b = bitcast <3 x half> %f to <3 x i16>
   %cmp = icmp sgt <3 x i16> %b, <i16 -1, i16 undef, i16 -1>
   ret <3 x i1> %cmp
 }

llvm/trunk/test/Transforms/InstCombine/icmp.ll

 ; CHECK-NEXT:    [[RES:%.*]] = icmp eq <2 x i8*> %0, zeroinitializer
 ; CHECK-NEXT:    ret <2 x i1> [[RES]]
 ;
   %cast = ptrtoint <2 x i8*> %0 to <2 x i64>
   %res = icmp eq <2 x i64> %cast, zeroinitializer
   ret <2 x i1> %res
 }
 
-define i1 @doublecast_signbit_set(i64 %x) {
-; CHECK-LABEL: @doublecast_signbit_set(
-; CHECK-NEXT:    [[F:%.*]] = sitofp i64 [[X:%.*]] to float
-; CHECK-NEXT:    [[I:%.*]] = bitcast float [[F]] to i32
-; CHECK-NEXT:    [[R:%.*]] = icmp slt i32 [[I]], 0
-; CHECK-NEXT:    ret i1 [[R]]
-;
-  %f = sitofp i64 %x to float
-  %i = bitcast float %f to i32
-  %r = icmp slt i32 %i, 0
-  ret i1 %r
-}
-
-define <3 x i1> @doublecast_signbit_clear(<3 x i32> %x) {
-; CHECK-LABEL: @doublecast_signbit_clear(
-; CHECK-NEXT:    [[F:%.*]] = sitofp <3 x i32> [[X:%.*]] to <3 x double>
-; CHECK-NEXT:    [[I:%.*]] = bitcast <3 x double> [[F]] to <3 x i64>
-; CHECK-NEXT:    [[R:%.*]] = icmp sgt <3 x i64> [[I]], <i64 -1, i64 undef, i64 -1>
-; CHECK-NEXT:    ret <3 x i1> [[R]]
-;
-  %f = sitofp <3 x i32> %x to <3 x double>
-  %i = bitcast <3 x double> %f to <3 x i64>
-  %r = icmp sgt <3 x i64> %i, <i64 -1, i64 undef, i64 -1>
-  ret <3 x i1> %r
-}
-