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[AArch64] Fix UB about shift amount exceeds data bit-width
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Authored by weimingz on Mar 7 2018, 3:51 PM.

Details

Summary

Fixes an UB caught by sanitizer. The shift amount might be larger than 32 so the operand should be 1ULL.
In this patch, we replace the original expression with existing API with uint64_t type.

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Repository
rL LLVM

Event Timeline

weimingz created this revision.Mar 7 2018, 3:51 PM
rengolin accepted this revision.Mar 7 2018, 4:05 PM

Nice! LGTM, thanks!

This revision is now accepted and ready to land.Mar 7 2018, 4:05 PM
This revision was automatically updated to reflect the committed changes.