[X86] Teach DAG unfoldMemoryOperand to reconvert CMPs to tests

[niravd]

Summary

Copy MI-level cmp->test conversion to SelectionDAG-level memory unfold.
This fixes a regression from D41293.

[craig.topper]

llvm/lib/Target/X86/X86InstrInfo.cpp

9237

Any reason this can't be C->isNullValue()?

Or even just use isNullConstant to merge the first and second if.

[niravd]

Address cleanup comments.

[craig.topper]

LGTm

llvm/lib/Target/X86/X86InstrInfo.cpp

X86InstrInfo::unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
   for (unsigned i = 0, e = N->getNumValues(); i != e; ++i) {
     EVT VT = N->getValueType(i);
     if (VT != MVT::Other && i >= (unsigned)MCID.getNumDefs())
       VTs.push_back(VT);
   }
   if (Load)
     BeforeOps.push_back(SDValue(Load, 0));
   BeforeOps.insert(BeforeOps.end(), AfterOps.begin(), AfterOps.end());
+  // Change CMP32ri r, 0 back to TEST32rr r, r, etc.
+  switch (Opc) {
+    default: break;
+    case X86::CMP64ri32:
+    case X86::CMP64ri8:
+    case X86::CMP32ri:
+    case X86::CMP32ri8:
+    case X86::CMP16ri:
+    case X86::CMP16ri8:
+    case X86::CMP8ri:
+      if (isNullConstant(BeforeOps[1])) {
+        switch (Opc) {
+          default: llvm_unreachable("Unreachable!");
+          case X86::CMP64ri8:
+          case X86::CMP64ri32: Opc = X86::TEST64rr; break;
+          case X86::CMP32ri8:
+          case X86::CMP32ri:   Opc = X86::TEST32rr; break;
+          case X86::CMP16ri8:
+          case X86::CMP16ri:   Opc = X86::TEST16rr; break;
+          case X86::CMP8ri:    Opc = X86::TEST8rr; break;
+        }
+        BeforeOps[1] = BeforeOps[0];
+      }
+  }
   SDNode *NewNode= DAG.getMachineNode(Opc, dl, VTs, BeforeOps);
   NewNodes.push_back(NewNode);
 
   // Emit the store instruction.
   if (FoldedStore) {
     AddrOps.pop_back();
     AddrOps.push_back(SDValue(NewNode, 0));
     AddrOps.push_back(Chain);

llvm/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll

 ; RUN: llvm-as <%s | llc | FileCheck %s
 ; PR 5247
-; check that cmp is not scheduled before the add
+; check that cmp/test is not scheduled before the add
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
 target triple = "x86_64-unknown-linux-gnu"
 
 @.str76843 = external constant [45 x i8]          ; <[45 x i8]*> [#uses=1]
 @__profiling_callsite_timestamps_live = external global [1216 x i64] ; <[1216 x i64]*> [#uses=2]
 
 define i32 @cl_init(i32 %initoptions) nounwind {
 entry:

 
 lt_init.exit:                                     ; preds = %if.end.i, %if.then.i
   %3 = load i32, i32* %retval.i                        ; <i32> [#uses=1]
   call void asm sideeffect "cpuid", "~{ax},~{bx},~{cx},~{dx},~{memory},~{dirflag},~{fpsr},~{flags}"() nounwind
   %4 = call i64 @llvm.readcyclecounter() nounwind ; <i64> [#uses=1]
   %5 = sub i64 %4, %2                             ; <i64> [#uses=1]
   %6 = atomicrmw add i64* getelementptr inbounds ([1216 x i64], [1216 x i64]* @__profiling_callsite_timestamps_live, i32 0, i32 51), i64 %5 monotonic
 ;CHECK: lock {{xadd|addq}} %rdx, __profiling_callsite_timestamps_live
-;CHECK-NEXT: cmpl $0,
+;CHECK-NEXT: testl [[REG:%e[a-z]+]], [[REG]]
 ;CHECK-NEXT: jne
   %cmp = icmp eq i32 %3, 0                        ; <i1> [#uses=1]
   br i1 %cmp, label %if.then, label %if.end
 
 if.then:                                          ; preds = %lt_init.exit
   call void @cli_rarload()
   br label %if.end
 

llvm/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll

 ; RUN: llc < %s -verify-machineinstrs -mtriple=i686-linux -mattr=-sse | FileCheck %s
 ; PR11768
 
 @ptr = external global i8*
 
 define void @baz() nounwind ssp {
 entry:
   %0 = load i8*, i8** @ptr, align 4
   %cmp = icmp eq i8* %0, null
   fence seq_cst
   br i1 %cmp, label %if.then, label %if.else
 
 ; Make sure the fence comes before the comparison, since it
 ; clobbers EFLAGS.
 
 ; CHECK: lock orl {{.*}}, (%esp)
-; CHECK-NEXT: cmpl $0, [[REG:%e[a-z]+]]
-; unfoldMemoryOperand should to convert this back to testl. 
-; FIXME-NEXT: testl [[REG:%e[a-z]+]], [[REG]]
+; CHECK-NEXT: testl [[REG:%e[a-z]+]], [[REG]]
 
 if.then:                                          ; preds = %entry
   tail call void bitcast (void (...)* @foo to void ()*)() nounwind
   br label %if.end
 
 if.else:                                          ; preds = %entry
   tail call void bitcast (void (...)* @bar to void ()*)() nounwind
   br label %if.end
 
 if.end:                                           ; preds = %if.else, %if.then
   ret void
 }
 
 declare void @foo(...)
 
 declare void @bar(...)