Reduce x86 register context boilerplate.

[labath]

Summary

The x86 FPR struct (which does not store just floating point registers)
was defined as a struct containing a union between two members: XSAVE
and FXSAVE. The initial layout of these two structs is identical, which
is recognised by the fact that XSAVE has FXSAVE as its first member.

This fact means that the whole union is not necessary and we can just
use XSAVE as our "fpr" struct. This reduced the amount of typing when
accessing the struct members and (I hope) makes code a bit cleaner.

[krytarowski]

Personally I prefer the original code as it looks easier to implement FSAVE.

[krytarowski]

In D41245#955462, @krytarowski wrote:

Personally I prefer the original code as it looks easier to implement FSAVE.

Also naming FPR is more logical, reusing the XSAVE name for 32-bit x86 looks wrong to me.

[labath]

In D41245#955462, @krytarowski wrote:

Personally I prefer the original code as it looks easier to implement FSAVE.

Maybe we could delete at least one layer then (make FPR a union which contains fxsave and xsave members)?

Also, I am curious: is your remark about FSAVE hypothetical or do you have plans about that? Is there an OS that vends registers in the FSAVE layout?

My feeling is that if you really wanted to implement the FSAVE layout you would run into a class of problems anyway, precisely because the layout is not the same as these two structures. (e.g. right now the way that the offset of the xmm registers is defined does not take into account whether you are using XSAVE or FXSAVE -- the only reason this works is because the two offsets are the same).

[krytarowski]

I want to support x86 CPUs in 32-bit mode starting from 486. At least to read core dumps.
This is the current bare minimum and tested setup by the releng team in NetBSD.

OpenBSD used to support 80386 with MMU, but not sure if this is still true after migration to Clang.

I've already implemented FPU checks in the existing code:

• fpu_present (currently always on)
• osfxsr
• sse
• sse2
• fpu_save (fsave, fxsave, xsave, xsaveopt)
• fpu_save_sze
• xsave_features

Maybe reuse FPR for FXSAVE/FSAVE and add next to it XSAVE/XSAVE_OPT.

On NetBSD/i386 FPR registers are for FSAVE through GET_FPREGS/SET_FPREGS.

[labath]

New version. This one keeps the fxsave/xsave distinction, but it makes FPR a
union directly, so it saves us one level of indirection.

[labath]

In D41245#955557, @krytarowski wrote:

Maybe reuse FPR for FXSAVE/FSAVE and add next to it XSAVE/XSAVE_OPT.

I am not sure what you mean by that, but I don't think it can work that way, as xsave area already contains a copy of the fpu registers, so we will end up having them twice. I have a feeling that for supporting fsave you will need to define your own register context (or just handle the transformation at a different layer -- this is how we avoided defining separate register context for minidumps -- we just rearrange the registers around to match the existing register context layout).

[krytarowski]

In D41245#956644, @labath wrote:

In D41245#955557, @krytarowski wrote:

Maybe reuse FPR for FXSAVE/FSAVE and add next to it XSAVE/XSAVE_OPT.

I am not sure what you mean by that, but I don't think it can work that way, as xsave area already contains a copy of the fpu registers, so we will end up having them twice. I have a feeling that for supporting fsave you will need to define your own register context (or just handle the transformation at a different layer -- this is how we avoided defining separate register context for minidumps -- we just rearrange the registers around to match the existing register context layout).

I was thinking about split of FPU into two or more structs/unions.

But the newer version on review is better!

[clayborg]

Looks good

lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

NativeRegisterContextLinux_x86_64::NativeRegisterContextLinux_x86_64(
   default:
     assert(false && "Unhandled target architecture.");
     break;
   }
 
   // Initialize m_iovec to point to the buffer and buffer size
   // using the conventions of Berkeley style UIO structures, as required
   // by PTRACE extensions.
-  m_iovec.iov_base = &m_fpr.xstate.xsave;
-  m_iovec.iov_len = sizeof(m_fpr.xstate.xsave);
+  m_iovec.iov_base = &m_fpr;
+  m_iovec.iov_len = sizeof(m_fpr);
 
   // Clear out the FPR state.
-  ::memset(&m_fpr, 0, sizeof(FPR));
+  ::memset(&m_fpr, 0, sizeof(m_fpr));
 
   // Store byte offset of fctrl (i.e. first register of FPR)
   const RegisterInfo *reg_info_fctrl = GetRegisterInfoByName("fctrl");
   m_fctrl_offset_in_userarea = reg_info_fctrl->byte_offset;
 }
 
 // CONSIDER after local and llgs debugging are merged, register set support can
 // be moved into a base x86-64 class with IsRegisterSetAvailable made virtual.
if (IsFPR(reg) || IsAVX(reg) || IsMPX(reg)) {
     return error;
   }
 
   if (reg_info->encoding == lldb::eEncodingVector) {
     lldb::ByteOrder byte_order = GetByteOrder();
 
     if (byte_order != lldb::eByteOrderInvalid) {
       if (reg >= m_reg_info.first_st && reg <= m_reg_info.last_st)
-        reg_value.SetBytes(
-            m_fpr.xstate.fxsave.stmm[reg - m_reg_info.first_st].bytes,
+        reg_value.SetBytes(m_fpr.fxsave.stmm[reg - m_reg_info.first_st].bytes,
                            reg_info->byte_size, byte_order);
       if (reg >= m_reg_info.first_mm && reg <= m_reg_info.last_mm)
-        reg_value.SetBytes(
-            m_fpr.xstate.fxsave.stmm[reg - m_reg_info.first_mm].bytes,
+        reg_value.SetBytes(m_fpr.fxsave.stmm[reg - m_reg_info.first_mm].bytes,
                            reg_info->byte_size, byte_order);
       if (reg >= m_reg_info.first_xmm && reg <= m_reg_info.last_xmm)
-        reg_value.SetBytes(
-            m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_xmm].bytes,
+        reg_value.SetBytes(m_fpr.fxsave.xmm[reg - m_reg_info.first_xmm].bytes,
                            reg_info->byte_size, byte_order);
       if (reg >= m_reg_info.first_ymm && reg <= m_reg_info.last_ymm) {
         // Concatenate ymm using the register halves in xmm.bytes and ymmh.bytes
         if (CopyXSTATEtoYMM(reg, byte_order))
           reg_value.SetBytes(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
                              reg_info->byte_size, byte_order);
         else {
           error.SetErrorString("failed to copy ymm register value");
           return error;
if (byte_order != lldb::eByteOrderInvalid) {
 
       return error;
     }
 
     error.SetErrorString("byte order is invalid");
     return error;
   }
 
-  // Get pointer to m_fpr.xstate.fxsave variable and set the data from it.
+  // Get pointer to m_fpr.fxsave variable and set the data from it.
 
   // Byte offsets of all registers are calculated wrt 'UserArea' structure.
   // However, ReadFPR() reads fpu registers {using ptrace(PTRACE_GETFPREGS,..)}
   // and stores them in 'm_fpr' (of type FPR structure). To extract values of
   // fpu
   // registers, m_fpr should be read at byte offsets calculated wrt to FPR
   // structure.
 
default:
     break;
   }
 
   return error;
 }
 
 void NativeRegisterContextLinux_x86_64::UpdateXSTATEforWrite(
     uint32_t reg_index) {
-  XSAVE_HDR::XFeature &xstate_bv = m_fpr.xstate.xsave.header.xstate_bv;
+  XSAVE_HDR::XFeature &xstate_bv = m_fpr.xsave.header.xstate_bv;
   if (IsFPR(reg_index)) {
     // IsFPR considers both %st and %xmm registers as floating point, but these
     // map to two features. Set both flags, just in case.
     xstate_bv |= XSAVE_HDR::XFeature::FP | XSAVE_HDR::XFeature::SSE;
   } else if (IsAVX(reg_index)) {
     // Lower bytes of some %ymm registers are shared with %xmm registers.
     xstate_bv |= XSAVE_HDR::XFeature::YMM | XSAVE_HDR::XFeature::SSE;
   } else if (IsMPX(reg_index)) {
Status NativeRegisterContextLinux_x86_64::WriteRegister(
   UpdateXSTATEforWrite(reg_index);
 
   if (IsGPR(reg_index))
     return WriteRegisterRaw(reg_index, reg_value);
 
   if (IsFPR(reg_index) || IsAVX(reg_index) || IsMPX(reg_index)) {
     if (reg_info->encoding == lldb::eEncodingVector) {
       if (reg_index >= m_reg_info.first_st && reg_index <= m_reg_info.last_st)
-        ::memcpy(
-            m_fpr.xstate.fxsave.stmm[reg_index - m_reg_info.first_st].bytes,
+        ::memcpy(m_fpr.fxsave.stmm[reg_index - m_reg_info.first_st].bytes,
                  reg_value.GetBytes(), reg_value.GetByteSize());
 
       if (reg_index >= m_reg_info.first_mm && reg_index <= m_reg_info.last_mm)
-        ::memcpy(
-            m_fpr.xstate.fxsave.stmm[reg_index - m_reg_info.first_mm].bytes,
+        ::memcpy(m_fpr.fxsave.stmm[reg_index - m_reg_info.first_mm].bytes,
                  reg_value.GetBytes(), reg_value.GetByteSize());
 
       if (reg_index >= m_reg_info.first_xmm && reg_index <= m_reg_info.last_xmm)
-        ::memcpy(
-            m_fpr.xstate.fxsave.xmm[reg_index - m_reg_info.first_xmm].bytes,
+        ::memcpy(m_fpr.fxsave.xmm[reg_index - m_reg_info.first_xmm].bytes,
                  reg_value.GetBytes(), reg_value.GetByteSize());
 
       if (reg_index >= m_reg_info.first_ymm &&
           reg_index <= m_reg_info.last_ymm) {
         // Store ymm register content, and split into the register halves in
         // xmm.bytes and ymmh.bytes
         ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes,
                  reg_value.GetBytes(), reg_value.GetByteSize());
         if (!CopyYMMtoXSTATE(reg_index, GetByteOrder()))
if (reg_info->encoding == lldb::eEncodingVector) {
       if (reg_index >= m_reg_info.first_mpxc &&
           reg_index <= m_reg_info.last_mpxc) {
         ::memcpy(m_mpx_set.mpxc[reg_index - m_reg_info.first_mpxc].bytes,
                  reg_value.GetBytes(), reg_value.GetByteSize());
         if (!CopyMPXtoXSTATE(reg_index))
           return Status("CopyMPXtoXSTATE() failed");
       }
     } else {
-      // Get pointer to m_fpr.xstate.fxsave variable and set the data to it.
+      // Get pointer to m_fpr.fxsave variable and set the data to it.
 
       // Byte offsets of all registers are calculated wrt 'UserArea' structure.
       // However, WriteFPR() takes m_fpr (of type FPR structure) and writes only
       // fpu
       // registers using ptrace(PTRACE_SETFPREGS,..) API. Hence fpu registers
       // should
       // be written in m_fpr at byte offsets calculated wrt FPR structure.
 
Status NativeRegisterContextLinux_x86_64::ReadAllRegisterValues(
   error = ReadFPR();
   if (error.Fail())
     return error;
 
   uint8_t *dst = data_sp->GetBytes();
   ::memcpy(dst, &m_gpr_x86_64, GetRegisterInfoInterface().GetGPRSize());
   dst += GetRegisterInfoInterface().GetGPRSize();
   if (m_xstate_type == XStateType::FXSAVE)
-    ::memcpy(dst, &m_fpr.xstate.fxsave, sizeof(m_fpr.xstate.fxsave));
+    ::memcpy(dst, &m_fpr.fxsave, sizeof(m_fpr.fxsave));
   else if (m_xstate_type == XStateType::XSAVE) {
     lldb::ByteOrder byte_order = GetByteOrder();
 
     if (IsCPUFeatureAvailable(RegSet::avx)) {
       // Assemble the YMM register content from the register halves.
       for (uint32_t reg = m_reg_info.first_ymm; reg <= m_reg_info.last_ymm;
            ++reg) {
         if (!CopyXSTATEtoYMM(reg, byte_order)) {
Status NativeRegisterContextLinux_x86_64::WriteAllRegisterValues(
   ::memcpy(&m_gpr_x86_64, src, GetRegisterInfoInterface().GetGPRSize());
 
   error = WriteGPR();
   if (error.Fail())
     return error;
 
   src += GetRegisterInfoInterface().GetGPRSize();
   if (m_xstate_type == XStateType::FXSAVE)
-    ::memcpy(&m_fpr.xstate.fxsave, src, sizeof(m_fpr.xstate.fxsave));
+    ::memcpy(&m_fpr.fxsave, src, sizeof(m_fpr.fxsave));
   else if (m_xstate_type == XStateType::XSAVE)
-    ::memcpy(&m_fpr.xstate.xsave, src, sizeof(m_fpr.xstate.xsave));
+    ::memcpy(&m_fpr.xsave, src, sizeof(m_fpr.xsave));
 
   error = WriteFPR();
   if (error.Fail())
     return error;
 
   if (m_xstate_type == XStateType::XSAVE) {
     lldb::ByteOrder byte_order = GetByteOrder();
 
if (const_cast<NativeRegisterContextLinux_x86_64 *>(this)->ReadFPR().Fail())
       return false;
   }
   switch (feature_code) {
   case RegSet::gpr:
   case RegSet::fpu:
     return true;
   case RegSet::avx: // Check if CPU has AVX and if there is kernel support, by
                     // reading in the XCR0 area of XSAVE.
-    if ((m_fpr.xstate.xsave.i387.xcr0 & mask_XSTATE_AVX) == mask_XSTATE_AVX)
+    if ((m_fpr.xsave.i387.xcr0 & mask_XSTATE_AVX) == mask_XSTATE_AVX)
       return true;
      break;
   case RegSet::mpx: // Check if CPU has MPX and if there is kernel support, by
                     // reading in the XCR0 area of XSAVE.
-    if ((m_fpr.xstate.xsave.i387.xcr0 & mask_XSTATE_MPX) == mask_XSTATE_MPX)
+    if ((m_fpr.xsave.i387.xcr0 & mask_XSTATE_MPX) == mask_XSTATE_MPX)
       return true;
     break;
   }
   return false;
 }
 
 bool NativeRegisterContextLinux_x86_64::IsRegisterSetAvailable(
     uint32_t set_index) const {
bool NativeRegisterContextLinux_x86_64::IsFPR(uint32_t reg_index) const {
   return (m_reg_info.first_fpr <= reg_index &&
           reg_index <= m_reg_info.last_fpr);
 }
 
 Status NativeRegisterContextLinux_x86_64::WriteFPR() {
   switch (m_xstate_type) {
   case XStateType::FXSAVE:
     return WriteRegisterSet(
-        &m_iovec, sizeof(m_fpr.xstate.xsave),
+        &m_iovec, sizeof(m_fpr.fxsave),
         fxsr_regset(GetRegisterInfoInterface().GetTargetArchitecture()));
   case XStateType::XSAVE:
-    return WriteRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave),
-                            NT_X86_XSTATE);
+    return WriteRegisterSet(&m_iovec, sizeof(m_fpr.xsave), NT_X86_XSTATE);
   default:
     return Status("Unrecognized FPR type.");
   }
 }
 
 bool NativeRegisterContextLinux_x86_64::IsAVX(uint32_t reg_index) const {
   if (!IsCPUFeatureAvailable(RegSet::avx))
     return false;
   return (m_reg_info.first_ymm <= reg_index &&
           reg_index <= m_reg_info.last_ymm);
 }
 
 bool NativeRegisterContextLinux_x86_64::CopyXSTATEtoYMM(
     uint32_t reg_index, lldb::ByteOrder byte_order) {
   if (!IsAVX(reg_index))
     return false;
 
   if (byte_order == lldb::eByteOrderLittle) {
     ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes,
-             m_fpr.xstate.fxsave.xmm[reg_index - m_reg_info.first_ymm].bytes,
+             m_fpr.fxsave.xmm[reg_index - m_reg_info.first_ymm].bytes,
              sizeof(XMMReg));
     ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes +
                  sizeof(XMMReg),
-             m_fpr.xstate.xsave.ymmh[reg_index - m_reg_info.first_ymm].bytes,
+             m_fpr.xsave.ymmh[reg_index - m_reg_info.first_ymm].bytes,
              sizeof(YMMHReg));
     return true;
   }
 
   if (byte_order == lldb::eByteOrderBig) {
     ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes +
                  sizeof(XMMReg),
-             m_fpr.xstate.fxsave.xmm[reg_index - m_reg_info.first_ymm].bytes,
+             m_fpr.fxsave.xmm[reg_index - m_reg_info.first_ymm].bytes,
              sizeof(XMMReg));
     ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes,
-             m_fpr.xstate.xsave.ymmh[reg_index - m_reg_info.first_ymm].bytes,
+             m_fpr.xsave.ymmh[reg_index - m_reg_info.first_ymm].bytes,
              sizeof(YMMHReg));
     return true;
   }
   return false; // unsupported or invalid byte order
 }
 
 bool NativeRegisterContextLinux_x86_64::CopyYMMtoXSTATE(
     uint32_t reg, lldb::ByteOrder byte_order) {
   if (!IsAVX(reg))
     return false;
 
   if (byte_order == lldb::eByteOrderLittle) {
-    ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+    ::memcpy(m_fpr.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
              m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(XMMReg));
-    ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+    ::memcpy(m_fpr.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
              m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
              sizeof(YMMHReg));
     return true;
   }
 
   if (byte_order == lldb::eByteOrderBig) {
-    ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+    ::memcpy(m_fpr.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
              m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
              sizeof(XMMReg));
-    ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+    ::memcpy(m_fpr.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
              m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(YMMHReg));
     return true;
   }
   return false; // unsupported or invalid byte order
 }
 
 void *NativeRegisterContextLinux_x86_64::GetFPRBuffer() {
   switch (m_xstate_type) {
   case XStateType::FXSAVE:
-    return &m_fpr.xstate.fxsave;
+    return &m_fpr.fxsave;
   case XStateType::XSAVE:
     return &m_iovec;
   default:
     return nullptr;
   }
 }
 
 size_t NativeRegisterContextLinux_x86_64::GetFPRSize() {
   switch (m_xstate_type) {
   case XStateType::FXSAVE:
-    return sizeof(m_fpr.xstate.fxsave);
+    return sizeof(m_fpr.fxsave);
   case XStateType::XSAVE:
     return sizeof(m_iovec);
   default:
     return 0;
   }
 }
 
 Status NativeRegisterContextLinux_x86_64::ReadFPR() {
   Status error;
 
   // Probe XSAVE and if it is not supported fall back to FXSAVE.
   if (m_xstate_type != XStateType::FXSAVE) {
-    error =
-        ReadRegisterSet(&m_iovec, sizeof(m_fpr.xstate.xsave), NT_X86_XSTATE);
+    error = ReadRegisterSet(&m_iovec, sizeof(m_fpr.xsave), NT_X86_XSTATE);
     if (!error.Fail()) {
       m_xstate_type = XStateType::XSAVE;
       return error;
     }
   }
   error = ReadRegisterSet(
-      &m_iovec, sizeof(m_fpr.xstate.xsave),
+      &m_iovec, sizeof(m_fpr.xsave),
       fxsr_regset(GetRegisterInfoInterface().GetTargetArchitecture()));
   if (!error.Fail()) {
     m_xstate_type = XStateType::FXSAVE;
     return error;
   }
   return Status("Unrecognized FPR type.");
 }
 
 bool NativeRegisterContextLinux_x86_64::IsMPX(uint32_t reg_index) const {
   if (!IsCPUFeatureAvailable(RegSet::mpx))
     return false;
   return (m_reg_info.first_mpxr <= reg_index &&
           reg_index <= m_reg_info.last_mpxc);
 }
 
 bool NativeRegisterContextLinux_x86_64::CopyXSTATEtoMPX(uint32_t reg) {
   if (!IsMPX(reg))
     return false;
 
   if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) {
     ::memcpy(m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes,
-             m_fpr.xstate.xsave.mpxr[reg - m_reg_info.first_mpxr].bytes,
+             m_fpr.xsave.mpxr[reg - m_reg_info.first_mpxr].bytes,
              sizeof(MPXReg));
   } else {
     ::memcpy(m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes,
-             m_fpr.xstate.xsave.mpxc[reg - m_reg_info.first_mpxc].bytes,
+             m_fpr.xsave.mpxc[reg - m_reg_info.first_mpxc].bytes,
              sizeof(MPXCsr));
   }
   return true;
 }
 
 bool NativeRegisterContextLinux_x86_64::CopyMPXtoXSTATE(uint32_t reg) {
   if (!IsMPX(reg))
     return false;
 
   if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) {
-    ::memcpy(m_fpr.xstate.xsave.mpxr[reg - m_reg_info.first_mpxr].bytes,
+    ::memcpy(m_fpr.xsave.mpxr[reg - m_reg_info.first_mpxr].bytes,
              m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes, sizeof(MPXReg));
   } else {
-    ::memcpy(m_fpr.xstate.xsave.mpxc[reg - m_reg_info.first_mpxc].bytes,
+    ::memcpy(m_fpr.xsave.mpxc[reg - m_reg_info.first_mpxc].bytes,
              m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes, sizeof(MPXCsr));
   }
   return true;
 }
 
 Status NativeRegisterContextLinux_x86_64::IsWatchpointHit(uint32_t wp_index,
                                                           bool &is_hit) {
   if (wp_index >= NumSupportedHardwareWatchpoints())

lldb/trunk/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp

 
 // Parse ymm registers and into xmm.bytes and ymmh.bytes.
 bool RegisterContextPOSIX_x86::CopyYMMtoXSTATE(uint32_t reg,
                                                lldb::ByteOrder byte_order) {
   if (!IsAVX(reg))
     return false;
 
   if (byte_order == eByteOrderLittle) {
-    ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+    ::memcpy(m_fpr.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
              m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(XMMReg));
-    ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+    ::memcpy(m_fpr.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
              m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
              sizeof(YMMHReg));
     return true;
   }
 
   if (byte_order == eByteOrderBig) {
-    ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+    ::memcpy(m_fpr.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
              m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
              sizeof(XMMReg));
-    ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+    ::memcpy(m_fpr.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
              m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(YMMHReg));
     return true;
   }
   return false; // unsupported or invalid byte order
 }
 
 // Concatenate xmm.bytes with ymmh.bytes
 bool RegisterContextPOSIX_x86::CopyXSTATEtoYMM(uint32_t reg,
                                                lldb::ByteOrder byte_order) {
   if (!IsAVX(reg))
     return false;
 
   if (byte_order == eByteOrderLittle) {
     ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
-             m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+             m_fpr.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
              sizeof(XMMReg));
     ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
-             m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+             m_fpr.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
              sizeof(YMMHReg));
     return true;
   }
 
   if (byte_order == eByteOrderBig) {
     ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
-             m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
+             m_fpr.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
              sizeof(XMMReg));
     ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
-             m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
+             m_fpr.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
              sizeof(YMMHReg));
     return true;
   }
   return false; // unsupported or invalid byte order
 }
 
 bool RegisterContextPOSIX_x86::IsRegisterSetAvailable(size_t set_index) {
   // Note: Extended register sets are assumed to be at the end of g_reg_sets...

lldb/trunk/source/Plugins/Process/Utility/RegisterContext_x86.h

struct LLVM_ALIGNAS(64) XSAVE {
   uint64_t reserved3[16];
   MPXReg mpxr[4];   // MPX BNDREG state, containing 128-bit bound registers
   MPXCsr mpxc[2];   // MPX BNDCSR state, containing 64-bit BNDCFGU and
                     // BNDSTATUS registers
 };
 LLVM_PACKED_END
 
 // Floating-point registers
-struct FPR {
-  // Thread state for the floating-point unit of the processor read by ptrace.
-  union XSTATE {
-    FXSAVE fxsave; // Generic floating-point registers.
-    XSAVE xsave;   // x86 extended processor state.
-  } xstate;
+union FPR {
 };
 
 LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE();
 
 } // namespace lldb_private
 
 #endif

lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_i386.h

 #define FPR_OFFSET(regname)                                                    \
   (LLVM_EXTENSION offsetof(UserArea, i387) +                                   \
    LLVM_EXTENSION offsetof(FPR_i386, regname))
 
 // Computes the offset of the YMM register assembled from register halves.
 // Based on DNBArchImplI386.cpp from debugserver
 #define YMM_OFFSET(reg_index)                                                  \
   (LLVM_EXTENSION offsetof(UserArea, i387) +                                   \
-   LLVM_EXTENSION offsetof(FPR, xstate) +                                      \
+   LLVM_EXTENSION offsetof(FPR, fxsave) +                                      \
    LLVM_EXTENSION offsetof(FXSAVE, xmm[7]) + sizeof(XMMReg) +                  \
    (32 * reg_index))
 
-#define BNDR_OFFSET(reg_index) \
-    (LLVM_EXTENSION offsetof(UserArea, i387) + \
-     LLVM_EXTENSION offsetof(FPR, xstate) + \
-     LLVM_EXTENSION offsetof(XSAVE, mpxr[reg_index]))
+#define BNDR_OFFSET(reg_index)                                                 \
+  (LLVM_EXTENSION offsetof(UserArea, i387) +                                   \
+   LLVM_EXTENSION offsetof(FPR, xsave) +                                       \
 
-#define BNDC_OFFSET(reg_index) \
-    (LLVM_EXTENSION offsetof(UserArea, i387) + \
-     LLVM_EXTENSION offsetof(FPR, xstate) + \
-     LLVM_EXTENSION offsetof(XSAVE, mpxc[reg_index]))
+#define BNDC_OFFSET(reg_index)                                                 \
+  (LLVM_EXTENSION offsetof(UserArea, i387) +                                   \
+   LLVM_EXTENSION offsetof(FPR, xsave) +                                       \
 
 // Number of bytes needed to represent a FPR.
 #if !defined(FPR_SIZE)
 #define FPR_SIZE(reg) sizeof(((FXSAVE *)nullptr)->reg)
 #endif
 
 // Number of bytes needed to represent the i'th FP register.
 #define FP_SIZE sizeof(((MMSReg *)nullptr)->bytes)

lldb/trunk/source/Plugins/Process/Utility/RegisterInfos_x86_64.h

 // headers here.
 
 // Computes the offset of the given GPR in the user data area.
 #define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname))
 
 // Computes the offset of the given FPR in the extended data area.
 #define FPR_OFFSET(regname)                                                    \
   (LLVM_EXTENSION offsetof(UserArea, fpr) +                                    \
-   LLVM_EXTENSION offsetof(FPR, xstate) +                                      \
+   LLVM_EXTENSION offsetof(FPR, fxsave) +                                      \
    LLVM_EXTENSION offsetof(FXSAVE, regname))
 
 // Computes the offset of the YMM register assembled from register halves.
 // Based on DNBArchImplX86_64.cpp from debugserver
 #define YMM_OFFSET(reg_index)                                                  \
   (LLVM_EXTENSION offsetof(UserArea, fpr) +                                    \
-   LLVM_EXTENSION offsetof(FPR, xstate) +                                      \
+   LLVM_EXTENSION offsetof(FPR, xsave) +                                       \
    LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + (32 * reg_index))
 
-#define BNDR_OFFSET(reg_index) \
-    (LLVM_EXTENSION offsetof(UserArea, fpr) + \
-     LLVM_EXTENSION offsetof(FPR, xstate) + \
-     LLVM_EXTENSION offsetof(XSAVE, mpxr[reg_index]))
+#define BNDR_OFFSET(reg_index)                                                 \
+  (LLVM_EXTENSION offsetof(UserArea, fpr) +                                    \
+   LLVM_EXTENSION offsetof(FPR, xsave) +                                       \
 
-#define BNDC_OFFSET(reg_index) \
-    (LLVM_EXTENSION offsetof(UserArea, fpr) + \
-     LLVM_EXTENSION offsetof(FPR, xstate) + \
-     LLVM_EXTENSION offsetof(XSAVE, mpxc[reg_index]))
+#define BNDC_OFFSET(reg_index)                                                 \
+  (LLVM_EXTENSION offsetof(UserArea, fpr) +                                    \
+   LLVM_EXTENSION offsetof(FPR, xsave) +                                       \
 
 #ifdef DECLARE_REGISTER_INFOS_X86_64_STRUCT
 
 // Number of bytes needed to represent a FPR.
 #define FPR_SIZE(reg) sizeof(((FXSAVE *)nullptr)->reg)
 
 // Number of bytes needed to represent the i'th FP register.
 #define FP_SIZE sizeof(((MMSReg *)nullptr)->bytes)