NFC.
Adding MC regressions tests to cover the AVX512F_SCALAR isa sets.
This patch is part of a larger task to cover MC encoding of all X86 isa sets started in revision: https://reviews.llvm.org/D39952
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- rL LLVM
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test/MC/X86/AVX512F_SCALAR-32.s | ||
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4 | This is a VEX encoding so this is testing AVX1. Not sure how to trick 32-bit mode to use EVEX for the unmasked instructions since you can't use the extended registers. |
test/MC/X86/AVX512F_SCALAR-32.s | ||
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4 | I don't know how to fix this without introducing support for the {evex} pseudo prefix that gas supports. But that's a bigger effort which I'm not even sure how to implement in the assembler implementation. |
Rebase. I had to fix the fact that we now parse vmovss.s/vmovsd.s as a VEX instruction when possible. We also had some change involving vcvtss2si and similar instructions that were picking EVEX encodings but now use VEX.
This is an definitely a coverage improvement so I'm going to approve so we can move forward with these encoding coverage patches.
LGTM! Although if you could add a FIXME comment about the VEX vs EVEX encoding that'd be useful
This is a VEX encoding so this is testing AVX1. Not sure how to trick 32-bit mode to use EVEX for the unmasked instructions since you can't use the extended registers.