[OpenMP] Add function attribute for triggering shared memory lowering in the LLVM backend

[gtbercea]

Summary

Since OpenMP and CUDA share the same toolchain we need to disable:

• the lowering of variables to shared memory in the LLVM NVPTX backend
• the emission of the shared depot
• the emission of shared stack pointers

when compiling:

• CUDA programs
• OpenMP programs that do not require data sharing.

[hfinkel]

LGTM

lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp

937

somehting -> something, add a period at the end of the comment.

[gtbercea]

Committed here D41123

lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp

void CGOpenMPRuntimeNVPTX::emitGenericParallelCall(
 
   auto &&L0ParallelGen = [this, WFn, &CapturedVars](CodeGenFunction &CGF,
                                                     PrePostActionTy &) {
     CGBuilderTy &Bld = CGF.Builder;
 
     llvm::Value *ID = Bld.CreateBitOrPointerCast(WFn, CGM.Int8PtrTy);
 
     if (!CapturedVars.empty()) {
+      // There's somehting to share, add the attribute
+      CGF.CurFn->addFnAttr("has-nvptx-shared-depot");
       // Prepare for parallel region. Indicate the outlined function.
       Address SharedArgs =
           CGF.CreateDefaultAlignTempAlloca(CGF.VoidPtrPtrTy,
               "shared_args");
       llvm::Value *SharedArgsPtr = SharedArgs.getPointer();
       llvm::Value *Args[] = {ID, SharedArgsPtr,
                              Bld.getInt32(CapturedVars.size())};
 

test/OpenMP/nvptx_data_sharing.cpp

#pragma omp target
     {
        a = 1000;
     }
   }
 }
 
 /// ========= In the worker function ========= ///
 
-// CK1: define internal void @__omp_offloading_{{.*}}test_ds{{.*}}worker(){{.*}}{
+// CK1: define internal void @__omp_offloading_{{.*}}test_ds{{.*}}worker() #0
 // CK1: [[SHAREDARGS:%.+]] = alloca i8**
 // CK1: call i1 @__kmpc_kernel_parallel(i8** %work_fn, i8*** [[SHAREDARGS]])
 // CK1: [[SHARGSTMP:%.+]] = load i8**, i8*** [[SHAREDARGS]]
 // CK1: call void @__omp_outlined___wrapper{{.*}}({{.*}}, i8** [[SHARGSTMP]])
 
 /// ========= In the kernel function ========= ///
 
-// CK1: {{.*}}define void @__omp_offloading{{.*}}test_ds{{.*}}()
+// CK1: {{.*}}define void @__omp_offloading{{.*}}test_ds{{.*}}() #1
 // CK1: [[SHAREDARGS1:%.+]] = alloca i8**
 // CK1: call void @__kmpc_kernel_prepare_parallel({{.*}}, i8*** [[SHAREDARGS1]], i32 1)
 // CK1: [[SHARGSTMP1:%.+]] = load i8**, i8*** [[SHAREDARGS1]]
 // CK1: [[SHARGSTMP2:%.+]] = getelementptr inbounds i8*, i8** [[SHARGSTMP1]]
 // CK1: [[SHAREDVAR:%.+]] = bitcast i32* {{.*}} to i8*
 // CK1: store i8* [[SHAREDVAR]], i8** [[SHARGSTMP2]]
 
 /// ========= In the data sharing wrapper function ========= ///
 
-// CK1: {{.*}}define internal void @__omp_outlined___wrapper({{.*}}i8**){{.*}}{
+// CK1: {{.*}}define internal void @__omp_outlined___wrapper({{.*}}i8**) #0
 // CK1: [[SHAREDARGS2:%.+]] = alloca i8**
 // CK1: store i8** %2, i8*** [[SHAREDARGS2]]
 // CK1: [[SHARGSTMP3:%.+]] = load i8**, i8*** [[SHAREDARGS2]]
 // CK1: [[SHARGSTMP4:%.+]] = getelementptr inbounds i8*, i8** [[SHARGSTMP3]]
 // CK1: [[SHARGSTMP5:%.+]] = bitcast i8** [[SHARGSTMP4]] to i32**
 // CK1: [[SHARGSTMP6:%.+]] = load i32*, i32** [[SHARGSTMP5]]
 // CK1: call void @__omp_outlined__({{.*}}, i32* [[SHARGSTMP6]])
 
+/// ========= Attributes ========= ///
+
+// CK1-NOT: attributes #0 = { {{.*}}"has-nvptx-shared-depot"{{.*}} }
+// CK1: attributes #1 = { {{.*}}"has-nvptx-shared-depot"{{.*}} }
+
 #endif