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[x86][icelake]BITALG
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Authored by coby on Nov 19 2017, 1:05 AM.

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Summary

2/3
vpshufbitqmb encoding
3/3
vpshufbitqmb intrinsics

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rL LLVM

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coby created this revision.Nov 19 2017, 1:05 AM
coby added a parent revision: D40213: [x86][icelake]BITALG.
RKSimon added a subscriber: RKSimon.

Disassembler tests?

lib/Target/X86/X86ISelLowering.h
502 ↗(On Diff #123494)

Do you have a specific DAG usage in mind for VPSHUFBITQMB? If not maybe wait off on the opcode and just use an intrinsic?

craig.topper edited edge metadata.Nov 19 2017, 10:47 AM

If it supports masking we can't use the intrinsic in the tablegen as it would go against our normal lowering of intrinsics.

coby updated this revision to Diff 123757.Nov 21 2017, 3:39 AM
coby edited the summary of this revision. (Show Details)

intrinsics support (3/3)

craig.topper added inline comments.Nov 21 2017, 2:13 PM
lib/Target/X86/X86InstrFragmentsSIMD.td
582 ↗(On Diff #123757)

Should this have SDTCisSameNumEltsAs<0,1> as well?

coby updated this revision to Diff 124001.Nov 22 2017, 12:31 PM

adopted a stricter type constraints on bits shuffle node, as suggested by Craig

This revision is now accepted and ready to land.Nov 22 2017, 12:54 PM
This revision was automatically updated to reflect the committed changes.