[x86][icelake]BITALG

[coby]

Summary

1/3:
vpopcnt{b,w}

[craig.topper]

Can you add command lines to vector-tzcnt-128/256/512.ll? We should be able to use popcnt for tzcnt when avx512cd's lzcnt is not available.

lib/Target/X86/X86InstrAVX512.td

9812 ↗

(On Diff #123475)

Remove one these blank lines. There shouldn't be 2.

[coby]

added tzcnt tests
removed redundant blank line

[craig.topper]

LGTM

llvm/trunk/lib/Support/Host.cpp

bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
   Features["vaes"] = HasLeaf7 && ((ECX >> 9) & 1) && HasAVXSave;
 
   // VPCLMULQDQ (carry-less multiplication quadword)
   Features["vpclmulqdq"] = HasLeaf7 && ((ECX >> 10) & 1) && HasAVXSave;
 
   // Enable Vector Neural Network Instructions
   Features["avx512vnni"] = HasLeaf7 && ((ECX >> 11) & 1) && HasAVX512Save;
 
+  // Enable Bit Algorithms
+  Features["avx512bitalg"] = HasLeaf7 && ((ECX >> 12) & 1) && HasAVX512Save;
+
   bool HasLeafD = MaxLevel >= 0xd &&
                   !getX86CpuIDAndInfoEx(0xd, 0x1, &EAX, &EBX, &ECX, &EDX);
 
   // Only enable XSAVE if OS has enabled support for saving YMM state.
   Features["xsaveopt"] = HasLeafD && ((EAX >> 0) & 1) && HasAVXSave;
   Features["xsavec"]   = HasLeafD && ((EAX >> 1) & 1) && HasAVXSave;
   Features["xsaves"]   = HasLeafD && ((EAX >> 3) & 1) && HasAVXSave;
 

llvm/trunk/lib/Target/X86/X86.td

 def FeatureIFMA     : SubtargetFeature<"avx512ifma", "HasIFMA", "true",
                       "Enable AVX-512 Integer Fused Multiple-Add",
                                       [FeatureAVX512]>;
 def FeaturePKU   : SubtargetFeature<"pku", "HasPKU", "true",
                       "Enable protection keys">;
 def FeatureVNNI    : SubtargetFeature<"avx512vnni", "HasVNNI", "true",
                           "Enable AVX-512 Vector Neural Network Instructions",
                                       [FeatureAVX512]>;
+def FeatureBITALG  : SubtargetFeature<"avx512bitalg", "HasBITALG", "true",
+                       "Enable AVX-512 Bit Algorithms",
+                        [FeatureBWI]>;
 def FeaturePCLMUL  : SubtargetFeature<"pclmul", "HasPCLMUL", "true",
                          "Enable packed carry-less multiplication instructions",
                                [FeatureSSE2]>;
 def FeatureVPCLMULQDQ : SubtargetFeature<"vpclmulqdq", "HasVPCLMULQDQ", "true",
                                          "Enable vpclmulqdq instructions",
                                          [FeatureAVX, FeaturePCLMUL]>;
 def FeatureFMA4    : SubtargetFeature<"fma4", "HasFMA4", "true",
                                       "Enable four-operand fused multiple-add",

llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

if (!Subtarget.useSoftFloat() && Subtarget.hasVLX()) {
     for (auto VT : { MVT::v2i64, MVT::v4i64 }) {
       setOperationAction(ISD::SMAX, VT, Legal);
       setOperationAction(ISD::UMAX, VT, Legal);
       setOperationAction(ISD::SMIN, VT, Legal);
       setOperationAction(ISD::UMIN, VT, Legal);
     }
   }
 
+  if (Subtarget.hasBITALG())
+    for (auto VT : { MVT::v64i8, MVT::v32i16, MVT::v32i8,
+                     MVT::v16i16, MVT::v16i8, MVT::v8i16 })
+      setOperationAction(ISD::CTPOP, VT, Legal);
+
   // We want to custom lower some of our intrinsics.
   setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
   setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom);
   if (!Subtarget.is64Bit()) {
     setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i64, Custom);
     setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i64, Custom);
   }

llvm/trunk/lib/Target/X86/X86InstrAVX512.td

multiclass VNNI_common<bits<8> Op, string OpStr, SDNode OpNode> {
   }
 }
 
 defm VPDPBUSD   : VNNI_common<0x50, "vpdpbusd", X86Vpdpbusd>;
 defm VPDPBUSDS  : VNNI_common<0x51, "vpdpbusds", X86Vpdpbusds>;
 defm VPDPWSSD   : VNNI_common<0x52, "vpdpwssd", X86Vpdpwssd>;
 defm VPDPWSSDS  : VNNI_common<0x53, "vpdpwssds", X86Vpdpwssds>;
 
+//===----------------------------------------------------------------------===//
+// Bit Algorithms
+//===----------------------------------------------------------------------===//
+
+defm VPOPCNTB : avx512_unary_rm_vl<0x54, "vpopcntb", ctpop,
+                                   avx512vl_i8_info, HasBITALG>,
+                avx512_unary_lowering<ctpop, avx512vl_i8_info, HasBITALG>;
+defm VPOPCNTW : avx512_unary_rm_vl<0x54, "vpopcntw", ctpop,
+                                   avx512vl_i16_info, HasBITALG>,
+                avx512_unary_lowering<ctpop, avx512vl_i16_info, HasBITALG>, VEX_W;
+

llvm/trunk/lib/Target/X86/X86InstrInfo.td

 def HasVLX       : Predicate<"Subtarget->hasVLX()">,
                      AssemblerPredicate<"FeatureVLX", "AVX-512 VL ISA">;
 def NoVLX        : Predicate<"!Subtarget->hasVLX()">;
 def NoVLX_Or_NoBWI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasBWI()">;
 def NoVLX_Or_NoDQI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasDQI()">;
 def PKU        : Predicate<"Subtarget->hasPKU()">;
 def HasVNNI    : Predicate<"Subtarget->hasVNNI()">;
 
+def HasBITALG    : Predicate<"Subtarget->hasBITALG()">;
 def HasPOPCNT    : Predicate<"Subtarget->hasPOPCNT()">;
 def HasAES       : Predicate<"Subtarget->hasAES()">;
 def HasVAES      : Predicate<"Subtarget->hasVAES()">;
 def NoVLX_Or_NoVAES : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasVAES()">;
 def HasFXSR      : Predicate<"Subtarget->hasFXSR()">;
 def HasXSAVE     : Predicate<"Subtarget->hasXSAVE()">;
 def HasXSAVEOPT  : Predicate<"Subtarget->hasXSAVEOPT()">;
 def HasXSAVEC    : Predicate<"Subtarget->hasXSAVEC()">;

llvm/trunk/lib/Target/X86/X86Subtarget.h

protected:
   bool HasVLX;
 
   /// Processor has PKU extenstions
   bool HasPKU;
 
   /// Processor has AVX-512 Vector Neural Network Instructions
   bool HasVNNI;
 
+  /// Processor has AVX-512 Bit Algorithms instructions
+  bool HasBITALG;
+
   /// Processor supports MPX - Memory Protection Extensions
   bool HasMPX;
 
   /// Processor has Software Guard Extensions
   bool HasSGX;
 
   /// Processor supports Flush Cache Line instruction
   bool HasCLFLUSHOPT;
public:
   bool hasVPOPCNTDQ() const { return HasVPOPCNTDQ; }
   bool hasPFI() const { return HasPFI; }
   bool hasERI() const { return HasERI; }
   bool hasDQI() const { return HasDQI; }
   bool hasBWI() const { return HasBWI; }
   bool hasVLX() const { return HasVLX; }
   bool hasPKU() const { return HasPKU; }
   bool hasVNNI() const { return HasVNNI; }
+  bool hasBITALG() const { return HasBITALG; }
   bool hasMPX() const { return HasMPX; }
   bool hasCLFLUSHOPT() const { return HasCLFLUSHOPT; }
   bool hasCLWB() const { return HasCLWB; }
 
   bool isXRaySupported() const override { return is64Bit(); }
 
   X86ProcFamilyEnum getProcFamily() const { return X86ProcFamily; }
 

llvm/trunk/lib/Target/X86/X86Subtarget.cpp

void X86Subtarget::initializeEnvironment() {
   HasPFI = false;
   HasDQI = false;
   HasVPOPCNTDQ = false;
   HasBWI = false;
   HasVLX = false;
   HasADX = false;
   HasPKU = false;
   HasVNNI = false;
+  HasBITALG = false;
   HasSHA = false;
   HasPRFCHW = false;
   HasRDSEED = false;
   HasLAHFSAHF = false;
   HasMWAITX = false;
   HasCLZERO = false;
   HasMPX = false;
   HasSGX = false;

llvm/trunk/test/CodeGen/X86/vector-popcnt-128.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512VPOPCNTDQ
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=ALL --check-prefix=BITALG_NOVLX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=BITALG
 
 define <2 x i64> @testv2i64(<2 x i64> %in) nounwind {
 ; SSE2-LABEL: testv2i64:
 ; SSE2:       # BB#0:
 ; SSE2-NEXT:    movdqa %xmm0, %xmm1
 ; SSE2-NEXT:    psrlq $1, %xmm1
 ; SSE2-NEXT:    pand {{.*}}(%rip), %xmm1
 ; SSE2-NEXT:    psubq %xmm1, %xmm0

 ;
 ; AVX512VPOPCNTDQ-LABEL: testv8i16:
 ; AVX512VPOPCNTDQ:       # BB#0:
 ; AVX512VPOPCNTDQ-NEXT:    vpmovzxwq {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
 ; AVX512VPOPCNTDQ-NEXT:    vpopcntq %zmm0, %zmm0
 ; AVX512VPOPCNTDQ-NEXT:    vpmovqw %zmm0, %xmm0
 ; AVX512VPOPCNTDQ-NEXT:    vzeroupper
 ; AVX512VPOPCNTDQ-NEXT:    retq
+;
+; BITALG_NOVLX-LABEL: testv8i16:
+; BITALG_NOVLX:       # BB#0:
+; BITALG_NOVLX-NEXT:    # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; BITALG_NOVLX-NEXT:    vpopcntw %zmm0, %zmm0
+; BITALG_NOVLX-NEXT:    # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT:    vzeroupper
+; BITALG_NOVLX-NEXT:    retq
+;
+; BITALG-LABEL: testv8i16:
+; BITALG:       # BB#0:
+; BITALG-NEXT:    vpopcntw %xmm0, %xmm0
+; BITALG-NEXT:    retq
   %out = call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %in)
   ret <8 x i16> %out
 }
 
 define <16 x i8> @testv16i8(<16 x i8> %in) nounwind {
 ; SSE2-LABEL: testv16i8:
 ; SSE2:       # BB#0:
 ; SSE2-NEXT:    movdqa %xmm0, %xmm1

 ;
 ; AVX512VPOPCNTDQ-LABEL: testv16i8:
 ; AVX512VPOPCNTDQ:       # BB#0:
 ; AVX512VPOPCNTDQ-NEXT:    vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
 ; AVX512VPOPCNTDQ-NEXT:    vpopcntd %zmm0, %zmm0
 ; AVX512VPOPCNTDQ-NEXT:    vpmovdb %zmm0, %xmm0
 ; AVX512VPOPCNTDQ-NEXT:    vzeroupper
 ; AVX512VPOPCNTDQ-NEXT:    retq
+;
+; BITALG_NOVLX-LABEL: testv16i8:
+; BITALG_NOVLX:       # BB#0:
+; BITALG_NOVLX-NEXT:    # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; BITALG_NOVLX-NEXT:    vpopcntb %zmm0, %zmm0
+; BITALG_NOVLX-NEXT:    # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT:    vzeroupper
+; BITALG_NOVLX-NEXT:    retq
+;
+; BITALG-LABEL: testv16i8:
+; BITALG:       # BB#0:
+; BITALG-NEXT:    vpopcntb %xmm0, %xmm0
+; BITALG-NEXT:    retq
   %out = call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %in)
   ret <16 x i8> %out
 }
 
 define <2 x i64> @foldv2i64() nounwind {
 ; SSE-LABEL: foldv2i64:
 ; SSE:       # BB#0:
 ; SSE-NEXT:    movaps {{.*#+}} xmm0 = [1,64]

llvm/trunk/test/CodeGen/X86/vector-popcnt-256.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512VPOPCNTDQ
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=BITALG_NOVLX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=BITALG
 
 define <4 x i64> @testv4i64(<4 x i64> %in) nounwind {
 ; AVX1-LABEL: testv4i64:
 ; AVX1:       # BB#0:
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
 ; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
 ; AVX1-NEXT:    vpand %xmm2, %xmm1, %xmm3
 ; AVX1-NEXT:    vmovdqa {{.*#+}} xmm4 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]

 ; AVX2-NEXT:    retq
 ;
 ; AVX512VPOPCNTDQ-LABEL: testv16i16:
 ; AVX512VPOPCNTDQ:       # BB#0:
 ; AVX512VPOPCNTDQ-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
 ; AVX512VPOPCNTDQ-NEXT:    vpopcntd %zmm0, %zmm0
 ; AVX512VPOPCNTDQ-NEXT:    vpmovdw %zmm0, %ymm0
 ; AVX512VPOPCNTDQ-NEXT:    retq
+;
+; BITALG_NOVLX-LABEL: testv16i16:
+; BITALG_NOVLX:       # BB#0:
+; BITALG_NOVLX-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; BITALG_NOVLX-NEXT:    vpopcntw %zmm0, %zmm0
+; BITALG_NOVLX-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT:    retq
+;
+; BITALG-LABEL: testv16i16:
+; BITALG:       # BB#0:
+; BITALG-NEXT:    vpopcntw %ymm0, %ymm0
+; BITALG-NEXT:    retq
   %out = call <16 x i16> @llvm.ctpop.v16i16(<16 x i16> %in)
   ret <16 x i16> %out
 }
 
 define <32 x i8> @testv32i8(<32 x i8> %in) nounwind {
 ; AVX1-LABEL: testv32i8:
 ; AVX1:       # BB#0:
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1

 ; AVX512VPOPCNTDQ-NEXT:    vpand %ymm1, %ymm0, %ymm2
 ; AVX512VPOPCNTDQ-NEXT:    vmovdqa {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
 ; AVX512VPOPCNTDQ-NEXT:    vpshufb %ymm2, %ymm3, %ymm2
 ; AVX512VPOPCNTDQ-NEXT:    vpsrlw $4, %ymm0, %ymm0
 ; AVX512VPOPCNTDQ-NEXT:    vpand %ymm1, %ymm0, %ymm0
 ; AVX512VPOPCNTDQ-NEXT:    vpshufb %ymm0, %ymm3, %ymm0
 ; AVX512VPOPCNTDQ-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
 ; AVX512VPOPCNTDQ-NEXT:    retq
+;
+; BITALG_NOVLX-LABEL: testv32i8:
+; BITALG_NOVLX:       # BB#0:
+; BITALG_NOVLX-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; BITALG_NOVLX-NEXT:    vpopcntb %zmm0, %zmm0
+; BITALG_NOVLX-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT:    retq
+;
+; BITALG-LABEL: testv32i8:
+; BITALG:       # BB#0:
+; BITALG-NEXT:    vpopcntb %ymm0, %ymm0
+; BITALG-NEXT:    retq
   %out = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %in)
   ret <32 x i8> %out
 }
 
 define <4 x i64> @foldv4i64() nounwind {
 ; ALL-LABEL: foldv4i64:
 ; ALL:       # BB#0:
 ; ALL-NEXT:    vmovaps {{.*#+}} ymm0 = [1,64,0,8]

llvm/trunk/test/CodeGen/X86/vector-popcnt-512.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512BW
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512VPOPCNTDQ --check-prefix=AVX512VPOPCNTDQ-NOBW
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512bw | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512VPOPCNTDQ --check-prefix=AVX512VPOPCNTDQ-BW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=AVX512 --check-prefix=BITALG
 
 define <8 x i64> @testv8i64(<8 x i64> %in) nounwind {
 ; AVX512F-LABEL: testv8i64:
 ; AVX512F:       # BB#0:
 ; AVX512F-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
 ; AVX512F-NEXT:    vmovdqa {{.*#+}} ymm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
 ; AVX512F-NEXT:    vpand %ymm2, %ymm1, %ymm3
 ; AVX512F-NEXT:    vmovdqa {{.*#+}} ymm4 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]

 ; AVX512VPOPCNTDQ-BW-NEXT:    vpsrlw $4, %zmm0, %zmm0
 ; AVX512VPOPCNTDQ-BW-NEXT:    vpandq %zmm1, %zmm0, %zmm0
 ; AVX512VPOPCNTDQ-BW-NEXT:    vpshufb %zmm0, %zmm3, %zmm0
 ; AVX512VPOPCNTDQ-BW-NEXT:    vpaddb %zmm2, %zmm0, %zmm0
 ; AVX512VPOPCNTDQ-BW-NEXT:    vpsllw $8, %zmm0, %zmm1
 ; AVX512VPOPCNTDQ-BW-NEXT:    vpaddb %zmm0, %zmm1, %zmm0
 ; AVX512VPOPCNTDQ-BW-NEXT:    vpsrlw $8, %zmm0, %zmm0
 ; AVX512VPOPCNTDQ-BW-NEXT:    retq
+;
+; BITALG-LABEL: testv32i16:
+; BITALG:       # BB#0:
+; BITALG-NEXT:    vpopcntw %zmm0, %zmm0
+; BITALG-NEXT:    retq
   %out = call <32 x i16> @llvm.ctpop.v32i16(<32 x i16> %in)
   ret <32 x i16> %out
 }
 
 define <64 x i8> @testv64i8(<64 x i8> %in) nounwind {
 ; AVX512F-LABEL: testv64i8:
 ; AVX512F:       # BB#0:
 ; AVX512F-NEXT:    vmovdqa {{.*#+}} ymm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]

 ; AVX512VPOPCNTDQ-BW-NEXT:    vpandq %zmm1, %zmm0, %zmm2
 ; AVX512VPOPCNTDQ-BW-NEXT:    vmovdqa64 {{.*#+}} zmm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
 ; AVX512VPOPCNTDQ-BW-NEXT:    vpshufb %zmm2, %zmm3, %zmm2
 ; AVX512VPOPCNTDQ-BW-NEXT:    vpsrlw $4, %zmm0, %zmm0
 ; AVX512VPOPCNTDQ-BW-NEXT:    vpandq %zmm1, %zmm0, %zmm0
 ; AVX512VPOPCNTDQ-BW-NEXT:    vpshufb %zmm0, %zmm3, %zmm0
 ; AVX512VPOPCNTDQ-BW-NEXT:    vpaddb %zmm2, %zmm0, %zmm0
 ; AVX512VPOPCNTDQ-BW-NEXT:    retq
+;
+; BITALG-LABEL: testv64i8:
+; BITALG:       # BB#0:
+; BITALG-NEXT:    vpopcntb %zmm0, %zmm0
+; BITALG-NEXT:    retq
   %out = call <64 x i8> @llvm.ctpop.v64i8(<64 x i8> %in)
   ret <64 x i8> %out
 }
 
 declare <8 x i64> @llvm.ctpop.v8i64(<8 x i64>)
 declare <16 x i32> @llvm.ctpop.v16i32(<16 x i32>)
 declare <32 x i16> @llvm.ctpop.v32i16(<32 x i16>)
 declare <64 x i8> @llvm.ctpop.v64i8(<64 x i8>)

llvm/trunk/test/CodeGen/X86/vector-tzcnt-128.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512CDVL
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,-avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512CD
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefix=ALL --check-prefix=AVX512VPOPCNTDQ
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=ALL --check-prefix=BITALG_NOVLX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=BITALG
 ;
 ; Just one 32-bit run to make sure we do reasonable things for i64 tzcnt.
 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE41
 
 define <2 x i64> @testv2i64(<2 x i64> %in) nounwind {
 ; SSE2-LABEL: testv2i64:
 ; SSE2:       # BB#0:
 ; SSE2-NEXT:    pxor %xmm1, %xmm1

 ; AVX512VPOPCNTDQ-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
 ; AVX512VPOPCNTDQ-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
 ; AVX512VPOPCNTDQ-NEXT:    vpmovzxwq {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
 ; AVX512VPOPCNTDQ-NEXT:    vpopcntq %zmm0, %zmm0
 ; AVX512VPOPCNTDQ-NEXT:    vpmovqw %zmm0, %xmm0
 ; AVX512VPOPCNTDQ-NEXT:    vzeroupper
 ; AVX512VPOPCNTDQ-NEXT:    retq
 ;
+; BITALG_NOVLX-LABEL: testv8i16:
+; BITALG_NOVLX:       # BB#0:
+; BITALG_NOVLX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; BITALG_NOVLX-NEXT:    vpsubw %xmm0, %xmm1, %xmm1
+; BITALG_NOVLX-NEXT:    vpand %xmm1, %xmm0, %xmm0
+; BITALG_NOVLX-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
+; BITALG_NOVLX-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
+; BITALG_NOVLX-NEXT:    vpopcntw %zmm0, %zmm0
+; BITALG_NOVLX-NEXT:    # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT:    vzeroupper
+; BITALG_NOVLX-NEXT:    retq
+;
+; BITALG-LABEL: testv8i16:
+; BITALG:       # BB#0:
+; BITALG-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; BITALG-NEXT:    vpsubw %xmm0, %xmm1, %xmm1
+; BITALG-NEXT:    vpand %xmm1, %xmm0, %xmm0
+; BITALG-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
+; BITALG-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
+; BITALG-NEXT:    vpopcntw %xmm0, %xmm0
+; BITALG-NEXT:    retq
+;
 ; X32-SSE-LABEL: testv8i16:
 ; X32-SSE:       # BB#0:
 ; X32-SSE-NEXT:    pxor %xmm1, %xmm1
 ; X32-SSE-NEXT:    psubw %xmm0, %xmm1
 ; X32-SSE-NEXT:    pand %xmm0, %xmm1
 ; X32-SSE-NEXT:    pcmpeqd %xmm0, %xmm0
 ; X32-SSE-NEXT:    paddw %xmm1, %xmm0
 ; X32-SSE-NEXT:    movdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]

 ; AVX512VPOPCNTDQ-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
 ; AVX512VPOPCNTDQ-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
 ; AVX512VPOPCNTDQ-NEXT:    vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
 ; AVX512VPOPCNTDQ-NEXT:    vpopcntd %zmm0, %zmm0
 ; AVX512VPOPCNTDQ-NEXT:    vpmovdb %zmm0, %xmm0
 ; AVX512VPOPCNTDQ-NEXT:    vzeroupper
 ; AVX512VPOPCNTDQ-NEXT:    retq
 ;
+; BITALG_NOVLX-LABEL: testv16i8:
+; BITALG_NOVLX:       # BB#0:
+; BITALG_NOVLX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; BITALG_NOVLX-NEXT:    vpsubb %xmm0, %xmm1, %xmm1
+; BITALG_NOVLX-NEXT:    vpand %xmm1, %xmm0, %xmm0
+; BITALG_NOVLX-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
+; BITALG_NOVLX-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
+; BITALG_NOVLX-NEXT:    vpopcntb %zmm0, %zmm0
+; BITALG_NOVLX-NEXT:    # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT:    vzeroupper
+; BITALG_NOVLX-NEXT:    retq
+;
+; BITALG-LABEL: testv16i8:
+; BITALG:       # BB#0:
+; BITALG-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; BITALG-NEXT:    vpsubb %xmm0, %xmm1, %xmm1
+; BITALG-NEXT:    vpand %xmm1, %xmm0, %xmm0
+; BITALG-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
+; BITALG-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
+; BITALG-NEXT:    vpopcntb %xmm0, %xmm0
+; BITALG-NEXT:    retq
+;
 ; X32-SSE-LABEL: testv16i8:
 ; X32-SSE:       # BB#0:
 ; X32-SSE-NEXT:    pxor %xmm1, %xmm1
 ; X32-SSE-NEXT:    psubb %xmm0, %xmm1
 ; X32-SSE-NEXT:    pand %xmm0, %xmm1
 ; X32-SSE-NEXT:    pcmpeqd %xmm2, %xmm2
 ; X32-SSE-NEXT:    paddb %xmm1, %xmm2
 ; X32-SSE-NEXT:    movdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]

llvm/trunk/test/CodeGen/X86/vector-tzcnt-256.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512CDVL
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,-avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512CD
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512VPOPCNTDQ
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=ALL --check-prefix=BITALG_NOVLX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=BITALG
 ;
 ; Just one 32-bit run to make sure we do reasonable things for i64 tzcnt.
 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-AVX --check-prefix=X32-AVX2
 
 define <4 x i64> @testv4i64(<4 x i64> %in) nounwind {
 ; AVX1-LABEL: testv4i64:
 ; AVX1:       # BB#0:
 ; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1

 ; AVX512VPOPCNTDQ-NEXT:    vpand %ymm1, %ymm0, %ymm0
 ; AVX512VPOPCNTDQ-NEXT:    vpcmpeqd %ymm1, %ymm1, %ymm1
 ; AVX512VPOPCNTDQ-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
 ; AVX512VPOPCNTDQ-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
 ; AVX512VPOPCNTDQ-NEXT:    vpopcntd %zmm0, %zmm0
 ; AVX512VPOPCNTDQ-NEXT:    vpmovdw %zmm0, %ymm0
 ; AVX512VPOPCNTDQ-NEXT:    retq
 ;
+; BITALG_NOVLX-LABEL: testv16i16:
+; BITALG_NOVLX:       # BB#0:
+; BITALG_NOVLX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; BITALG_NOVLX-NEXT:    vpsubw %ymm0, %ymm1, %ymm1
+; BITALG_NOVLX-NEXT:    vpand %ymm1, %ymm0, %ymm0
+; BITALG_NOVLX-NEXT:    vpcmpeqd %ymm1, %ymm1, %ymm1
+; BITALG_NOVLX-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
+; BITALG_NOVLX-NEXT:    vpopcntw %zmm0, %zmm0
+; BITALG_NOVLX-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT:    retq
+;
+; BITALG-LABEL: testv16i16:
+; BITALG:       # BB#0:
+; BITALG-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; BITALG-NEXT:    vpsubw %ymm0, %ymm1, %ymm1
+; BITALG-NEXT:    vpand %ymm1, %ymm0, %ymm0
+; BITALG-NEXT:    vpcmpeqd %ymm1, %ymm1, %ymm1
+; BITALG-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
+; BITALG-NEXT:    vpopcntw %ymm0, %ymm0
+; BITALG-NEXT:    retq
+;
 ; X32-AVX-LABEL: testv16i16:
 ; X32-AVX:       # BB#0:
 ; X32-AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
 ; X32-AVX-NEXT:    vpsubw %ymm0, %ymm1, %ymm1
 ; X32-AVX-NEXT:    vpand %ymm1, %ymm0, %ymm0
 ; X32-AVX-NEXT:    vpcmpeqd %ymm1, %ymm1, %ymm1
 ; X32-AVX-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
 ; X32-AVX-NEXT:    vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]

 ; AVX512VPOPCNTDQ-NEXT:    vmovdqa {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
 ; AVX512VPOPCNTDQ-NEXT:    vpshufb %ymm2, %ymm3, %ymm2
 ; AVX512VPOPCNTDQ-NEXT:    vpsrlw $4, %ymm0, %ymm0
 ; AVX512VPOPCNTDQ-NEXT:    vpand %ymm1, %ymm0, %ymm0
 ; AVX512VPOPCNTDQ-NEXT:    vpshufb %ymm0, %ymm3, %ymm0
 ; AVX512VPOPCNTDQ-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
 ; AVX512VPOPCNTDQ-NEXT:    retq
 ;
+; BITALG_NOVLX-LABEL: testv32i8:
+; BITALG_NOVLX:       # BB#0:
+; BITALG_NOVLX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; BITALG_NOVLX-NEXT:    vpsubb %ymm0, %ymm1, %ymm1
+; BITALG_NOVLX-NEXT:    vpand %ymm1, %ymm0, %ymm0
+; BITALG_NOVLX-NEXT:    vpcmpeqd %ymm1, %ymm1, %ymm1
+; BITALG_NOVLX-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
+; BITALG_NOVLX-NEXT:    vpopcntb %zmm0, %zmm0
+; BITALG_NOVLX-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill>
+; BITALG_NOVLX-NEXT:    retq
+;
+; BITALG-LABEL: testv32i8:
+; BITALG:       # BB#0:
+; BITALG-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; BITALG-NEXT:    vpsubb %ymm0, %ymm1, %ymm1
+; BITALG-NEXT:    vpand %ymm1, %ymm0, %ymm0
+; BITALG-NEXT:    vpcmpeqd %ymm1, %ymm1, %ymm1
+; BITALG-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
+; BITALG-NEXT:    vpopcntb %ymm0, %ymm0
+; BITALG-NEXT:    retq
+;
 ; X32-AVX-LABEL: testv32i8:
 ; X32-AVX:       # BB#0:
 ; X32-AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
 ; X32-AVX-NEXT:    vpsubb %ymm0, %ymm1, %ymm1
 ; X32-AVX-NEXT:    vpand %ymm1, %ymm0, %ymm0
 ; X32-AVX-NEXT:    vpcmpeqd %ymm1, %ymm1, %ymm1
 ; X32-AVX-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
 ; X32-AVX-NEXT:    vmovdqa {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]

llvm/trunk/test/CodeGen/X86/vector-tzcnt-512.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512cd | FileCheck %s --check-prefix=ALL --check-prefix=AVX512CD
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512cd,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512CDBW
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512BW
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefix=ALL --check-prefix=AVX512VPOPCNTDQ
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=ALL --check-prefix=BITALG
 
 define <8 x i64> @testv8i64(<8 x i64> %in) nounwind {
 ; AVX512CD-LABEL: testv8i64:
 ; AVX512CD:       # BB#0:
 ; AVX512CD-NEXT:    vpxor %xmm1, %xmm1, %xmm1
 ; AVX512CD-NEXT:    vpsubq %zmm0, %zmm1, %zmm1
 ; AVX512CD-NEXT:    vpandq %zmm1, %zmm0, %zmm0
 ; AVX512CD-NEXT:    vpternlogd $255, %zmm1, %zmm1, %zmm1

 ; AVX512VPOPCNTDQ-NEXT:    vpmovdw %zmm0, %ymm0
 ; AVX512VPOPCNTDQ-NEXT:    vpsubw %ymm1, %ymm2, %ymm2
 ; AVX512VPOPCNTDQ-NEXT:    vpand %ymm2, %ymm1, %ymm1
 ; AVX512VPOPCNTDQ-NEXT:    vpaddw %ymm3, %ymm1, %ymm1
 ; AVX512VPOPCNTDQ-NEXT:    vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
 ; AVX512VPOPCNTDQ-NEXT:    vpopcntd %zmm1, %zmm1
 ; AVX512VPOPCNTDQ-NEXT:    vpmovdw %zmm1, %ymm1
 ; AVX512VPOPCNTDQ-NEXT:    retq
+;
+; BITALG-LABEL: testv32i16:
+; BITALG:       # BB#0:
+; BITALG-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; BITALG-NEXT:    vpsubw %zmm0, %zmm1, %zmm1
+; BITALG-NEXT:    vpandq %zmm1, %zmm0, %zmm0
+; BITALG-NEXT:    vpternlogd $255, %zmm1, %zmm1, %zmm1
+; BITALG-NEXT:    vpaddw %zmm1, %zmm0, %zmm0
+; BITALG-NEXT:    vpopcntw %zmm0, %zmm0
+; BITALG-NEXT:    retq
   %out = call <32 x i16> @llvm.cttz.v32i16(<32 x i16> %in, i1 0)
   ret <32 x i16> %out
 }
 
 define <32 x i16> @testv32i16u(<32 x i16> %in) nounwind {
 ; AVX512CD-LABEL: testv32i16u:
 ; AVX512CD:       # BB#0:
 ; AVX512CD-NEXT:    vpxor %xmm2, %xmm2, %xmm2

 ; AVX512VPOPCNTDQ-NEXT:    vpaddb %ymm3, %ymm1, %ymm1
 ; AVX512VPOPCNTDQ-NEXT:    vpand %ymm4, %ymm1, %ymm2
 ; AVX512VPOPCNTDQ-NEXT:    vpshufb %ymm2, %ymm6, %ymm2
 ; AVX512VPOPCNTDQ-NEXT:    vpsrlw $4, %ymm1, %ymm1
 ; AVX512VPOPCNTDQ-NEXT:    vpand %ymm4, %ymm1, %ymm1
 ; AVX512VPOPCNTDQ-NEXT:    vpshufb %ymm1, %ymm6, %ymm1
 ; AVX512VPOPCNTDQ-NEXT:    vpaddb %ymm2, %ymm1, %ymm1
 ; AVX512VPOPCNTDQ-NEXT:    retq
+;
+; BITALG-LABEL: testv64i8:
+; BITALG:       # BB#0:
+; BITALG-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; BITALG-NEXT:    vpsubb %zmm0, %zmm1, %zmm1
+; BITALG-NEXT:    vpandq %zmm1, %zmm0, %zmm0
+; BITALG-NEXT:    vpternlogd $255, %zmm1, %zmm1, %zmm1
+; BITALG-NEXT:    vpaddb %zmm1, %zmm0, %zmm0
+; BITALG-NEXT:    vpopcntb %zmm0, %zmm0
+; BITALG-NEXT:    retq
   %out = call <64 x i8> @llvm.cttz.v64i8(<64 x i8> %in, i1 0)
   ret <64 x i8> %out
 }
 
 define <64 x i8> @testv64i8u(<64 x i8> %in) nounwind {
 ; AVX512CD-LABEL: testv64i8u:
 ; AVX512CD:       # BB#0:
 ; AVX512CD-NEXT:    vpxor %xmm2, %xmm2, %xmm2

llvm/trunk/test/MC/X86/avx512bitalg-encoding.s

+// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl -mattr=+avx512bitalg --show-encoding < %s | FileCheck %s
+
+// CHECK: vpopcntb %zmm23, %zmm21
+// CHECK: encoding: [0x62,0xa2,0x7d,0x48,0x54,0xef]
+          vpopcntb %zmm23, %zmm21
+
+// CHECK: vpopcntw %zmm23, %zmm21
+// CHECK: encoding: [0x62,0xa2,0xfd,0x48,0x54,0xef]
+          vpopcntw %zmm23, %zmm21
+
+// CHECK: vpopcntb %zmm3, %zmm1 {%k2}
+// CHECK: encoding: [0x62,0xf2,0x7d,0x4a,0x54,0xcb]
+          vpopcntb %zmm3, %zmm1 {%k2}
+
+// CHECK: vpopcntw %zmm3, %zmm1 {%k2}
+// CHECK: encoding: [0x62,0xf2,0xfd,0x4a,0x54,0xcb]
+          vpopcntw %zmm3, %zmm1 {%k2}
+
+// CHECK: vpopcntb  (%rcx), %zmm1
+// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x54,0x09]
+          vpopcntb  (%rcx), %zmm1
+
+// CHECK: vpopcntb  -256(%rsp), %zmm1
+// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x54,0x4c,0x24,0xfc]
+          vpopcntb  -256(%rsp), %zmm1
+
+// CHECK: vpopcntb  256(%rsp), %zmm1
+// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x54,0x4c,0x24,0x04]
+          vpopcntb  256(%rsp), %zmm1
+
+// CHECK: vpopcntb  268435456(%rcx,%r14,8), %zmm1
+// CHECK: encoding: [0x62,0xb2,0x7d,0x48,0x54,0x8c,0xf1,0x00,0x00,0x00,0x10]
+          vpopcntb  268435456(%rcx,%r14,8), %zmm1
+
+// CHECK: vpopcntb  -536870912(%rcx,%r14,8), %zmm1
+// CHECK: encoding: [0x62,0xb2,0x7d,0x48,0x54,0x8c,0xf1,0x00,0x00,0x00,0xe0]
+          vpopcntb  -536870912(%rcx,%r14,8), %zmm1
+
+// CHECK: vpopcntb  -536870910(%rcx,%r14,8), %zmm1
+// CHECK: encoding: [0x62,0xb2,0x7d,0x48,0x54,0x8c,0xf1,0x02,0x00,0x00,0xe0]
+          vpopcntb  -536870910(%rcx,%r14,8), %zmm1
+
+// CHECK: vpopcntw  (%rcx), %zmm1
+// CHECK: encoding: [0x62,0xf2,0xfd,0x48,0x54,0x09]
+          vpopcntw  (%rcx), %zmm1
+
+// CHECK: vpopcntw  -256(%rsp), %zmm1
+// CHECK: encoding: [0x62,0xf2,0xfd,0x48,0x54,0x4c,0x24,0xfc]
+          vpopcntw  -256(%rsp), %zmm1
+
+// CHECK: vpopcntw  256(%rsp), %zmm1
+// CHECK: encoding: [0x62,0xf2,0xfd,0x48,0x54,0x4c,0x24,0x04]
+          vpopcntw  256(%rsp), %zmm1
+
+// CHECK: vpopcntw  268435456(%rcx,%r14,8), %zmm1
+// CHECK: encoding: [0x62,0xb2,0xfd,0x48,0x54,0x8c,0xf1,0x00,0x00,0x00,0x10]
+          vpopcntw  268435456(%rcx,%r14,8), %zmm1
+
+// CHECK: vpopcntw  -536870912(%rcx,%r14,8), %zmm1
+// CHECK: encoding: [0x62,0xb2,0xfd,0x48,0x54,0x8c,0xf1,0x00,0x00,0x00,0xe0]
+          vpopcntw  -536870912(%rcx,%r14,8), %zmm1
+
+// CHECK: vpopcntw  -536870910(%rcx,%r14,8), %zmm1
+// CHECK: encoding: [0x62,0xb2,0xfd,0x48,0x54,0x8c,0xf1,0x02,0x00,0x00,0xe0]
+          vpopcntw  -536870910(%rcx,%r14,8), %zmm1
+
+// CHECK: vpopcntb  (%rcx), %zmm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0x7d,0x4a,0x54,0x29]
+          vpopcntb  (%rcx), %zmm21 {%k2}
+
+// CHECK: vpopcntb  -256(%rsp), %zmm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0x7d,0x4a,0x54,0x6c,0x24,0xfc]
+          vpopcntb  -256(%rsp), %zmm21 {%k2}
+
+// CHECK: vpopcntb  256(%rsp), %zmm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0x7d,0x4a,0x54,0x6c,0x24,0x04]
+          vpopcntb  256(%rsp), %zmm21 {%k2}
+
+// CHECK: vpopcntb  268435456(%rcx,%r14,8), %zmm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0x7d,0x4a,0x54,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vpopcntb  268435456(%rcx,%r14,8), %zmm21 {%k2}
+
+// CHECK: vpopcntb  -536870912(%rcx,%r14,8), %zmm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0x7d,0x4a,0x54,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vpopcntb  -536870912(%rcx,%r14,8), %zmm21 {%k2}
+
+// CHECK: vpopcntb  -536870910(%rcx,%r14,8), %zmm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0x7d,0x4a,0x54,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vpopcntb  -536870910(%rcx,%r14,8), %zmm21 {%k2}
+
+// CHECK: vpopcntw  (%rcx), %zmm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0xfd,0x4a,0x54,0x29]
+          vpopcntw  (%rcx), %zmm21 {%k2}
+
+// CHECK: vpopcntw  -256(%rsp), %zmm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0xfd,0x4a,0x54,0x6c,0x24,0xfc]
+          vpopcntw  -256(%rsp), %zmm21 {%k2}
+
+// CHECK: vpopcntw  256(%rsp), %zmm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0xfd,0x4a,0x54,0x6c,0x24,0x04]
+          vpopcntw  256(%rsp), %zmm21 {%k2}
+
+// CHECK: vpopcntw  268435456(%rcx,%r14,8), %zmm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0xfd,0x4a,0x54,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vpopcntw  268435456(%rcx,%r14,8), %zmm21 {%k2}
+
+// CHECK: vpopcntw  -536870912(%rcx,%r14,8), %zmm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0xfd,0x4a,0x54,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vpopcntw  -536870912(%rcx,%r14,8), %zmm21 {%k2}
+
+// CHECK: vpopcntw  -536870910(%rcx,%r14,8), %zmm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0xfd,0x4a,0x54,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vpopcntw  -536870910(%rcx,%r14,8), %zmm21 {%k2}
+

llvm/trunk/test/MC/X86/avx512vl_bitalg-encoding.s

+// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl -mattr=+avx512vl,+avx512bitalg --show-encoding < %s | FileCheck %s
+
+// CHECK: vpopcntb %xmm23, %xmm21
+// CHECK: encoding: [0x62,0xa2,0x7d,0x08,0x54,0xef]
+          vpopcntb %xmm23, %xmm21
+
+// CHECK: vpopcntw %xmm23, %xmm21
+// CHECK: encoding: [0x62,0xa2,0xfd,0x08,0x54,0xef]
+          vpopcntw %xmm23, %xmm21
+
+// CHECK: vpopcntb %xmm3, %xmm1 {%k2}
+// CHECK: encoding: [0x62,0xf2,0x7d,0x0a,0x54,0xcb]
+          vpopcntb %xmm3, %xmm1 {%k2}
+
+// CHECK: vpopcntw %xmm3, %xmm1 {%k2}
+// CHECK: encoding: [0x62,0xf2,0xfd,0x0a,0x54,0xcb]
+          vpopcntw %xmm3, %xmm1 {%k2}
+
+// CHECK: vpopcntb  (%rcx), %xmm1
+// CHECK: encoding: [0x62,0xf2,0x7d,0x08,0x54,0x09]
+          vpopcntb  (%rcx), %xmm1
+
+// CHECK: vpopcntb  -64(%rsp), %xmm1
+// CHECK: encoding: [0x62,0xf2,0x7d,0x08,0x54,0x4c,0x24,0xfc]
+          vpopcntb  -64(%rsp), %xmm1
+
+// CHECK: vpopcntb  64(%rsp), %xmm1
+// CHECK: encoding: [0x62,0xf2,0x7d,0x08,0x54,0x4c,0x24,0x04]
+          vpopcntb  64(%rsp), %xmm1
+
+// CHECK: vpopcntb  268435456(%rcx,%r14,8), %xmm1
+// CHECK: encoding: [0x62,0xb2,0x7d,0x08,0x54,0x8c,0xf1,0x00,0x00,0x00,0x10]
+          vpopcntb  268435456(%rcx,%r14,8), %xmm1
+
+// CHECK: vpopcntb  -536870912(%rcx,%r14,8), %xmm1
+// CHECK: encoding: [0x62,0xb2,0x7d,0x08,0x54,0x8c,0xf1,0x00,0x00,0x00,0xe0]
+          vpopcntb  -536870912(%rcx,%r14,8), %xmm1
+
+// CHECK: vpopcntb  -536870910(%rcx,%r14,8), %xmm1
+// CHECK: encoding: [0x62,0xb2,0x7d,0x08,0x54,0x8c,0xf1,0x02,0x00,0x00,0xe0]
+          vpopcntb  -536870910(%rcx,%r14,8), %xmm1
+
+// CHECK: vpopcntw  (%rcx), %xmm1
+// CHECK: encoding: [0x62,0xf2,0xfd,0x08,0x54,0x09]
+          vpopcntw  (%rcx), %xmm1
+
+// CHECK: vpopcntw  -64(%rsp), %xmm1
+// CHECK: encoding: [0x62,0xf2,0xfd,0x08,0x54,0x4c,0x24,0xfc]
+          vpopcntw  -64(%rsp), %xmm1
+
+// CHECK: vpopcntw  64(%rsp), %xmm1
+// CHECK: encoding: [0x62,0xf2,0xfd,0x08,0x54,0x4c,0x24,0x04]
+          vpopcntw  64(%rsp), %xmm1
+
+// CHECK: vpopcntw  268435456(%rcx,%r14,8), %xmm1
+// CHECK: encoding: [0x62,0xb2,0xfd,0x08,0x54,0x8c,0xf1,0x00,0x00,0x00,0x10]
+          vpopcntw  268435456(%rcx,%r14,8), %xmm1
+
+// CHECK: vpopcntw  -536870912(%rcx,%r14,8), %xmm1
+// CHECK: encoding: [0x62,0xb2,0xfd,0x08,0x54,0x8c,0xf1,0x00,0x00,0x00,0xe0]
+          vpopcntw  -536870912(%rcx,%r14,8), %xmm1
+
+// CHECK: vpopcntw  -536870910(%rcx,%r14,8), %xmm1
+// CHECK: encoding: [0x62,0xb2,0xfd,0x08,0x54,0x8c,0xf1,0x02,0x00,0x00,0xe0]
+          vpopcntw  -536870910(%rcx,%r14,8), %xmm1
+
+// CHECK: vpopcntb  (%rcx), %xmm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0x7d,0x0a,0x54,0x29]
+          vpopcntb  (%rcx), %xmm21 {%k2}
+
+// CHECK: vpopcntb  -64(%rsp), %xmm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0x7d,0x0a,0x54,0x6c,0x24,0xfc]
+          vpopcntb  -64(%rsp), %xmm21 {%k2}
+
+// CHECK: vpopcntb  64(%rsp), %xmm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0x7d,0x0a,0x54,0x6c,0x24,0x04]
+          vpopcntb  64(%rsp), %xmm21 {%k2}
+
+// CHECK: vpopcntb  268435456(%rcx,%r14,8), %xmm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0x7d,0x0a,0x54,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vpopcntb  268435456(%rcx,%r14,8), %xmm21 {%k2}
+
+// CHECK: vpopcntb  -536870912(%rcx,%r14,8), %xmm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0x7d,0x0a,0x54,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vpopcntb  -536870912(%rcx,%r14,8), %xmm21 {%k2}
+
+// CHECK: vpopcntb  -536870910(%rcx,%r14,8), %xmm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0x7d,0x0a,0x54,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vpopcntb  -536870910(%rcx,%r14,8), %xmm21 {%k2}
+
+// CHECK: vpopcntw  (%rcx), %xmm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0xfd,0x0a,0x54,0x29]
+          vpopcntw  (%rcx), %xmm21 {%k2}
+
+// CHECK: vpopcntw  -64(%rsp), %xmm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0xfd,0x0a,0x54,0x6c,0x24,0xfc]
+          vpopcntw  -64(%rsp), %xmm21 {%k2}
+
+// CHECK: vpopcntw  64(%rsp), %xmm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0xfd,0x0a,0x54,0x6c,0x24,0x04]
+          vpopcntw  64(%rsp), %xmm21 {%k2}
+
+// CHECK: vpopcntw  268435456(%rcx,%r14,8), %xmm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0xfd,0x0a,0x54,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vpopcntw  268435456(%rcx,%r14,8), %xmm21 {%k2}
+
+// CHECK: vpopcntw  -536870912(%rcx,%r14,8), %xmm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0xfd,0x0a,0x54,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vpopcntw  -536870912(%rcx,%r14,8), %xmm21 {%k2}
+
+// CHECK: vpopcntw  -536870910(%rcx,%r14,8), %xmm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0xfd,0x0a,0x54,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vpopcntw  -536870910(%rcx,%r14,8), %xmm21 {%k2}
+
+// CHECK: vpopcntb %ymm23, %ymm21
+// CHECK: encoding: [0x62,0xa2,0x7d,0x28,0x54,0xef]
+          vpopcntb %ymm23, %ymm21
+
+// CHECK: vpopcntw %ymm23, %ymm21
+// CHECK: encoding: [0x62,0xa2,0xfd,0x28,0x54,0xef]
+          vpopcntw %ymm23, %ymm21
+
+// CHECK: vpopcntb %ymm3, %ymm1 {%k2}
+// CHECK: encoding: [0x62,0xf2,0x7d,0x2a,0x54,0xcb]
+          vpopcntb %ymm3, %ymm1 {%k2}
+
+// CHECK: vpopcntw %ymm3, %ymm1 {%k2}
+// CHECK: encoding: [0x62,0xf2,0xfd,0x2a,0x54,0xcb]
+          vpopcntw %ymm3, %ymm1 {%k2}
+
+// CHECK: vpopcntb  (%rcx), %ymm1
+// CHECK: encoding: [0x62,0xf2,0x7d,0x28,0x54,0x09]
+          vpopcntb  (%rcx), %ymm1
+
+// CHECK: vpopcntb  -128(%rsp), %ymm1
+// CHECK: encoding: [0x62,0xf2,0x7d,0x28,0x54,0x4c,0x24,0xfc]
+          vpopcntb  -128(%rsp), %ymm1
+
+// CHECK: vpopcntb  128(%rsp), %ymm1
+// CHECK: encoding: [0x62,0xf2,0x7d,0x28,0x54,0x4c,0x24,0x04]
+          vpopcntb  128(%rsp), %ymm1
+
+// CHECK: vpopcntb  268435456(%rcx,%r14,8), %ymm1
+// CHECK: encoding: [0x62,0xb2,0x7d,0x28,0x54,0x8c,0xf1,0x00,0x00,0x00,0x10]
+          vpopcntb  268435456(%rcx,%r14,8), %ymm1
+
+// CHECK: vpopcntb  -536870912(%rcx,%r14,8), %ymm1
+// CHECK: encoding: [0x62,0xb2,0x7d,0x28,0x54,0x8c,0xf1,0x00,0x00,0x00,0xe0]
+          vpopcntb  -536870912(%rcx,%r14,8), %ymm1
+
+// CHECK: vpopcntb  -536870910(%rcx,%r14,8), %ymm1
+// CHECK: encoding: [0x62,0xb2,0x7d,0x28,0x54,0x8c,0xf1,0x02,0x00,0x00,0xe0]
+          vpopcntb  -536870910(%rcx,%r14,8), %ymm1
+
+// CHECK: vpopcntw  (%rcx), %ymm1
+// CHECK: encoding: [0x62,0xf2,0xfd,0x28,0x54,0x09]
+          vpopcntw  (%rcx), %ymm1
+
+// CHECK: vpopcntw  -128(%rsp), %ymm1
+// CHECK: encoding: [0x62,0xf2,0xfd,0x28,0x54,0x4c,0x24,0xfc]
+          vpopcntw  -128(%rsp), %ymm1
+
+// CHECK: vpopcntw  128(%rsp), %ymm1
+// CHECK: encoding: [0x62,0xf2,0xfd,0x28,0x54,0x4c,0x24,0x04]
+          vpopcntw  128(%rsp), %ymm1
+
+// CHECK: vpopcntw  268435456(%rcx,%r14,8), %ymm1
+// CHECK: encoding: [0x62,0xb2,0xfd,0x28,0x54,0x8c,0xf1,0x00,0x00,0x00,0x10]
+          vpopcntw  268435456(%rcx,%r14,8), %ymm1
+
+// CHECK: vpopcntw  -536870912(%rcx,%r14,8), %ymm1
+// CHECK: encoding: [0x62,0xb2,0xfd,0x28,0x54,0x8c,0xf1,0x00,0x00,0x00,0xe0]
+          vpopcntw  -536870912(%rcx,%r14,8), %ymm1
+
+// CHECK: vpopcntw  -536870910(%rcx,%r14,8), %ymm1
+// CHECK: encoding: [0x62,0xb2,0xfd,0x28,0x54,0x8c,0xf1,0x02,0x00,0x00,0xe0]
+          vpopcntw  -536870910(%rcx,%r14,8), %ymm1
+
+// CHECK: vpopcntb  (%rcx), %ymm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0x7d,0x2a,0x54,0x29]
+          vpopcntb  (%rcx), %ymm21 {%k2}
+
+// CHECK: vpopcntb  -128(%rsp), %ymm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0x7d,0x2a,0x54,0x6c,0x24,0xfc]
+          vpopcntb  -128(%rsp), %ymm21 {%k2}
+
+// CHECK: vpopcntb  128(%rsp), %ymm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0x7d,0x2a,0x54,0x6c,0x24,0x04]
+          vpopcntb  128(%rsp), %ymm21 {%k2}
+
+// CHECK: vpopcntb  268435456(%rcx,%r14,8), %ymm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0x7d,0x2a,0x54,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vpopcntb  268435456(%rcx,%r14,8), %ymm21 {%k2}
+
+// CHECK: vpopcntb  -536870912(%rcx,%r14,8), %ymm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0x7d,0x2a,0x54,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vpopcntb  -536870912(%rcx,%r14,8), %ymm21 {%k2}
+
+// CHECK: vpopcntb  -536870910(%rcx,%r14,8), %ymm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0x7d,0x2a,0x54,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vpopcntb  -536870910(%rcx,%r14,8), %ymm21 {%k2}
+
+// CHECK: vpopcntw  (%rcx), %ymm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0xfd,0x2a,0x54,0x29]
+          vpopcntw  (%rcx), %ymm21 {%k2}
+
+// CHECK: vpopcntw  -128(%rsp), %ymm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0xfd,0x2a,0x54,0x6c,0x24,0xfc]
+          vpopcntw  -128(%rsp), %ymm21 {%k2}
+
+// CHECK: vpopcntw  128(%rsp), %ymm21 {%k2}
+// CHECK: encoding: [0x62,0xe2,0xfd,0x2a,0x54,0x6c,0x24,0x04]
+          vpopcntw  128(%rsp), %ymm21 {%k2}
+
+// CHECK: vpopcntw  268435456(%rcx,%r14,8), %ymm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0xfd,0x2a,0x54,0xac,0xf1,0x00,0x00,0x00,0x10]
+          vpopcntw  268435456(%rcx,%r14,8), %ymm21 {%k2}
+
+// CHECK: vpopcntw  -536870912(%rcx,%r14,8), %ymm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0xfd,0x2a,0x54,0xac,0xf1,0x00,0x00,0x00,0xe0]
+          vpopcntw  -536870912(%rcx,%r14,8), %ymm21 {%k2}
+
+// CHECK: vpopcntw  -536870910(%rcx,%r14,8), %ymm21 {%k2}
+// CHECK: encoding: [0x62,0xa2,0xfd,0x2a,0x54,0xac,0xf1,0x02,0x00,0x00,0xe0]
+          vpopcntw  -536870910(%rcx,%r14,8), %ymm21 {%k2}
+