[PPC] Change i32 constant in store instruction to i64

[Carrot]

Summary

The motivated test case is:

struct S {

long l;
char c;
short s;
int i;

};

void foo(struct S *p) {

p->l = 0;
p->c = 0;
p->s = 0;
p->i = 0;

}

It is very common in constructors, llvm generates:

li 4, 0
li 5, 0          <=== this is not necessary, we could use r4 instead.
stb 4, 0(3)
sth 4, 2(3)
stw 4, 4(3)
std 5, 8(3)
blr

It is because 8bit and 16bit types are not legal, they are promoted to 32bit, so all 8b/16b/32b stores reference Constant:i32<0>, constants are shared in LLVM IR, so they are naturally CSEd. 64bit store references Constant:i64<0>, it is of different type, so it is represented by a different constant node, and generate another constant construction instruction.

This patch changes all i32 constant in store instruction to i64 with truncation, to increase the chance that the referenced constant can be shared with other i64 constant.

[nemanjai]

Thanks for taking care of this, I think it's quite useful and it should reduce the number of load immediate instructions and registers used. However, do we really need to expose a new API in StoreSDNode? Can we not just create a new truncating store using SelectionDAG::getTruncStore()? That would make this look a lot more like the rest of the DAG combines.

[Carrot]

In D39875#921641, @nemanjai wrote:

Thanks for taking care of this, I think it's quite useful and it should reduce the number of load immediate instructions and registers used. However, do we really need to expose a new API in StoreSDNode? Can we not just create a new truncating store using SelectionDAG::getTruncStore()? That would make this look a lot more like the rest of the DAG combines.

There are two SelectionDAG::getTruncStore() functions, but neither of them can accept the general (base + offset) addressing mode, so if we use getTruncStore, we still need UpdateNodeOperands to add offset if there is one.

[nemanjai]

There are two SelectionDAG::getTruncStore() functions, but neither of them can accept the general (base + offset) addressing mode, so if we use getTruncStore, we still need UpdateNodeOperands to add offset if there is one.

Fair enough, it's unfortunate that there isn't an overload that can do the job. And providing another overload is probably even more intrusive than adding a mutator function like this to StoreSDNode. Can you please add a comment explaining that in the code since this looks different from other combines and others may wonder why we didn't just use DAG.getTruncStore()?

LGTM.

include/llvm/CodeGen/SelectionDAGNodes.h

2018

I think this line might be too long.

[nemanjai]

Forgot to select "Accept"...

[Carrot]

Will check in this version.

[Carrot]

Committed as r318436.

include/llvm/CodeGen/SelectionDAGNodes.h

StoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
     assert(writeMem() && "Store MachineMemOperand is not a store!");
   }
 
 public:
   /// Return true if the op does a truncation before store.
   /// For integers this is the same as doing a TRUNCATE and storing the result.
   /// For floats, it is the same as doing an FP_ROUND and storing the result.
   bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
+  void setTruncatingStore(bool Truncating) { StoreSDNodeBits.IsTruncating = Truncating; };
 
   const SDValue &getValue() const { return getOperand(1); }
   const SDValue &getBasePtr() const { return getOperand(2); }
   const SDValue &getOffset() const { return getOperand(3); }
 
   static bool classof(const SDNode *N) {
     return N->getOpcode() == ISD::STORE;
   }

lib/Target/PowerPC/PPCISelLowering.cpp

if (cast<StoreSDNode>(N)->isUnindexed() &&
         N->getOperand(0), BSwapOp, N->getOperand(2), DAG.getValueType(mVT)
       };
       return
         DAG.getMemIntrinsicNode(PPCISD::STBRX, dl, DAG.getVTList(MVT::Other),
                                 Ops, cast<StoreSDNode>(N)->getMemoryVT(),
                                 cast<StoreSDNode>(N)->getMemOperand());
     }
 
+    // STORE Constant:i32<0>  ->  STORE<trunc to i32> Constant:i64<0>
+    // So it can increase the chance of CSE constant construction.
+    EVT VT = N->getOperand(1).getValueType();
+    if (Subtarget.isPPC64() && !DCI.isBeforeLegalize() &&
+        isa<ConstantSDNode>(N->getOperand(1)) && VT == MVT::i32) {
+      SDValue Const64 = DAG.getConstant(N->getConstantOperandVal(1), dl,
+                                        MVT::i64);
+      DAG.UpdateNodeOperands(N, N->getOperand(0), Const64, N->getOperand(2),
+                             N->getOperand(3));
+      cast<StoreSDNode>(N)->setTruncatingStore(true);
+      return SDValue(N, 0);
+    }
+
     // For little endian, VSX stores require generating xxswapd/lxvd2x.
     // Not needed on ISA 3.0 based CPUs since we have a non-permuting store.
-    EVT VT = N->getOperand(1).getValueType();
     if (VT.isSimple()) {
       MVT StoreVT = VT.getSimpleVT();
       if (Subtarget.needsSwapsForVSXMemOps() &&
           (StoreVT == MVT::v2f64 || StoreVT == MVT::v2i64 ||
            StoreVT == MVT::v4f32 || StoreVT == MVT::v4i32))
         return expandVSXStoreForLE(N, DCI);
     }
     break;

test/CodeGen/PowerPC/store-constant.ll

+; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -verify-machineinstrs | FileCheck %s
+
+; Test the same constant can be used by different stores.
+
+%struct.S = type { i64, i8, i16, i32 }
+
+define void @foo(%struct.S* %p) {
+  %l4 = bitcast %struct.S* %p to i64*
+  store i64 0, i64* %l4, align 8
+  %c = getelementptr %struct.S, %struct.S* %p, i64 0, i32 1
+  store i8 0, i8* %c, align 8
+  %s = getelementptr %struct.S, %struct.S* %p, i64 0, i32 2
+  store i16 0, i16* %s, align 2
+  %i = getelementptr %struct.S, %struct.S* %p, i64 0, i32 3
+  store i32 0, i32* %i, align 4
+  ret void
+
+; CHECK-LABEL: @foo
+; CHECK:       li 4, 0
+; CHECK:       stb 4, 8(3)
+; CHECK:       std 4, 0(3)
+; CHECK:       sth 4, 10(3)
+; CHECK:       stw 4, 12(3)
+}
+
+define void @bar(%struct.S* %p) {
+  %i = getelementptr %struct.S, %struct.S* %p, i64 0, i32 3
+  store i32 2, i32* %i, align 4
+  %s = getelementptr %struct.S, %struct.S* %p, i64 0, i32 2
+  store i16 2, i16* %s, align 2
+  %c = getelementptr %struct.S, %struct.S* %p, i64 0, i32 1
+  store i8 2, i8* %c, align 8
+  %l4 = bitcast %struct.S* %p to i64*
+  store i64 2, i64* %l4, align 8
+  ret void
+
+; CHECK-LABEL: @bar
+; CHECK:       li 4, 2
+; CHECK:       stw 4, 12(3)
+; CHECK:       sth 4, 10(3)
+; CHECK:       std 4, 0(3)
+; CHECK:       stb 4, 8(3)
+}
+