[WebAssembly] Fix stack offsets of return values from call lowering.

[jbhateja]

Summary

Fixes PR35220

[alexcrichton]

FWIW I've confirmed that this fixes the issue I was seeing and our entire test suite now passes, thanks again!

llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

if (CLI.IsPostTypeLegalization) {
     // If we are lowering a libcall after legalization, split the return type.
     SmallVector<EVT, 4> OldRetTys = std::move(RetTys);
     SmallVector<uint64_t, 4> OldOffsets = std::move(Offsets);
     for (size_t i = 0, e = OldRetTys.size(); i != e; ++i) {
       EVT RetVT = OldRetTys[i];
       uint64_t Offset = OldOffsets[i];
       MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT);
       unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), RetVT);
-      unsigned RegisterVTSize = RegisterVT.getSizeInBits();
+      unsigned RegisterVTByteSZ = RegisterVT.getSizeInBits() / 8;
       RetTys.append(NumRegs, RegisterVT);
       for (unsigned j = 0; j != NumRegs; ++j)
-        Offsets.push_back(Offset + j * RegisterVTSize);
+        Offsets.push_back(Offset + j * RegisterVTByteSZ);
     }
   }
 
   SmallVector<ISD::OutputArg, 4> Outs;
   GetReturnInfo(CLI.RetTy, getReturnAttrs(CLI), Outs, *this, DL);
 
   bool CanLowerReturn =
       this->CanLowerReturn(CLI.CallConv, CLI.DAG.getMachineFunction(),

llvm/trunk/test/CodeGen/WebAssembly/umulo-i64.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 ; Test that UMULO works correctly on 64-bit operands.
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
-target triple = "wasm32-unknown-emscripten"
+target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: _ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE:
 ; CHECK:     __multi3
 ; Function Attrs: inlinehint
 define void @"_ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE"(i64, i64) unnamed_addr #0 {
 start:
   %2 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %0, i64 %1)
   %3 = extractvalue { i64, i1 } %2, 0
   store i64 %3, i64* undef
   unreachable
 }
 
 ; Function Attrs: nounwind readnone speculatable
 declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #1
 
 attributes #0 = { inlinehint }
 attributes #1 = { nounwind readnone speculatable }
+
+; CHECK-LABEL: wut:
+; CHECK: call     __multi3@FUNCTION, $2, $0, $pop0, $1, $pop10
+; CHECK: i64.load $0=, 8($2)
+define i1 @wut(i64, i64) {
+start:
+  %2 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %0, i64 %1)
+  %3 = extractvalue { i64, i1 } %2, 1
+  ret i1 %3
+}
+