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Differential D39547

[AVX512] Adding support for load truncate store of I1
ClosedPublic

Authored by m_zuckerman on Nov 2 2017, 6:24 AM.

Details

Reviewers
guyblank
zvi
igorb
ayman
gadi.haber
eladcohen
Commits
rG19fd217eaa74: [AVX512] Adding support for load truncate store of I1
rL320691: [AVX512] Adding support for load truncate store of I1
Summary

store operation on a truncated memory (load) of vXi1 is poorly supported by LLVM and most of the time end with an assertion.
This patch fixes this issue.

Diff Detail

Repository
rL LLVM

Event Timeline

m_zuckerman created this revision.Nov 2 2017, 6:24 AM
m_zuckerman updated this revision to Diff 121299.Nov 2 2017, 7:26 AM
m_zuckerman updated this revision to Diff 121326.Nov 2 2017, 8:56 AM
m_zuckerman updated this revision to Diff 121380.Nov 2 2017, 2:26 PM
igorb added inline comments.Nov 8 2017, 5:52 AM
lib/Target/X86/X86ISelLowering.cpp
1228 ↗(On Diff #121380)

could you please explain why you set custom in case DQI & AVX512 & VL & BWI and not for AVX512

test/CodeGen/X86/avx512-load-trunc-store-i1.ll
4 ↗(On Diff #121380)

Is it possible to create tests that test SELECT only

m_zuckerman updated this revision to Diff 126687.Dec 13 2017, 1:35 AM
m_zuckerman updated this revision to Diff 126711.Dec 13 2017, 3:19 AM
igorb accepted this revision.Dec 13 2017, 4:36 AM

LGTM

This revision is now accepted and ready to land.Dec 13 2017, 4:36 AM
Closed by commit rL320691: [AVX512] Adding support for load truncate store of I1 (authored by mzuckerm). · Explain WhyDec 14 2017, 3:56 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
X86/
3 lines
test/
CodeGen/
X86/
151 lines

Diff 126928

llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 1,216 Lines • ▼ Show 20 Lines if (!Subtarget.useSoftFloat() && Subtarget.hasAVX512()) {
} else { } else {
for (auto VT : {MVT::v4i32, MVT::v8i32, MVT::v2i64, MVT::v4i64, for (auto VT : {MVT::v4i32, MVT::v8i32, MVT::v2i64, MVT::v4i64,
MVT::v4f32, MVT::v8f32, MVT::v2f64, MVT::v4f64}) { MVT::v4f32, MVT::v8f32, MVT::v2f64, MVT::v4f64}) {
setOperationAction(ISD::MLOAD, VT, Custom); setOperationAction(ISD::MLOAD, VT, Custom);
setOperationAction(ISD::MSTORE, VT, Custom); setOperationAction(ISD::MSTORE, VT, Custom);
} }
} }
if (Subtarget.hasAVX512())
setOperationAction(ISD::SELECT, MVT::v1i1, Custom);
if (Subtarget.hasDQI()) { if (Subtarget.hasDQI()) {
for (auto VT : { MVT::v2i64, MVT::v4i64, MVT::v8i64 }) { for (auto VT : { MVT::v2i64, MVT::v4i64, MVT::v8i64 }) {
setOperationAction(ISD::SINT_TO_FP, VT, Legal); setOperationAction(ISD::SINT_TO_FP, VT, Legal);
setOperationAction(ISD::UINT_TO_FP, VT, Legal); setOperationAction(ISD::UINT_TO_FP, VT, Legal);
setOperationAction(ISD::FP_TO_SINT, VT, Legal); setOperationAction(ISD::FP_TO_SINT, VT, Legal);
setOperationAction(ISD::FP_TO_UINT, VT, Legal); setOperationAction(ISD::FP_TO_UINT, VT, Legal);
} }
if (Subtarget.hasVLX()) { if (Subtarget.hasVLX()) {
▲ Show 20 Lines • Show All 37,171 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/avx512-load-trunc-store-i1.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -O2 | FileCheck %s --check-prefix=AVX512-ALL
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O2| FileCheck %s --check-prefix=AVX512-ONLY
define void @load_v1i2_trunc_v1i1_store(<1 x i2>* %a0,<1 x i1>* %a1) {
; AVX512-ALL-LABEL: load_v1i2_trunc_v1i1_store:
; AVX512-ALL: # %bb.0:
; AVX512-ALL-NEXT: movb (%rdi), %al
; AVX512-ALL-NEXT: testb %al, %al
; AVX512-ALL-NEXT: setne %al
; AVX512-ALL-NEXT: kmovd %eax, %k0
; AVX512-ALL-NEXT: kmovb %k0, (%rsi)
; AVX512-ALL-NEXT: retq
;
; AVX512-ONLY-LABEL: load_v1i2_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: movb (%rdi), %al
; AVX512-ONLY-NEXT: testb %al, %al
; AVX512-ONLY-NEXT: setne %al
; AVX512-ONLY-NEXT: movb %al, (%rsi)
; AVX512-ONLY-NEXT: retq
%d0 = load <1 x i2>, <1 x i2>* %a0
%d1 = trunc <1 x i2> %d0 to <1 x i1>
store <1 x i1> %d1, <1 x i1>* %a1
ret void
}
define void @load_v1i3_trunc_v1i1_store(<1 x i3>* %a0,<1 x i1>* %a1) {
; AVX512-ALL-LABEL: load_v1i3_trunc_v1i1_store:
; AVX512-ALL: # %bb.0:
; AVX512-ALL-NEXT: movb (%rdi), %al
; AVX512-ALL-NEXT: testb %al, %al
; AVX512-ALL-NEXT: setne %al
; AVX512-ALL-NEXT: kmovd %eax, %k0
; AVX512-ALL-NEXT: kmovb %k0, (%rsi)
; AVX512-ALL-NEXT: retq
;
; AVX512-ONLY-LABEL: load_v1i3_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: movb (%rdi), %al
; AVX512-ONLY-NEXT: testb %al, %al
; AVX512-ONLY-NEXT: setne %al
; AVX512-ONLY-NEXT: movb %al, (%rsi)
; AVX512-ONLY-NEXT: retq
%d0 = load <1 x i3>, <1 x i3>* %a0
%d1 = trunc <1 x i3> %d0 to <1 x i1>
store <1 x i1> %d1, <1 x i1>* %a1
ret void
}
define void @load_v1i4_trunc_v1i1_store(<1 x i4>* %a0,<1 x i1>* %a1) {
; AVX512-ALL-LABEL: load_v1i4_trunc_v1i1_store:
; AVX512-ALL: # %bb.0:
; AVX512-ALL-NEXT: movb (%rdi), %al
; AVX512-ALL-NEXT: testb %al, %al
; AVX512-ALL-NEXT: setne %al
; AVX512-ALL-NEXT: kmovd %eax, %k0
; AVX512-ALL-NEXT: kmovb %k0, (%rsi)
; AVX512-ALL-NEXT: retq
;
; AVX512-ONLY-LABEL: load_v1i4_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: movb (%rdi), %al
; AVX512-ONLY-NEXT: testb %al, %al
; AVX512-ONLY-NEXT: setne %al
; AVX512-ONLY-NEXT: movb %al, (%rsi)
; AVX512-ONLY-NEXT: retq
%d0 = load <1 x i4>, <1 x i4>* %a0
%d1 = trunc <1 x i4> %d0 to <1 x i1>
store <1 x i1> %d1, <1 x i1>* %a1
ret void
}
define void @load_v1i8_trunc_v1i1_store(<1 x i8>* %a0,<1 x i1>* %a1) {
; AVX512-ALL-LABEL: load_v1i8_trunc_v1i1_store:
; AVX512-ALL: # %bb.0:
; AVX512-ALL-NEXT: cmpb $0, (%rdi)
; AVX512-ALL-NEXT: setne %al
; AVX512-ALL-NEXT: kmovd %eax, %k0
; AVX512-ALL-NEXT: kmovb %k0, (%rsi)
; AVX512-ALL-NEXT: retq
;
; AVX512-ONLY-LABEL: load_v1i8_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: cmpb $0, (%rdi)
; AVX512-ONLY-NEXT: setne %al
; AVX512-ONLY-NEXT: movb %al, (%rsi)
; AVX512-ONLY-NEXT: retq
%d0 = load <1 x i8>, <1 x i8>* %a0
%d1 = trunc <1 x i8> %d0 to <1 x i1>
store <1 x i1> %d1, <1 x i1>* %a1
ret void
}
define void @load_v1i16_trunc_v1i1_store(<1 x i16>* %a0,<1 x i1>* %a1) {
; AVX512-ALL-LABEL: load_v1i16_trunc_v1i1_store:
; AVX512-ALL: # %bb.0:
; AVX512-ALL-NEXT: cmpb $0, (%rdi)
; AVX512-ALL-NEXT: setne %al
; AVX512-ALL-NEXT: kmovd %eax, %k0
; AVX512-ALL-NEXT: kmovb %k0, (%rsi)
; AVX512-ALL-NEXT: retq
;
; AVX512-ONLY-LABEL: load_v1i16_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: cmpb $0, (%rdi)
; AVX512-ONLY-NEXT: setne %al
; AVX512-ONLY-NEXT: movb %al, (%rsi)
; AVX512-ONLY-NEXT: retq
%d0 = load <1 x i16>, <1 x i16>* %a0
%d1 = trunc <1 x i16> %d0 to <1 x i1>
store <1 x i1> %d1, <1 x i1>* %a1
ret void
}
define void @load_v1i32_trunc_v1i1_store(<1 x i32>* %a0,<1 x i1>* %a1) {
; AVX512-ALL-LABEL: load_v1i32_trunc_v1i1_store:
; AVX512-ALL: # %bb.0:
; AVX512-ALL-NEXT: cmpb $0, (%rdi)
; AVX512-ALL-NEXT: setne %al
; AVX512-ALL-NEXT: kmovd %eax, %k0
; AVX512-ALL-NEXT: kmovb %k0, (%rsi)
; AVX512-ALL-NEXT: retq
;
; AVX512-ONLY-LABEL: load_v1i32_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: cmpb $0, (%rdi)
; AVX512-ONLY-NEXT: setne %al
; AVX512-ONLY-NEXT: movb %al, (%rsi)
; AVX512-ONLY-NEXT: retq
%d0 = load <1 x i32>, <1 x i32>* %a0
%d1 = trunc <1 x i32> %d0 to <1 x i1>
store <1 x i1> %d1, <1 x i1>* %a1
ret void
}
define void @load_v1i64_trunc_v1i1_store(<1 x i64>* %a0,<1 x i1>* %a1) {
; AVX512-ALL-LABEL: load_v1i64_trunc_v1i1_store:
; AVX512-ALL: # %bb.0:
; AVX512-ALL-NEXT: cmpb $0, (%rdi)
; AVX512-ALL-NEXT: setne %al
; AVX512-ALL-NEXT: kmovd %eax, %k0
; AVX512-ALL-NEXT: kmovb %k0, (%rsi)
; AVX512-ALL-NEXT: retq
;
; AVX512-ONLY-LABEL: load_v1i64_trunc_v1i1_store:
; AVX512-ONLY: # %bb.0:
; AVX512-ONLY-NEXT: cmpb $0, (%rdi)
; AVX512-ONLY-NEXT: setne %al
; AVX512-ONLY-NEXT: movb %al, (%rsi)
; AVX512-ONLY-NEXT: retq
%d0 = load <1 x i64>, <1 x i64>* %a0
%d1 = trunc <1 x i64> %d0 to <1 x i1>
store <1 x i1> %d1, <1 x i1>* %a1
ret void
}