[LoopInterchange] Fix phi node ordering miscompile.

[dmgreen]

Summary

It appears that the way that splitInnerLoopHeader splits blocks requires that the induction PHI will be the first PHI in the inner loop header. This makes sure that is actually the case when there are both IV and reduction phis.

[fhahn]

test/Transforms/LoopInterchange/phi-ordering.ll

15

Could you add a few more checks, making sure the loop structure is what we expect?

[dmgreen]

Hello.

Good suggestion, I've updated the test.

test/Transforms/LoopInterchange/phi-ordering.ll

15

This depends on what we expect the loop structure to be :)

I originally had this compiling on thumbv6m, where the interchange here is almost certainly going to end up making things slower. The load/store to c would no longer be able to be pulled out of the inner loop. Hence the weak test check that would work even if the performance model here was fixes, and the interchange no longer done.

I've changed this test to v7a where I think vectorisation will make this interchange profitable, and added the loop structure checks you suggested.

[aemerson]

Can you not pass the -loop-interchange-threshold option to force the cost model to always interchange? If this isn't possible with the current code then it seems like a major oversight.

[fhahn]

LGTM, this is looks like a reasonable fix addressing a FIXME. Please use -loop-interchange-threshold in the test as suggested by @aemerson to ensure the test is always interchanged and hold off committing for a day or so, to give people in other timezones a chance to raise objections.

lib/Transforms/Scalar/LoopInterchange.cpp

1219

It might be helpful to keep a comment documenting the need for the induction phi to be the first PHI node here (without the FIXME of course)

[dmgreen]

I've updated the test to one that will always be profitable to interchange, as the vectoriser can then kick in.

lib/Transforms/Scalar/LoopInterchange.cpp

1219

Good idea.

lib/Transforms/Scalar/LoopInterchange.cpp

if (!InductionPHI) {
       return false;
     }
 
     if (InductionPHI->getIncomingBlock(0) == InnerLoopPreHeader)
       InnerIndexVar = dyn_cast<Instruction>(InductionPHI->getIncomingValue(1));
     else
       InnerIndexVar = dyn_cast<Instruction>(InductionPHI->getIncomingValue(0));
 
+    // Ensure that InductionPHI is the first Phi node as required by
+    // splitInnerLoopHeader
+    if (&InductionPHI->getParent()->front() != InductionPHI)
+      InductionPHI->moveBefore(&InductionPHI->getParent()->front());
+
     //
     // Split at the place were the induction variable is
     // incremented/decremented.
     // TODO: This splitting logic may not work always. Fix this.
     splitInnerLoopLatch(InnerIndexVar);
     DEBUG(dbgs() << "splitInnerLoopLatch done\n");
 
     // Splits the inner loops phi nodes out into a separate basic block.

 
 void LoopInterchangeTransform::splitInnerLoopHeader() {
 
   // Split the inner loop header out. Here make sure that the reduction PHI's
   // stay in the innerloop body.
   BasicBlock *InnerLoopHeader = InnerLoop->getHeader();
   BasicBlock *InnerLoopPreHeader = InnerLoop->getLoopPreheader();
   if (InnerLoopHasReduction) {
-    // FIXME: Check if the induction PHI will always be the first PHI.
     BasicBlock *New = InnerLoopHeader->splitBasicBlock(
         ++(InnerLoopHeader->begin()), InnerLoopHeader->getName() + ".split");
     if (LI)
       if (Loop *L = LI->getLoopFor(InnerLoopHeader))
         L->addBasicBlockToLoop(New, *LI);
 
     // Adjust Reduction PHI's in the block.
     SmallVector<PHINode *, 8> PHIVec;

test/Transforms/LoopInterchange/phi-ordering.ll

+; RUN: opt < %s -loop-interchange -S | FileCheck %s
+;; Checks the order of the inner phi nodes does not cause havoc.
+;; The inner loop has a reduction into c. The IV is not the first phi.
+
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
+target triple = "thumbv7a-none-none-eabi"
+
+@a = hidden global [2 x [3 x i32]] [[3 x i32] [i32 0, i32 1, i32 2], [3 x i32] [i32 3, i32 4, i32 5]], align 4
+@b = hidden global [3 x [4 x i32]] [[4 x i32] [i32 0, i32 1, i32 2, i32 3], [4 x i32] [i32 4, i32 5, i32 6, i32 7], [4 x i32] [i32 8, i32 9, i32 10, i32 11]], align 4
+@c = hidden global [2 x [4 x i32]] zeroinitializer, align 4
+
+define i32 @test() local_unnamed_addr #0 {
+
+entry:
+  br label %for.body
+
+for.body:                                         ; preds = %entry, %for.inc15
+  %i.033 = phi i32 [ 0, %entry ], [ %inc16, %for.inc15 ]
+  br label %for.body3
+
+for.body3:                                        ; preds = %for.body, %for.inc12
+  %j.032 = phi i32 [ 0, %for.body ], [ %inc13, %for.inc12 ]
+  %arrayidx11 = getelementptr inbounds [2 x [4 x i32]], [2 x [4 x i32]]* @c, i32 0, i32 %i.033, i32 %j.032
+  %arrayidx11.promoted = load i32, i32* %arrayidx11, align 4
+  br label %for.body6
+
+for.body6:                                        ; preds = %for.body3, %for.body6
+  %0 = phi i32 [ %arrayidx11.promoted, %for.body3 ], [ %add, %for.body6 ]
+  %k.031 = phi i32 [ 0, %for.body3 ], [ %inc, %for.body6 ]
+  %arrayidx7 = getelementptr inbounds [2 x [3 x i32]], [2 x [3 x i32]]* @a, i32 0, i32 %i.033, i32 %k.031
+  %1 = load i32, i32* %arrayidx7, align 4
+  %arrayidx9 = getelementptr inbounds [3 x [4 x i32]], [3 x [4 x i32]]* @b, i32 0, i32 %k.031, i32 %j.032
+  %2 = load i32, i32* %arrayidx9, align 4
+  %mul = mul nsw i32 %2, %1
+  %add = add nsw i32 %0, %mul
+  %inc = add nsw i32 %k.031, 1
+  %cmp5 = icmp slt i32 %k.031, 2
+  br i1 %cmp5, label %for.body6, label %for.inc12
+
+for.inc12:                                        ; preds = %for.body6
+  %add.lcssa = phi i32 [ %add, %for.body6 ]
+  store i32 %add.lcssa, i32* %arrayidx11, align 4
+  %inc13 = add nsw i32 %j.032, 1
+  %cmp2 = icmp slt i32 %j.032, 3
+  br i1 %cmp2, label %for.body3, label %for.inc15
+
+for.inc15:                                        ; preds = %for.inc12
+  %inc16 = add nsw i32 %i.033, 1
+  %cmp = icmp slt i32 %i.033, 1
+  br i1 %cmp, label %for.body, label %for.end17
+
+for.end17:                                        ; preds = %for.inc15
+  ret i32 0
+}
+
+; CHECK-LABEL: test
+; CHECK: entry:
+; CHECK:   br label %for.body6.preheader
+; CHECK: for.body.preheader:
+; CHECK:   br label %for.body
+; CHECK: for.body:
+; CHECK:   br label %for.body3.preheader
+; CHECK: for.body3.preheader:
+; CHECK:   br label %for.body3
+; CHECK: for.body3:
+; CHECK:   br label %for.body6.split1
+; CHECK: for.body6.preheader:
+; CHECK:   br label %for.body6
+; CHECK: for.body6:
+; CHECK:   br label %for.body.preheader
+; CHECK: for.body6.split1:
+; CHECK:   br label %for.inc12
+; CHECK: for.body6.split:
+; CHECK:   add nsw i32 %k.031, 1
+; CHECK:   br i1 %cmp5, label %for.body6, label %for.end17
+; CHECK: for.inc12:
+; CHECK:   br i1 %cmp2, label %for.body3, label %for.inc15
+; CHECK: for.inc15:
+; CHECK:   br i1 %cmp, label %for.body, label %for.body6.split
+; CHECK: for.end17:
+