This is an archive of the discontinued LLVM Phabricator instance.

[x86] Flesh out the custom ISel for RMW aritmetic ops with used flags to cover the bitwise operators.
ClosedPublic

Authored by chandlerc on Aug 25 2017, 5:55 AM.

Details

Summary

Nothing really exciting here, this just stamps out the rest of the core
operations that can RMW memory and set flags.

Still not implemented here: ADC, SBB. Those will require more
interesting logic to channel the flags *in*.

Depends on D37139.

Diff Detail

Repository
rL LLVM

Event Timeline

chandlerc created this revision.Aug 25 2017, 5:55 AM
craig.topper accepted this revision.Sep 7 2017, 10:00 AM

This needs to be rebased, but the changes LGTM

This revision is now accepted and ready to land.Sep 7 2017, 10:00 AM
This revision was automatically updated to reflect the committed changes.