DAG: Allow creating extract_vector_elt post-legalize

[arsenm]

Summary

Fixes some combine issues for AMDGPU where we weren't
getting the many extract_vector_elt combines expected
in a future patch.

This should really be checking isOperationLegalOrCustom on
the extract. That improves a number of x86 lit tests, but
a few get stuck in an infinite loop from one place
where a similar looking extract is created. I have a
different workaround in the backend for that which
keeps many of those improvements, but also adds a few
regressions.

[RKSimon]

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

13886

I wonder if it'd be safe to test for TLI.isOperationLegalOrCustom(ISD::EXTRACT_VECTOR_ELT, VT) if the extract is from the same vector type and the same index (constant or variable) as the original? Would that cover the cases you have?

[arsenm]

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

13886

It would cover my cases, but I still see the x86 infinite loop problems.

The specific x86 issue is X86ISelLowering.cpp:14284 where it recreates another extract

[arsenm]

ping

[arsenm]

ping

[RKSimon]

LGTM (sorry was on holiday). I'll try to investigate the x86 infinite loop issue at some point soon.

[arsenm]

r312730

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

       }
 
       return InOp;
     }
 
     // FIXME: We should handle recursing on other vector shuffles and
     // scalar_to_vector here as well.
 
-    if (!LegalOperations) {
+    if (!LegalOperations ||
+        // FIXME: Should really be just isOperationLegalOrCustom.
+        TLI.isOperationLegal(ISD::EXTRACT_VECTOR_ELT, VT) ||
+        TLI.isOperationExpand(ISD::VECTOR_SHUFFLE, VT)) {
       EVT IndexTy = TLI.getVectorIdxTy(DAG.getDataLayout());
       return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N), NVT, SVInVec,
                          DAG.getConstant(OrigElt, SDLoc(SVOp), IndexTy));
     }
   }
 
   bool BCNumEltsChanged = false;
   EVT ExtVT = VT.getVectorElementType();