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Differential D34807

[Clang][X86][Goldmont] Adding new target-cpu: Goldmont
ClosedPublic

Authored by m_zuckerman on Jun 29 2017, 1:03 AM.

Details

Reviewers
igorb
delena
zvi
craig.topper
Commits
rGa046ef4c2610: [Clang][X86][Goldmont]Adding new target-cpu: Goldmont
rC306673: [Clang][X86][Goldmont]Adding new target-cpu: Goldmont
rL306673: [Clang][X86][Goldmont]Adding new target-cpu: Goldmont
Summary

Connecting the GoldMont processor to his feature.

Diff Detail

Event Timeline

m_zuckerman created this revision.Jun 29 2017, 1:03 AM
igorb added inline comments.Jun 29 2017, 1:27 AM
test/Preprocessor/predefined-arch-macros.c
990

please check all feature , for example AES, PCLMUL, ...

m_zuckerman updated this revision to Diff 104613.Jun 29 2017, 3:07 AM

Remove extra feature -fsgsbase

m_zuckerman marked an inline comment as done.Jun 29 2017, 3:08 AM
m_zuckerman updated this revision to Diff 104629.Jun 29 2017, 6:04 AM
Herald added a subscriber: krytarowski. · View Herald TranscriptJun 29 2017, 6:05 AM
igorb accepted this revision.Jun 29 2017, 6:19 AM

LGTM

This revision is now accepted and ready to land.Jun 29 2017, 6:19 AM
Closed by commit rL306673: [Clang][X86][Goldmont]Adding new target-cpu: Goldmont (authored by mzuckerm). · Explain WhyJun 29 2017, 6:41 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Basic/
22 lines
test/
Preprocessor/
47 lines

Diff 104603

lib/Basic/Targets.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 2,716 Lines • ▼ Show 20 Lines enum CPUKind {
CK_Penryn, CK_Penryn,
//@} //@}
/// \name Atom /// \name Atom
/// Atom processors /// Atom processors
//@{ //@{
CK_Bonnell, CK_Bonnell,
CK_Silvermont, CK_Silvermont,
CK_Goldmont,
//@} //@}
/// \name Nehalem /// \name Nehalem
/// Nehalem microarchitecture based processors. /// Nehalem microarchitecture based processors.
CK_Nehalem, CK_Nehalem,
/// \name Westmere /// \name Westmere
/// Westmere microarchitecture based processors. /// Westmere microarchitecture based processors.
▲ Show 20 Lines • Show All 125 Lines • ▼ Show 20 Lines return llvm::StringSwitch<CPUKind>(CPU)
.Case("prescott", CK_Prescott) .Case("prescott", CK_Prescott)
.Case("nocona", CK_Nocona) .Case("nocona", CK_Nocona)
.Case("core2", CK_Core2) .Case("core2", CK_Core2)
.Case("penryn", CK_Penryn) .Case("penryn", CK_Penryn)
.Case("bonnell", CK_Bonnell) .Case("bonnell", CK_Bonnell)
.Case("atom", CK_Bonnell) // Legacy name. .Case("atom", CK_Bonnell) // Legacy name.
.Case("silvermont", CK_Silvermont) .Case("silvermont", CK_Silvermont)
.Case("slm", CK_Silvermont) // Legacy name. .Case("slm", CK_Silvermont) // Legacy name.
.Case("goldmont", CK_Goldmont)
.Case("nehalem", CK_Nehalem) .Case("nehalem", CK_Nehalem)
.Case("corei7", CK_Nehalem) // Legacy name. .Case("corei7", CK_Nehalem) // Legacy name.
.Case("westmere", CK_Westmere) .Case("westmere", CK_Westmere)
.Case("sandybridge", CK_SandyBridge) .Case("sandybridge", CK_SandyBridge)
.Case("corei7-avx", CK_SandyBridge) // Legacy name. .Case("corei7-avx", CK_SandyBridge) // Legacy name.
.Case("ivybridge", CK_IvyBridge) .Case("ivybridge", CK_IvyBridge)
.Case("core-avx-i", CK_IvyBridge) // Legacy name. .Case("core-avx-i", CK_IvyBridge) // Legacy name.
.Case("haswell", CK_Haswell) .Case("haswell", CK_Haswell)
▲ Show 20 Lines • Show All 199 Lines • ▼ Show 20 Lines case CK_Geode:
return false; return false;
// Fallthrough // Fallthrough
case CK_Nocona: case CK_Nocona:
case CK_Core2: case CK_Core2:
case CK_Penryn: case CK_Penryn:
case CK_Bonnell: case CK_Bonnell:
case CK_Silvermont: case CK_Silvermont:
case CK_Goldmont:
case CK_Nehalem: case CK_Nehalem:
case CK_Westmere: case CK_Westmere:
case CK_SandyBridge: case CK_SandyBridge:
case CK_IvyBridge: case CK_IvyBridge:
case CK_Haswell: case CK_Haswell:
case CK_Broadwell: case CK_Broadwell:
case CK_SkylakeClient: case CK_SkylakeClient:
case CK_SkylakeServer: case CK_SkylakeServer:
▲ Show 20 Lines • Show All 176 Lines • ▼ Show 20 Lines case CK_Silvermont:
setFeatureEnabledImpl(Features, "aes", true); setFeatureEnabledImpl(Features, "aes", true);
setFeatureEnabledImpl(Features, "pclmul", true); setFeatureEnabledImpl(Features, "pclmul", true);
LLVM_FALLTHROUGH; LLVM_FALLTHROUGH;
case CK_Nehalem: case CK_Nehalem:
setFeatureEnabledImpl(Features, "sse4.2", true); setFeatureEnabledImpl(Features, "sse4.2", true);
setFeatureEnabledImpl(Features, "fxsr", true); setFeatureEnabledImpl(Features, "fxsr", true);
setFeatureEnabledImpl(Features, "cx16", true); setFeatureEnabledImpl(Features, "cx16", true);
break; break;
case CK_Goldmont:
setFeatureEnabledImpl(Features, "sha", true);
setFeatureEnabledImpl(Features, "rdseed", true);
setFeatureEnabledImpl(Features, "xsave", true);
setFeatureEnabledImpl(Features, "xsaveopt", true);
setFeatureEnabledImpl(Features, "xsavec", true);
setFeatureEnabledImpl(Features, "xsaves", true);
setFeatureEnabledImpl(Features, "clflushopt", true);
setFeatureEnabledImpl(Features, "mpx", true);
setFeatureEnabledImpl(Features, "aes", true);
setFeatureEnabledImpl(Features, "pclmul", true);
setFeatureEnabledImpl(Features, "sse4.2", true);
setFeatureEnabledImpl(Features, "fxsr", true);
setFeatureEnabledImpl(Features, "cx16", true);
setFeatureEnabledImpl(Features, "fsgsbase", true);
break;
case CK_KNL: case CK_KNL:
setFeatureEnabledImpl(Features, "avx512f", true); setFeatureEnabledImpl(Features, "avx512f", true);
setFeatureEnabledImpl(Features, "avx512cd", true); setFeatureEnabledImpl(Features, "avx512cd", true);
setFeatureEnabledImpl(Features, "avx512er", true); setFeatureEnabledImpl(Features, "avx512er", true);
setFeatureEnabledImpl(Features, "avx512pf", true); setFeatureEnabledImpl(Features, "avx512pf", true);
setFeatureEnabledImpl(Features, "prefetchwt1", true); setFeatureEnabledImpl(Features, "prefetchwt1", true);
setFeatureEnabledImpl(Features, "fxsr", true); setFeatureEnabledImpl(Features, "fxsr", true);
setFeatureEnabledImpl(Features, "rdseed", true); setFeatureEnabledImpl(Features, "rdseed", true);
▲ Show 20 Lines • Show All 592 Lines • ▼ Show 20 Lines case CK_Penryn:
defineCPUMacros(Builder, "core2"); defineCPUMacros(Builder, "core2");
break; break;
case CK_Bonnell: case CK_Bonnell:
defineCPUMacros(Builder, "atom"); defineCPUMacros(Builder, "atom");
break; break;
case CK_Silvermont: case CK_Silvermont:
defineCPUMacros(Builder, "slm"); defineCPUMacros(Builder, "slm");
break; break;
case CK_Goldmont:
defineCPUMacros(Builder, "goldmont");
break;
case CK_Nehalem: case CK_Nehalem:
case CK_Westmere: case CK_Westmere:
case CK_SandyBridge: case CK_SandyBridge:
case CK_IvyBridge: case CK_IvyBridge:
case CK_Haswell: case CK_Haswell:
case CK_Broadwell: case CK_Broadwell:
case CK_SkylakeClient: case CK_SkylakeClient:
// FIXME: Historically, we defined this legacy name, it would be nice to // FIXME: Historically, we defined this legacy name, it would be nice to
▲ Show 20 Lines • Show All 5,838 Lines • Show Last 20 Lines

test/Preprocessor/predefined-arch-macros.c

Show First 20 Lines • Show All 980 Lines • ▼ Show 20 Lines
// CHECK_ATOM_M64: #define __amd64 1 // CHECK_ATOM_M64: #define __amd64 1
// CHECK_ATOM_M64: #define __amd64__ 1 // CHECK_ATOM_M64: #define __amd64__ 1
// CHECK_ATOM_M64: #define __atom 1 // CHECK_ATOM_M64: #define __atom 1
// CHECK_ATOM_M64: #define __atom__ 1 // CHECK_ATOM_M64: #define __atom__ 1
// CHECK_ATOM_M64: #define __tune_atom__ 1 // CHECK_ATOM_M64: #define __tune_atom__ 1
// CHECK_ATOM_M64: #define __x86_64 1 // CHECK_ATOM_M64: #define __x86_64 1
// CHECK_ATOM_M64: #define __x86_64__ 1 // CHECK_ATOM_M64: #define __x86_64__ 1
// //
// RUN: %clang -march=goldmont -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
igorbUnsubmitted
Done
ReplyInline Actions

please check all feature , for example AES, PCLMUL, ...

igorb: please check all feature , for example AES, PCLMUL, ...
// RUN: | FileCheck %s -check-prefix=CHECK_GLM_M32
// CHECK_GLM_M32: #define __FSGSBASE__ 1
// CHECK_GLM_M32: #define __MMX__ 1
// CHECK_GLM_M32: #define __RDSEED__ 1
// CHECK_GLM_M32: #define __SHA__ 1
// CHECK_GLM_M32: #define __SSE2__ 1
// CHECK_GLM_M32: #define __SSE3__ 1
// CHECK_GLM_M32: #define __SSE4_1__ 1
// CHECK_GLM_M32: #define __SSE4_2__ 1
// CHECK_GLM_M32: #define __SSE__ 1
// CHECK_GLM_M32: #define __SSSE3__ 1
// CHECK_GLM_M32: #define __XSAVEC__ 1
// CHECK_GLM_M32: #define __XSAVEOPT__ 1
// CHECK_GLM_M32: #define __XSAVES__ 1
// CHECK_GLM_M32: #define __XSAVE__ 1
// CHECK_GLM_M32: #define __goldmont 1
// CHECK_GLM_M32: #define __goldmont__ 1
// CHECK_GLM_M32: #define __i386 1
// CHECK_GLM_M32: #define __i386__ 1
// CHECK_GLM_M32: #define __tune_goldmont__ 1
// CHECK_GLM_M32: #define i386 1
//
// RUN: %clang -march=goldmont -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
// RUN: | FileCheck %s -check-prefix=CHECK_GLM_M64
// CHECK_GLM_M64: #define __FSGSBASE__ 1
// CHECK_GLM_M64: #define __MMX__ 1
// CHECK_GLM_M64: #define __RDSEED__ 1
// CHECK_GLM_M64: #define __SHA__ 1
// CHECK_GLM_M64: #define __SSE2__ 1
// CHECK_GLM_M64: #define __SSE3__ 1
// CHECK_GLM_M64: #define __SSE4_1__ 1
// CHECK_GLM_M64: #define __SSE4_2__ 1
// CHECK_GLM_M64: #define __SSE__ 1
// CHECK_GLM_M64: #define __SSSE3__ 1
// CHECK_GLM_M64: #define __XSAVEC__ 1
// CHECK_GLM_M64: #define __XSAVEOPT__ 1
// CHECK_GLM_M64: #define __XSAVES__ 1
// CHECK_GLM_M64: #define __XSAVE__ 1
// CHECK_GLM_M64: #define __goldmont 1
// CHECK_GLM_M64: #define __goldmont__ 1
// CHECK_GLM_M64: #define __tune_goldmont__ 1
// CHECK_GLM_M64: #define __x86_64 1
// CHECK_GLM_M64: #define __x86_64__ 1
//
// RUN: %clang -march=slm -m32 -E -dM %s -o - 2>&1 \ // RUN: %clang -march=slm -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \ // RUN: -target i386-unknown-linux \
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SLM_M32 // RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_SLM_M32
// CHECK_SLM_M32: #define __MMX__ 1 // CHECK_SLM_M32: #define __MMX__ 1
// CHECK_SLM_M32: #define __SSE2__ 1 // CHECK_SLM_M32: #define __SSE2__ 1
// CHECK_SLM_M32: #define __SSE3__ 1 // CHECK_SLM_M32: #define __SSE3__ 1
// CHECK_SLM_M32: #define __SSE4_1__ 1 // CHECK_SLM_M32: #define __SSE4_1__ 1
// CHECK_SLM_M32: #define __SSE4_2__ 1 // CHECK_SLM_M32: #define __SSE4_2__ 1
▲ Show 20 Lines • Show All 1,202 Lines • Show Last 20 Lines