[X86] Adding tests for the memory folding tables generated by the TableGen backend.

[aymanmus]

Summary

utils/TableGen/X86FoldTablesEmitter.cpp backend generates the memory folding tables for the X86 target, these tests check each entry of the currently generated tables.
The tests run the greedy register allocator while "mocking" register pressure by adding an inline assembly with defs/uses of the registers.

[craig.topper]

I don't know a much about mir tests. @RKSimon or @zvi do these tests ok with you?

[zvi]

Please update this patch to address the issues fixed in r304163

[aymanmus]

Removing XCHG tests

[RKSimon]

test/CodeGen/X86/memoryFolding-avx512Other.mir

4

Split these more by target type, don't just dump them all them all together.

test/CodeGen/X86/memoryFolding-other.mir

4

Probably best to split these at least into targets with unusual/larger numbers of intrinsics: 3dnow, adx, bmi, bmi2, f16c, fma, fma4, mmx, mpx, sha, tbm, xop

test/CodeGen/X86/memoryFolding-x86.mir

5

Why are you testing with avx512+ enabled?

[zvi]

In D32685#767478, @aymanmus wrote:

Removing XCHG tests

Do we really want them removed or make them negative tests?

[igorb]

test/CodeGen/X86/memoryFolding-avx512Other.mir

1

could you please add -verify-machineinstrs

[aymanmus]

rL304088 was reverted.

test/CodeGen/X86/memoryFolding-avx512Other.mir

+# RUN: llc -run-pass greedy -stack-alignment=64 -o - %s | FileCheck %s
+# Stack alignment set to 64 to enable folding of aligned mov instructions.
+--- |
+  attributes #0 = { "target-features" = "+avx512f,+avx512bw,+avx512dq,+avx512vbmi,+avx512er,+avx512cd,+avx512pf,+avx512vl,+avx512ifma" }
+  define void @stack_fold_vextractf32x8zmr_vextractf32x8zrr_test() #0 { ret void }
+  define void @stack_fold_vextractf64x2z256mr_vextractf64x2z256rr_test() #0 { ret void }
+  define void @stack_fold_vextractf64x2zmr_vextractf64x2zrr_test() #0 { ret void }
+  define void @stack_fold_vextracti32x8zmr_vextracti32x8zrr_test() #0 { ret void }
+  define void @stack_fold_vextracti64x2z256mr_vextracti64x2z256rr_test() #0 { ret void }
+  define void @stack_fold_vextracti64x2zmr_vextracti64x2zrr_test() #0 { ret void }
+  define void @stack_fold_vmovdqu16z128mr_vmovdqu16z128rr_test() #0 { ret void }
+  define void @stack_fold_vmovdqu16z256mr_vmovdqu16z256rr_test() #0 { ret void }
+  define void @stack_fold_vmovdqu16zmr_vmovdqu16zrr_test() #0 { ret void }
+  define void @stack_fold_vmovdqu8z128mr_vmovdqu8z128rr_test() #0 { ret void }
+  define void @stack_fold_vmovdqu8z256mr_vmovdqu8z256rr_test() #0 { ret void }
+  define void @stack_fold_vmovdqu8zmr_vmovdqu8zrr_test() #0 { ret void }
+  define void @stack_fold_vpextrbzmr_vpextrbzrr_test() #0 { ret void }
+  define void @stack_fold_vpextrdzmr_vpextrdzrr_test() #0 { ret void }
+  define void @stack_fold_vpextrqzmr_vpextrqzrr_test() #0 { ret void }
+  define void @stack_fold_vpextrwzmr_vpextrwzrr_test() #0 { ret void }
+  define void @stack_fold_vpmovswbz128mr_vpmovswbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmovswbz256mr_vpmovswbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmovswbzmr_vpmovswbzrr_test() #0 { ret void }
+  define void @stack_fold_vpmovuswbz128mr_vpmovuswbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmovuswbz256mr_vpmovuswbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmovuswbzmr_vpmovuswbzrr_test() #0 { ret void }
+  define void @stack_fold_vpmovwbz128mr_vpmovwbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmovwbz256mr_vpmovwbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmovwbzmr_vpmovwbzrr_test() #0 { ret void }
+  define void @stack_fold_kmovbkm_kmovbkk_test() #0 { ret void }
+  define void @stack_fold_kmovdkm_kmovdkk_test() #0 { ret void }
+  define void @stack_fold_kmovqkm_kmovqkk_test() #0 { ret void }
+  define void @stack_fold_vbroadcastf32x2z256m_vbroadcastf32x2z256r_test() #0 { ret void }
+  define void @stack_fold_vbroadcastf32x2zm_vbroadcastf32x2zr_test() #0 { ret void }
+  define void @stack_fold_vbroadcasti32x2z128m_vbroadcasti32x2z128r_test() #0 { ret void }
+  define void @stack_fold_vbroadcasti32x2z256m_vbroadcasti32x2z256r_test() #0 { ret void }
+  define void @stack_fold_vbroadcasti32x2zm_vbroadcasti32x2zr_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2qqz128rm_vcvtpd2qqz128rr_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2qqz256rm_vcvtpd2qqz256rr_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2qqzrm_vcvtpd2qqzrr_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2uqqz128rm_vcvtpd2uqqz128rr_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2uqqz256rm_vcvtpd2uqqz256rr_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2uqqzrm_vcvtpd2uqqzrr_test() #0 { ret void }
+  define void @stack_fold_vcvtps2qqz128rm_vcvtps2qqz128rr_test() #0 { ret void }
+  define void @stack_fold_vcvtps2qqz256rm_vcvtps2qqz256rr_test() #0 { ret void }
+  define void @stack_fold_vcvtps2qqzrm_vcvtps2qqzrr_test() #0 { ret void }
+  define void @stack_fold_vcvtps2uqqz128rm_vcvtps2uqqz128rr_test() #0 { ret void }
+  define void @stack_fold_vcvtps2uqqz256rm_vcvtps2uqqz256rr_test() #0 { ret void }
+  define void @stack_fold_vcvtps2uqqzrm_vcvtps2uqqzrr_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2pdz128rm_vcvtqq2pdz128rr_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2pdz256rm_vcvtqq2pdz256rr_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2pdzrm_vcvtqq2pdzrr_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2psz128rm_vcvtqq2psz128rr_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2psz256rm_vcvtqq2psz256rr_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2pszrm_vcvtqq2pszrr_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2qqz128rm_vcvttpd2qqz128rr_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2qqz256rm_vcvttpd2qqz256rr_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2qqzrm_vcvttpd2qqzrr_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2qqzrmb_vcvttpd2qqzrrb_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2uqqz128rm_vcvttpd2uqqz128rr_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2uqqz256rm_vcvttpd2uqqz256rr_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2uqqzrm_vcvttpd2uqqzrr_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2uqqzrmb_vcvttpd2uqqzrrb_test() #0 { ret void }
+  define void @stack_fold_vcvttps2qqz128rm_vcvttps2qqz128rr_test() #0 { ret void }
+  define void @stack_fold_vcvttps2qqz256rm_vcvttps2qqz256rr_test() #0 { ret void }
+  define void @stack_fold_vcvttps2qqzrm_vcvttps2qqzrr_test() #0 { ret void }
+  define void @stack_fold_vcvttps2qqzrmb_vcvttps2qqzrrb_test() #0 { ret void }
+  define void @stack_fold_vcvttps2uqqz128rm_vcvttps2uqqz128rr_test() #0 { ret void }
+  define void @stack_fold_vcvttps2uqqz256rm_vcvttps2uqqz256rr_test() #0 { ret void }
+  define void @stack_fold_vcvttps2uqqzrm_vcvttps2uqqzrr_test() #0 { ret void }
+  define void @stack_fold_vcvttps2uqqzrmb_vcvttps2uqqzrrb_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2pdz128rm_vcvtuqq2pdz128rr_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2pdz256rm_vcvtuqq2pdz256rr_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2pdzrm_vcvtuqq2pdzrr_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2psz128rm_vcvtuqq2psz128rr_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2psz256rm_vcvtuqq2psz256rr_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2pszrm_vcvtuqq2pszrr_test() #0 { ret void }
+  define void @stack_fold_vexp2pdm_vexp2pdr_test() #0 { ret void }
+  define void @stack_fold_vexp2pdmb_vexp2pdrb_test() #0 { ret void }
+  define void @stack_fold_vexp2psm_vexp2psr_test() #0 { ret void }
+  define void @stack_fold_vexp2psmb_vexp2psrb_test() #0 { ret void }
+  define void @stack_fold_vfpclasspdz128rm_vfpclasspdz128rr_test() #0 { ret void }
+  define void @stack_fold_vfpclasspdz256rm_vfpclasspdz256rr_test() #0 { ret void }
+  define void @stack_fold_vfpclasspdzrm_vfpclasspdzrr_test() #0 { ret void }
+  define void @stack_fold_vfpclasspsz128rm_vfpclasspsz128rr_test() #0 { ret void }
+  define void @stack_fold_vfpclasspsz256rm_vfpclasspsz256rr_test() #0 { ret void }
+  define void @stack_fold_vfpclasspszrm_vfpclasspszrr_test() #0 { ret void }
+  define void @stack_fold_vfpclasssdrm_vfpclasssdrr_test() #0 { ret void }
+  define void @stack_fold_vfpclassssrm_vfpclassssrr_test() #0 { ret void }
+  define void @stack_fold_vmovdqu16z128rm_vmovdqu16z128rr_test() #0 { ret void }
+  define void @stack_fold_vmovdqu16z256rm_vmovdqu16z256rr_test() #0 { ret void }
+  define void @stack_fold_vmovdqu16zrm_vmovdqu16zrr_test() #0 { ret void }
+  define void @stack_fold_vmovdqu8z128rm_vmovdqu8z128rr_test() #0 { ret void }
+  define void @stack_fold_vmovdqu8z256rm_vmovdqu8z256rr_test() #0 { ret void }
+  define void @stack_fold_vmovdqu8zrm_vmovdqu8zrr_test() #0 { ret void }
+  define void @stack_fold_vpabsbz128rm_vpabsbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpabsbz256rm_vpabsbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpabsbzrm_vpabsbzrr_test() #0 { ret void }
+  define void @stack_fold_vpabswz128rm_vpabswz128rr_test() #0 { ret void }
+  define void @stack_fold_vpabswz256rm_vpabswz256rr_test() #0 { ret void }
+  define void @stack_fold_vpabswzrm_vpabswzrr_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastbz128m_vpbroadcastbz128r_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastbz256m_vpbroadcastbz256r_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastbzm_vpbroadcastbzr_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastwz128m_vpbroadcastwz128r_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastwz256m_vpbroadcastwz256r_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastwzm_vpbroadcastwzr_test() #0 { ret void }
+  define void @stack_fold_vpconflictdz128rm_vpconflictdz128rr_test() #0 { ret void }
+  define void @stack_fold_vpconflictdz256rm_vpconflictdz256rr_test() #0 { ret void }
+  define void @stack_fold_vpconflictdzrm_vpconflictdzrr_test() #0 { ret void }
+  define void @stack_fold_vpconflictqz128rm_vpconflictqz128rr_test() #0 { ret void }
+  define void @stack_fold_vpconflictqz256rm_vpconflictqz256rr_test() #0 { ret void }
+  define void @stack_fold_vpconflictqzrm_vpconflictqzrr_test() #0 { ret void }
+  define void @stack_fold_vplzcntdz128rm_vplzcntdz128rr_test() #0 { ret void }
+  define void @stack_fold_vplzcntdz256rm_vplzcntdz256rr_test() #0 { ret void }
+  define void @stack_fold_vplzcntdzrm_vplzcntdzrr_test() #0 { ret void }
+  define void @stack_fold_vplzcntqz128rm_vplzcntqz128rr_test() #0 { ret void }
+  define void @stack_fold_vplzcntqz256rm_vplzcntqz256rr_test() #0 { ret void }
+  define void @stack_fold_vplzcntqzrm_vplzcntqzrr_test() #0 { ret void }
+  define void @stack_fold_vpmovsxbwz128rm_vpmovsxbwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmovsxbwz256rm_vpmovsxbwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmovsxbwzrm_vpmovsxbwzrr_test() #0 { ret void }
+  define void @stack_fold_vpmovzxbwz128rm_vpmovzxbwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmovzxbwz256rm_vpmovzxbwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmovzxbwzrm_vpmovzxbwzrr_test() #0 { ret void }
+  define void @stack_fold_vpshufhwz128mi_vpshufhwz128ri_test() #0 { ret void }
+  define void @stack_fold_vpshufhwz256mi_vpshufhwz256ri_test() #0 { ret void }
+  define void @stack_fold_vpshufhwzmi_vpshufhwzri_test() #0 { ret void }
+  define void @stack_fold_vpshuflwz128mi_vpshuflwz128ri_test() #0 { ret void }
+  define void @stack_fold_vpshuflwz256mi_vpshuflwz256ri_test() #0 { ret void }
+  define void @stack_fold_vpshuflwzmi_vpshuflwzri_test() #0 { ret void }
+  define void @stack_fold_vpslldqz128rm_vpslldqz128rr_test() #0 { ret void }
+  define void @stack_fold_vpslldqz256rm_vpslldqz256rr_test() #0 { ret void }
+  define void @stack_fold_vpslldqz512rm_vpslldqz512rr_test() #0 { ret void }
+  define void @stack_fold_vpsllwz128mi_vpsllwz128ri_test() #0 { ret void }
+  define void @stack_fold_vpsllwz256mi_vpsllwz256ri_test() #0 { ret void }
+  define void @stack_fold_vpsllwzmi_vpsllwzri_test() #0 { ret void }
+  define void @stack_fold_vpsrawz128mi_vpsrawz128ri_test() #0 { ret void }
+  define void @stack_fold_vpsrawz256mi_vpsrawz256ri_test() #0 { ret void }
+  define void @stack_fold_vpsrawzmi_vpsrawzri_test() #0 { ret void }
+  define void @stack_fold_vpsrldqz128rm_vpsrldqz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsrldqz256rm_vpsrldqz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsrldqz512rm_vpsrldqz512rr_test() #0 { ret void }
+  define void @stack_fold_vpsrlwz128mi_vpsrlwz128ri_test() #0 { ret void }
+  define void @stack_fold_vpsrlwz256mi_vpsrlwz256ri_test() #0 { ret void }
+  define void @stack_fold_vpsrlwzmi_vpsrlwzri_test() #0 { ret void }
+  define void @stack_fold_vrcp28pdm_vrcp28pdr_test() #0 { ret void }
+  define void @stack_fold_vrcp28pdmb_vrcp28pdrb_test() #0 { ret void }
+  define void @stack_fold_vrcp28psm_vrcp28psr_test() #0 { ret void }
+  define void @stack_fold_vrcp28psmb_vrcp28psrb_test() #0 { ret void }
+  define void @stack_fold_vreducepdz128rmi_vreducepdz128rri_test() #0 { ret void }
+  define void @stack_fold_vreducepdz256rmi_vreducepdz256rri_test() #0 { ret void }
+  define void @stack_fold_vreducepdzrmbi_vreducepdzrrib_test() #0 { ret void }
+  define void @stack_fold_vreducepdzrmi_vreducepdzrri_test() #0 { ret void }
+  define void @stack_fold_vreducepsz128rmi_vreducepsz128rri_test() #0 { ret void }
+  define void @stack_fold_vreducepsz256rmi_vreducepsz256rri_test() #0 { ret void }
+  define void @stack_fold_vreducepszrmbi_vreducepszrrib_test() #0 { ret void }
+  define void @stack_fold_vreducepszrmi_vreducepszrri_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28pdm_vrsqrt28pdr_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28pdmb_vrsqrt28pdrb_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28psm_vrsqrt28psr_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28psmb_vrsqrt28psrb_test() #0 { ret void }
+  define void @stack_fold_vandnpdz128rm_vandnpdz128rr_test() #0 { ret void }
+  define void @stack_fold_vandnpdz256rm_vandnpdz256rr_test() #0 { ret void }
+  define void @stack_fold_vandnpdzrm_vandnpdzrr_test() #0 { ret void }
+  define void @stack_fold_vandnpsz128rm_vandnpsz128rr_test() #0 { ret void }
+  define void @stack_fold_vandnpsz256rm_vandnpsz256rr_test() #0 { ret void }
+  define void @stack_fold_vandnpszrm_vandnpszrr_test() #0 { ret void }
+  define void @stack_fold_vandpdz128rm_vandpdz128rr_test() #0 { ret void }
+  define void @stack_fold_vandpdz256rm_vandpdz256rr_test() #0 { ret void }
+  define void @stack_fold_vandpdzrm_vandpdzrr_test() #0 { ret void }
+  define void @stack_fold_vandpsz128rm_vandpsz128rr_test() #0 { ret void }
+  define void @stack_fold_vandpsz256rm_vandpsz256rr_test() #0 { ret void }
+  define void @stack_fold_vandpszrm_vandpszrr_test() #0 { ret void }
+  define void @stack_fold_vbroadcastf32x2z256mkz_vbroadcastf32x2z256rkz_test() #0 { ret void }
+  define void @stack_fold_vbroadcastf32x2zmkz_vbroadcastf32x2zrkz_test() #0 { ret void }
+  define void @stack_fold_vbroadcasti32x2z128mkz_vbroadcasti32x2z128rkz_test() #0 { ret void }
+  define void @stack_fold_vbroadcasti32x2z256mkz_vbroadcasti32x2z256rkz_test() #0 { ret void }
+  define void @stack_fold_vbroadcasti32x2zmkz_vbroadcasti32x2zrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2qqz128rmkz_vcvtpd2qqz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2qqz256rmkz_vcvtpd2qqz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2qqzrmkz_vcvtpd2qqzrrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2uqqz128rmkz_vcvtpd2uqqz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2uqqz256rmkz_vcvtpd2uqqz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2uqqzrmkz_vcvtpd2uqqzrrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtps2qqz128rmkz_vcvtps2qqz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtps2qqz256rmkz_vcvtps2qqz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtps2qqzrmkz_vcvtps2qqzrrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtps2uqqz128rmkz_vcvtps2uqqz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtps2uqqz256rmkz_vcvtps2uqqz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtps2uqqzrmkz_vcvtps2uqqzrrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2pdz128rmkz_vcvtqq2pdz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2pdz256rmkz_vcvtqq2pdz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2pdzrmkz_vcvtqq2pdzrrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2psz128rmkz_vcvtqq2psz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2psz256rmkz_vcvtqq2psz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2pszrmkz_vcvtqq2pszrrkz_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2qqz128rmkz_vcvttpd2qqz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2qqz256rmkz_vcvttpd2qqz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2qqzrmbkz_vcvttpd2qqzrrbkz_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2qqzrmkz_vcvttpd2qqzrrkz_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2uqqz128rmkz_vcvttpd2uqqz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2uqqz256rmkz_vcvttpd2uqqz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2uqqzrmbkz_vcvttpd2uqqzrrbkz_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2uqqzrmkz_vcvttpd2uqqzrrkz_test() #0 { ret void }
+  define void @stack_fold_vcvttps2qqz128rmkz_vcvttps2qqz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvttps2qqz256rmkz_vcvttps2qqz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvttps2qqzrmbkz_vcvttps2qqzrrbkz_test() #0 { ret void }
+  define void @stack_fold_vcvttps2qqzrmkz_vcvttps2qqzrrkz_test() #0 { ret void }
+  define void @stack_fold_vcvttps2uqqz128rmkz_vcvttps2uqqz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvttps2uqqz256rmkz_vcvttps2uqqz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvttps2uqqzrmbkz_vcvttps2uqqzrrbkz_test() #0 { ret void }
+  define void @stack_fold_vcvttps2uqqzrmkz_vcvttps2uqqzrrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2pdz128rmkz_vcvtuqq2pdz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2pdz256rmkz_vcvtuqq2pdz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2pdzrmkz_vcvtuqq2pdzrrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2psz128rmkz_vcvtuqq2psz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2psz256rmkz_vcvtuqq2psz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2pszrmkz_vcvtuqq2pszrrkz_test() #0 { ret void }
+  define void @stack_fold_vdbpsadbwz128rmi_vdbpsadbwz128rri_test() #0 { ret void }
+  define void @stack_fold_vdbpsadbwz256rmi_vdbpsadbwz256rri_test() #0 { ret void }
+  define void @stack_fold_vdbpsadbwzrmi_vdbpsadbwzrri_test() #0 { ret void }
+  define void @stack_fold_vexp2pdmbkz_vexp2pdrbkz_test() #0 { ret void }
+  define void @stack_fold_vexp2pdmkz_vexp2pdrkz_test() #0 { ret void }
+  define void @stack_fold_vexp2psmbkz_vexp2psrbkz_test() #0 { ret void }
+  define void @stack_fold_vexp2psmkz_vexp2psrkz_test() #0 { ret void }
+  define void @stack_fold_vfpclasspdz128rmk_vfpclasspdz128rrk_test() #0 { ret void }
+  define void @stack_fold_vfpclasspdz256rmk_vfpclasspdz256rrk_test() #0 { ret void }
+  define void @stack_fold_vfpclasspdzrmk_vfpclasspdzrrk_test() #0 { ret void }
+  define void @stack_fold_vfpclasspsz128rmk_vfpclasspsz128rrk_test() #0 { ret void }
+  define void @stack_fold_vfpclasspsz256rmk_vfpclasspsz256rrk_test() #0 { ret void }
+  define void @stack_fold_vfpclasspszrmk_vfpclasspszrrk_test() #0 { ret void }
+  define void @stack_fold_vfpclasssdrmk_vfpclasssdrrk_test() #0 { ret void }
+  define void @stack_fold_vfpclassssrmk_vfpclassssrrk_test() #0 { ret void }
+  define void @stack_fold_vinsertf32x8zrm_vinsertf32x8zrr_test() #0 { ret void }
+  define void @stack_fold_vinsertf64x2z256rm_vinsertf64x2z256rr_test() #0 { ret void }
+  define void @stack_fold_vinsertf64x2zrm_vinsertf64x2zrr_test() #0 { ret void }
+  define void @stack_fold_vinserti32x8zrm_vinserti32x8zrr_test() #0 { ret void }
+  define void @stack_fold_vinserti64x2z256rm_vinserti64x2z256rr_test() #0 { ret void }
+  define void @stack_fold_vinserti64x2zrm_vinserti64x2zrr_test() #0 { ret void }
+  define void @stack_fold_vmovdqu16z128rmkz_vmovdqu16z128rrkz_test() #0 { ret void }
+  define void @stack_fold_vmovdqu16z256rmkz_vmovdqu16z256rrkz_test() #0 { ret void }
+  define void @stack_fold_vmovdqu16zrmkz_vmovdqu16zrrkz_test() #0 { ret void }
+  define void @stack_fold_vmovdqu8z128rmkz_vmovdqu8z128rrkz_test() #0 { ret void }
+  define void @stack_fold_vmovdqu8z256rmkz_vmovdqu8z256rrkz_test() #0 { ret void }
+  define void @stack_fold_vmovdqu8zrmkz_vmovdqu8zrrkz_test() #0 { ret void }
+  define void @stack_fold_vorpdz128rm_vorpdz128rr_test() #0 { ret void }
+  define void @stack_fold_vorpdz256rm_vorpdz256rr_test() #0 { ret void }
+  define void @stack_fold_vorpdzrm_vorpdzrr_test() #0 { ret void }
+  define void @stack_fold_vorpsz128rm_vorpsz128rr_test() #0 { ret void }
+  define void @stack_fold_vorpsz256rm_vorpsz256rr_test() #0 { ret void }
+  define void @stack_fold_vorpszrm_vorpszrr_test() #0 { ret void }
+  define void @stack_fold_vpabsbz128rmkz_vpabsbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpabsbz256rmkz_vpabsbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpabsbzrmkz_vpabsbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpabswz128rmkz_vpabswz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpabswz256rmkz_vpabswz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpabswzrmkz_vpabswzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpackssdwz128rm_vpackssdwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpackssdwz256rm_vpackssdwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpackssdwzrm_vpackssdwzrr_test() #0 { ret void }
+  define void @stack_fold_vpacksswbz128rm_vpacksswbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpacksswbz256rm_vpacksswbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpacksswbzrm_vpacksswbzrr_test() #0 { ret void }
+  define void @stack_fold_vpackusdwz128rm_vpackusdwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpackusdwz256rm_vpackusdwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpackusdwzrm_vpackusdwzrr_test() #0 { ret void }
+  define void @stack_fold_vpackuswbz128rm_vpackuswbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpackuswbz256rm_vpackuswbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpackuswbzrm_vpackuswbzrr_test() #0 { ret void }
+  define void @stack_fold_vpaddbz128rm_vpaddbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpaddbz256rm_vpaddbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpaddbzrm_vpaddbzrr_test() #0 { ret void }
+  define void @stack_fold_vpaddsbz128rm_vpaddsbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpaddsbz256rm_vpaddsbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpaddsbzrm_vpaddsbzrr_test() #0 { ret void }
+  define void @stack_fold_vpaddswz128rm_vpaddswz128rr_test() #0 { ret void }
+  define void @stack_fold_vpaddswz256rm_vpaddswz256rr_test() #0 { ret void }
+  define void @stack_fold_vpaddswzrm_vpaddswzrr_test() #0 { ret void }
+  define void @stack_fold_vpaddusbz128rm_vpaddusbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpaddusbz256rm_vpaddusbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpaddusbzrm_vpaddusbzrr_test() #0 { ret void }
+  define void @stack_fold_vpadduswz128rm_vpadduswz128rr_test() #0 { ret void }
+  define void @stack_fold_vpadduswz256rm_vpadduswz256rr_test() #0 { ret void }
+  define void @stack_fold_vpadduswzrm_vpadduswzrr_test() #0 { ret void }
+  define void @stack_fold_vpaddwz128rm_vpaddwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpaddwz256rm_vpaddwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpaddwzrm_vpaddwzrr_test() #0 { ret void }
+  define void @stack_fold_vpalignrz128rmi_vpalignrz128rri_test() #0 { ret void }
+  define void @stack_fold_vpalignrz256rmi_vpalignrz256rri_test() #0 { ret void }
+  define void @stack_fold_vpalignrzrmi_vpalignrzrri_test() #0 { ret void }
+  define void @stack_fold_vpavgbz128rm_vpavgbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpavgbz256rm_vpavgbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpavgbzrm_vpavgbzrr_test() #0 { ret void }
+  define void @stack_fold_vpavgwz128rm_vpavgwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpavgwz256rm_vpavgwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpavgwzrm_vpavgwzrr_test() #0 { ret void }
+  define void @stack_fold_vpblendmbz128rm_vpblendmbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpblendmbz256rm_vpblendmbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpblendmbzrm_vpblendmbzrr_test() #0 { ret void }
+  define void @stack_fold_vpblendmwz128rm_vpblendmwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpblendmwz256rm_vpblendmwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpblendmwzrm_vpblendmwzrr_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastbz128mkz_vpbroadcastbz128rkz_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastbz256mkz_vpbroadcastbz256rkz_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastbzmkz_vpbroadcastbzrkz_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastwz128mkz_vpbroadcastwz128rkz_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastwz256mkz_vpbroadcastwz256rkz_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastwzmkz_vpbroadcastwzrkz_test() #0 { ret void }
+  define void @stack_fold_vpcmpbz128rmi_vpcmpbz128rri_test() #0 { ret void }
+  define void @stack_fold_vpcmpbz128rmi_alt_vpcmpbz128rri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpbz256rmi_vpcmpbz256rri_test() #0 { ret void }
+  define void @stack_fold_vpcmpbz256rmi_alt_vpcmpbz256rri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpbzrmi_vpcmpbzrri_test() #0 { ret void }
+  define void @stack_fold_vpcmpbzrmi_alt_vpcmpbzrri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpeqbz128rm_vpcmpeqbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpcmpeqbz256rm_vpcmpeqbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpcmpeqbzrm_vpcmpeqbzrr_test() #0 { ret void }
+  define void @stack_fold_vpcmpeqwz128rm_vpcmpeqwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpcmpeqwz256rm_vpcmpeqwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpcmpeqwzrm_vpcmpeqwzrr_test() #0 { ret void }
+  define void @stack_fold_vpcmpgtbz128rm_vpcmpgtbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpcmpgtbz256rm_vpcmpgtbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpcmpgtbzrm_vpcmpgtbzrr_test() #0 { ret void }
+  define void @stack_fold_vpcmpgtwz128rm_vpcmpgtwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpcmpgtwz256rm_vpcmpgtwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpcmpgtwzrm_vpcmpgtwzrr_test() #0 { ret void }
+  define void @stack_fold_vpcmpubz128rmi_vpcmpubz128rri_test() #0 { ret void }
+  define void @stack_fold_vpcmpubz128rmi_alt_vpcmpubz128rri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpubz256rmi_vpcmpubz256rri_test() #0 { ret void }
+  define void @stack_fold_vpcmpubz256rmi_alt_vpcmpubz256rri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpubzrmi_vpcmpubzrri_test() #0 { ret void }
+  define void @stack_fold_vpcmpubzrmi_alt_vpcmpubzrri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpuwz128rmi_vpcmpuwz128rri_test() #0 { ret void }
+  define void @stack_fold_vpcmpuwz128rmi_alt_vpcmpuwz128rri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpuwz256rmi_vpcmpuwz256rri_test() #0 { ret void }
+  define void @stack_fold_vpcmpuwz256rmi_alt_vpcmpuwz256rri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpuwzrmi_vpcmpuwzrri_test() #0 { ret void }
+  define void @stack_fold_vpcmpuwzrmi_alt_vpcmpuwzrri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpwz128rmi_vpcmpwz128rri_test() #0 { ret void }
+  define void @stack_fold_vpcmpwz128rmi_alt_vpcmpwz128rri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpwz256rmi_vpcmpwz256rri_test() #0 { ret void }
+  define void @stack_fold_vpcmpwz256rmi_alt_vpcmpwz256rri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpwzrmi_vpcmpwzrri_test() #0 { ret void }
+  define void @stack_fold_vpcmpwzrmi_alt_vpcmpwzrri_alt_test() #0 { ret void }
+  define void @stack_fold_vpconflictdz128rmkz_vpconflictdz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpconflictdz256rmkz_vpconflictdz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpconflictdzrmkz_vpconflictdzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpconflictqz128rmkz_vpconflictqz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpconflictqz256rmkz_vpconflictqz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpconflictqzrmkz_vpconflictqzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpermbz128rm_vpermbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpermbz256rm_vpermbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpermbzrm_vpermbzrr_test() #0 { ret void }
+  define void @stack_fold_vpermwz128rm_vpermwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpermwz256rm_vpermwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpermwzrm_vpermwzrr_test() #0 { ret void }
+  define void @stack_fold_vpinsrbzrm_vpinsrbzrr_test() #0 { ret void }
+  define void @stack_fold_vpinsrdzrm_vpinsrdzrr_test() #0 { ret void }
+  define void @stack_fold_vpinsrqzrm_vpinsrqzrr_test() #0 { ret void }
+  define void @stack_fold_vpinsrwzrm_vpinsrwzrr_test() #0 { ret void }
+  define void @stack_fold_vplzcntdz128rmkz_vplzcntdz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vplzcntdz256rmkz_vplzcntdz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vplzcntdzrmkz_vplzcntdzrrkz_test() #0 { ret void }
+  define void @stack_fold_vplzcntqz128rmkz_vplzcntqz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vplzcntqz256rmkz_vplzcntqz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vplzcntqzrmkz_vplzcntqzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaddubswz128rm_vpmaddubswz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmaddubswz256rm_vpmaddubswz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmaddubswzrm_vpmaddubswzrr_test() #0 { ret void }
+  define void @stack_fold_vpmaddwdz128rm_vpmaddwdz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmaddwdz256rm_vpmaddwdz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmaddwdzrm_vpmaddwdzrr_test() #0 { ret void }
+  define void @stack_fold_vpmaxsbz128rm_vpmaxsbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmaxsbz256rm_vpmaxsbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmaxsbzrm_vpmaxsbzrr_test() #0 { ret void }
+  define void @stack_fold_vpmaxswz128rm_vpmaxswz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmaxswz256rm_vpmaxswz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmaxswzrm_vpmaxswzrr_test() #0 { ret void }
+  define void @stack_fold_vpmaxubz128rm_vpmaxubz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmaxubz256rm_vpmaxubz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmaxubzrm_vpmaxubzrr_test() #0 { ret void }
+  define void @stack_fold_vpmaxuwz128rm_vpmaxuwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmaxuwz256rm_vpmaxuwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmaxuwzrm_vpmaxuwzrr_test() #0 { ret void }
+  define void @stack_fold_vpminsbz128rm_vpminsbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpminsbz256rm_vpminsbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpminsbzrm_vpminsbzrr_test() #0 { ret void }
+  define void @stack_fold_vpminswz128rm_vpminswz128rr_test() #0 { ret void }
+  define void @stack_fold_vpminswz256rm_vpminswz256rr_test() #0 { ret void }
+  define void @stack_fold_vpminswzrm_vpminswzrr_test() #0 { ret void }
+  define void @stack_fold_vpminubz128rm_vpminubz128rr_test() #0 { ret void }
+  define void @stack_fold_vpminubz256rm_vpminubz256rr_test() #0 { ret void }
+  define void @stack_fold_vpminubzrm_vpminubzrr_test() #0 { ret void }
+  define void @stack_fold_vpminuwz128rm_vpminuwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpminuwz256rm_vpminuwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpminuwzrm_vpminuwzrr_test() #0 { ret void }
+  define void @stack_fold_vpmovsxbwz128rmkz_vpmovsxbwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmovsxbwz256rmkz_vpmovsxbwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmovsxbwzrmkz_vpmovsxbwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmovzxbwz128rmkz_vpmovzxbwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmovzxbwz256rmkz_vpmovzxbwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmovzxbwzrmkz_vpmovzxbwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmulhrswz128rm_vpmulhrswz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmulhrswz256rm_vpmulhrswz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmulhrswzrm_vpmulhrswzrr_test() #0 { ret void }
+  define void @stack_fold_vpmulhuwz128rm_vpmulhuwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmulhuwz256rm_vpmulhuwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmulhuwzrm_vpmulhuwzrr_test() #0 { ret void }
+  define void @stack_fold_vpmulhwz128rm_vpmulhwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmulhwz256rm_vpmulhwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmulhwzrm_vpmulhwzrr_test() #0 { ret void }
+  define void @stack_fold_vpmullqz128rm_vpmullqz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmullqz256rm_vpmullqz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmullqzrm_vpmullqzrr_test() #0 { ret void }
+  define void @stack_fold_vpmullwz128rm_vpmullwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmullwz256rm_vpmullwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmullwzrm_vpmullwzrr_test() #0 { ret void }
+  define void @stack_fold_vpmultishiftqbz128rm_vpmultishiftqbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpmultishiftqbz256rm_vpmultishiftqbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpmultishiftqbzrm_vpmultishiftqbzrr_test() #0 { ret void }
+  define void @stack_fold_vpsadbwz128rm_vpsadbwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsadbwz256rm_vpsadbwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsadbwz512rm_vpsadbwz512rr_test() #0 { ret void }
+  define void @stack_fold_vpshufbz128rm_vpshufbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpshufbz256rm_vpshufbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpshufbzrm_vpshufbzrr_test() #0 { ret void }
+  define void @stack_fold_vpshufhwz128mikz_vpshufhwz128rikz_test() #0 { ret void }
+  define void @stack_fold_vpshufhwz256mikz_vpshufhwz256rikz_test() #0 { ret void }
+  define void @stack_fold_vpshufhwzmikz_vpshufhwzrikz_test() #0 { ret void }
+  define void @stack_fold_vpshuflwz128mikz_vpshuflwz128rikz_test() #0 { ret void }
+  define void @stack_fold_vpshuflwz256mikz_vpshuflwz256rikz_test() #0 { ret void }
+  define void @stack_fold_vpshuflwzmikz_vpshuflwzrikz_test() #0 { ret void }
+  define void @stack_fold_vpsllvwz128rm_vpsllvwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsllvwz256rm_vpsllvwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsllvwzrm_vpsllvwzrr_test() #0 { ret void }
+  define void @stack_fold_vpsllwz128mikz_vpsllwz128rikz_test() #0 { ret void }
+  define void @stack_fold_vpsllwz128rm_vpsllwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsllwz256mikz_vpsllwz256rikz_test() #0 { ret void }
+  define void @stack_fold_vpsllwz256rm_vpsllwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsllwzmikz_vpsllwzrikz_test() #0 { ret void }
+  define void @stack_fold_vpsllwzrm_vpsllwzrr_test() #0 { ret void }
+  define void @stack_fold_vpsravwz128rm_vpsravwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsravwz256rm_vpsravwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsravwzrm_vpsravwzrr_test() #0 { ret void }
+  define void @stack_fold_vpsrawz128mikz_vpsrawz128rikz_test() #0 { ret void }
+  define void @stack_fold_vpsrawz128rm_vpsrawz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsrawz256mikz_vpsrawz256rikz_test() #0 { ret void }
+  define void @stack_fold_vpsrawz256rm_vpsrawz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsrawzmikz_vpsrawzrikz_test() #0 { ret void }
+  define void @stack_fold_vpsrawzrm_vpsrawzrr_test() #0 { ret void }
+  define void @stack_fold_vpsrlvwz128rm_vpsrlvwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsrlvwz256rm_vpsrlvwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsrlvwzrm_vpsrlvwzrr_test() #0 { ret void }
+  define void @stack_fold_vpsrlwz128mikz_vpsrlwz128rikz_test() #0 { ret void }
+  define void @stack_fold_vpsrlwz128rm_vpsrlwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsrlwz256mikz_vpsrlwz256rikz_test() #0 { ret void }
+  define void @stack_fold_vpsrlwz256rm_vpsrlwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsrlwzmikz_vpsrlwzrikz_test() #0 { ret void }
+  define void @stack_fold_vpsrlwzrm_vpsrlwzrr_test() #0 { ret void }
+  define void @stack_fold_vpsubbz128rm_vpsubbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsubbz256rm_vpsubbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsubbzrm_vpsubbzrr_test() #0 { ret void }
+  define void @stack_fold_vpsubsbz128rm_vpsubsbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsubsbz256rm_vpsubsbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsubsbzrm_vpsubsbzrr_test() #0 { ret void }
+  define void @stack_fold_vpsubswz128rm_vpsubswz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsubswz256rm_vpsubswz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsubswzrm_vpsubswzrr_test() #0 { ret void }
+  define void @stack_fold_vpsubusbz128rm_vpsubusbz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsubusbz256rm_vpsubusbz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsubusbzrm_vpsubusbzrr_test() #0 { ret void }
+  define void @stack_fold_vpsubuswz128rm_vpsubuswz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsubuswz256rm_vpsubuswz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsubuswzrm_vpsubuswzrr_test() #0 { ret void }
+  define void @stack_fold_vpsubwz128rm_vpsubwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpsubwz256rm_vpsubwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpsubwzrm_vpsubwzrr_test() #0 { ret void }
+  define void @stack_fold_vptestmbz128rm_vptestmbz128rr_test() #0 { ret void }
+  define void @stack_fold_vptestmbz256rm_vptestmbz256rr_test() #0 { ret void }
+  define void @stack_fold_vptestmbzrm_vptestmbzrr_test() #0 { ret void }
+  define void @stack_fold_vptestmwz128rm_vptestmwz128rr_test() #0 { ret void }
+  define void @stack_fold_vptestmwz256rm_vptestmwz256rr_test() #0 { ret void }
+  define void @stack_fold_vptestmwzrm_vptestmwzrr_test() #0 { ret void }
+  define void @stack_fold_vptestnmbz128rm_vptestnmbz128rr_test() #0 { ret void }
+  define void @stack_fold_vptestnmbz256rm_vptestnmbz256rr_test() #0 { ret void }
+  define void @stack_fold_vptestnmbzrm_vptestnmbzrr_test() #0 { ret void }
+  define void @stack_fold_vptestnmwz128rm_vptestnmwz128rr_test() #0 { ret void }
+  define void @stack_fold_vptestnmwz256rm_vptestnmwz256rr_test() #0 { ret void }
+  define void @stack_fold_vptestnmwzrm_vptestnmwzrr_test() #0 { ret void }
+  define void @stack_fold_vpunpckhbwz128rm_vpunpckhbwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpunpckhbwz256rm_vpunpckhbwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpunpckhbwzrm_vpunpckhbwzrr_test() #0 { ret void }
+  define void @stack_fold_vpunpckhwdz128rm_vpunpckhwdz128rr_test() #0 { ret void }
+  define void @stack_fold_vpunpckhwdz256rm_vpunpckhwdz256rr_test() #0 { ret void }
+  define void @stack_fold_vpunpckhwdzrm_vpunpckhwdzrr_test() #0 { ret void }
+  define void @stack_fold_vpunpcklbwz128rm_vpunpcklbwz128rr_test() #0 { ret void }
+  define void @stack_fold_vpunpcklbwz256rm_vpunpcklbwz256rr_test() #0 { ret void }
+  define void @stack_fold_vpunpcklbwzrm_vpunpcklbwzrr_test() #0 { ret void }
+  define void @stack_fold_vpunpcklwdz128rm_vpunpcklwdz128rr_test() #0 { ret void }
+  define void @stack_fold_vpunpcklwdz256rm_vpunpcklwdz256rr_test() #0 { ret void }
+  define void @stack_fold_vpunpcklwdzrm_vpunpcklwdzrr_test() #0 { ret void }
+  define void @stack_fold_vrangepdz128rmi_vrangepdz128rri_test() #0 { ret void }
+  define void @stack_fold_vrangepdz256rmi_vrangepdz256rri_test() #0 { ret void }
+  define void @stack_fold_vrangepdzrmbi_vrangepdzrrib_test() #0 { ret void }
+  define void @stack_fold_vrangepdzrmi_vrangepdzrri_test() #0 { ret void }
+  define void @stack_fold_vrangepsz128rmi_vrangepsz128rri_test() #0 { ret void }
+  define void @stack_fold_vrangepsz256rmi_vrangepsz256rri_test() #0 { ret void }
+  define void @stack_fold_vrangepszrmbi_vrangepszrrib_test() #0 { ret void }
+  define void @stack_fold_vrangepszrmi_vrangepszrri_test() #0 { ret void }
+  define void @stack_fold_vrangesdz128rmi_vrangesdz128rri_test() #0 { ret void }
+  define void @stack_fold_vrangessz128rmi_vrangessz128rri_test() #0 { ret void }
+  define void @stack_fold_vrcp28pdmbkz_vrcp28pdrbkz_test() #0 { ret void }
+  define void @stack_fold_vrcp28pdmkz_vrcp28pdrkz_test() #0 { ret void }
+  define void @stack_fold_vrcp28psmbkz_vrcp28psrbkz_test() #0 { ret void }
+  define void @stack_fold_vrcp28psmkz_vrcp28psrkz_test() #0 { ret void }
+  define void @stack_fold_vrcp28sdm_vrcp28sdr_test() #0 { ret void }
+  define void @stack_fold_vrcp28ssm_vrcp28ssr_test() #0 { ret void }
+  define void @stack_fold_vreducepdz128rmikz_vreducepdz128rrikz_test() #0 { ret void }
+  define void @stack_fold_vreducepdz256rmikz_vreducepdz256rrikz_test() #0 { ret void }
+  define void @stack_fold_vreducepdzrmbikz_vreducepdzrribkz_test() #0 { ret void }
+  define void @stack_fold_vreducepdzrmikz_vreducepdzrrikz_test() #0 { ret void }
+  define void @stack_fold_vreducepsz128rmikz_vreducepsz128rrikz_test() #0 { ret void }
+  define void @stack_fold_vreducepsz256rmikz_vreducepsz256rrikz_test() #0 { ret void }
+  define void @stack_fold_vreducepszrmbikz_vreducepszrribkz_test() #0 { ret void }
+  define void @stack_fold_vreducepszrmikz_vreducepszrrikz_test() #0 { ret void }
+  define void @stack_fold_vreducesdz128rmi_vreducesdz128rri_test() #0 { ret void }
+  define void @stack_fold_vreducessz128rmi_vreducessz128rri_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28pdmbkz_vrsqrt28pdrbkz_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28pdmkz_vrsqrt28pdrkz_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28psmbkz_vrsqrt28psrbkz_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28psmkz_vrsqrt28psrkz_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28sdm_vrsqrt28sdr_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28ssm_vrsqrt28ssr_test() #0 { ret void }
+  define void @stack_fold_vxorpdz128rm_vxorpdz128rr_test() #0 { ret void }
+  define void @stack_fold_vxorpdz256rm_vxorpdz256rr_test() #0 { ret void }
+  define void @stack_fold_vxorpdzrm_vxorpdzrr_test() #0 { ret void }
+  define void @stack_fold_vxorpsz128rm_vxorpsz128rr_test() #0 { ret void }
+  define void @stack_fold_vxorpsz256rm_vxorpsz256rr_test() #0 { ret void }
+  define void @stack_fold_vxorpszrm_vxorpszrr_test() #0 { ret void }
+  define void @stack_fold_vandnpdz128rmkz_vandnpdz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vandnpdz256rmkz_vandnpdz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vandnpdzrmkz_vandnpdzrrkz_test() #0 { ret void }
+  define void @stack_fold_vandnpsz128rmkz_vandnpsz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vandnpsz256rmkz_vandnpsz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vandnpszrmkz_vandnpszrrkz_test() #0 { ret void }
+  define void @stack_fold_vandpdz128rmkz_vandpdz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vandpdz256rmkz_vandpdz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vandpdzrmkz_vandpdzrrkz_test() #0 { ret void }
+  define void @stack_fold_vandpsz128rmkz_vandpsz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vandpsz256rmkz_vandpsz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vandpszrmkz_vandpszrrkz_test() #0 { ret void }
+  define void @stack_fold_vbroadcastf32x2z256mk_vbroadcastf32x2z256rk_test() #0 { ret void }
+  define void @stack_fold_vbroadcastf32x2zmk_vbroadcastf32x2zrk_test() #0 { ret void }
+  define void @stack_fold_vbroadcasti32x2z128mk_vbroadcasti32x2z128rk_test() #0 { ret void }
+  define void @stack_fold_vbroadcasti32x2z256mk_vbroadcasti32x2z256rk_test() #0 { ret void }
+  define void @stack_fold_vbroadcasti32x2zmk_vbroadcasti32x2zrk_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2qqz128rmk_vcvtpd2qqz128rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2qqz256rmk_vcvtpd2qqz256rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2qqzrmk_vcvtpd2qqzrrk_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2uqqz128rmk_vcvtpd2uqqz128rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2uqqz256rmk_vcvtpd2uqqz256rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtpd2uqqzrmk_vcvtpd2uqqzrrk_test() #0 { ret void }
+  define void @stack_fold_vcvtps2qqz128rmk_vcvtps2qqz128rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtps2qqz256rmk_vcvtps2qqz256rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtps2qqzrmk_vcvtps2qqzrrk_test() #0 { ret void }
+  define void @stack_fold_vcvtps2uqqz128rmk_vcvtps2uqqz128rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtps2uqqz256rmk_vcvtps2uqqz256rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtps2uqqzrmk_vcvtps2uqqzrrk_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2pdz128rmk_vcvtqq2pdz128rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2pdz256rmk_vcvtqq2pdz256rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2pdzrmk_vcvtqq2pdzrrk_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2psz128rmk_vcvtqq2psz128rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2psz256rmk_vcvtqq2psz256rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtqq2pszrmk_vcvtqq2pszrrk_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2qqz128rmk_vcvttpd2qqz128rrk_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2qqz256rmk_vcvttpd2qqz256rrk_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2qqzrmbk_vcvttpd2qqzrrbk_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2qqzrmk_vcvttpd2qqzrrk_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2uqqz128rmk_vcvttpd2uqqz128rrk_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2uqqz256rmk_vcvttpd2uqqz256rrk_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2uqqzrmbk_vcvttpd2uqqzrrbk_test() #0 { ret void }
+  define void @stack_fold_vcvttpd2uqqzrmk_vcvttpd2uqqzrrk_test() #0 { ret void }
+  define void @stack_fold_vcvttps2qqz128rmk_vcvttps2qqz128rrk_test() #0 { ret void }
+  define void @stack_fold_vcvttps2qqz256rmk_vcvttps2qqz256rrk_test() #0 { ret void }
+  define void @stack_fold_vcvttps2qqzrmbk_vcvttps2qqzrrbk_test() #0 { ret void }
+  define void @stack_fold_vcvttps2qqzrmk_vcvttps2qqzrrk_test() #0 { ret void }
+  define void @stack_fold_vcvttps2uqqz128rmk_vcvttps2uqqz128rrk_test() #0 { ret void }
+  define void @stack_fold_vcvttps2uqqz256rmk_vcvttps2uqqz256rrk_test() #0 { ret void }
+  define void @stack_fold_vcvttps2uqqzrmbk_vcvttps2uqqzrrbk_test() #0 { ret void }
+  define void @stack_fold_vcvttps2uqqzrmk_vcvttps2uqqzrrk_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2pdz128rmk_vcvtuqq2pdz128rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2pdz256rmk_vcvtuqq2pdz256rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2pdzrmk_vcvtuqq2pdzrrk_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2psz128rmk_vcvtuqq2psz128rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2psz256rmk_vcvtuqq2psz256rrk_test() #0 { ret void }
+  define void @stack_fold_vcvtuqq2pszrmk_vcvtuqq2pszrrk_test() #0 { ret void }
+  define void @stack_fold_vdbpsadbwz128rmikz_vdbpsadbwz128rrikz_test() #0 { ret void }
+  define void @stack_fold_vdbpsadbwz256rmikz_vdbpsadbwz256rrikz_test() #0 { ret void }
+  define void @stack_fold_vdbpsadbwzrmikz_vdbpsadbwzrrikz_test() #0 { ret void }
+  define void @stack_fold_vexp2pdmbk_vexp2pdrbk_test() #0 { ret void }
+  define void @stack_fold_vexp2pdmk_vexp2pdrk_test() #0 { ret void }
+  define void @stack_fold_vexp2psmbk_vexp2psrbk_test() #0 { ret void }
+  define void @stack_fold_vexp2psmk_vexp2psrk_test() #0 { ret void }
+  define void @stack_fold_vinsertf32x8zrmkz_vinsertf32x8zrrkz_test() #0 { ret void }
+  define void @stack_fold_vinsertf64x2z256rmkz_vinsertf64x2z256rrkz_test() #0 { ret void }
+  define void @stack_fold_vinsertf64x2zrmkz_vinsertf64x2zrrkz_test() #0 { ret void }
+  define void @stack_fold_vinserti32x8zrmkz_vinserti32x8zrrkz_test() #0 { ret void }
+  define void @stack_fold_vinserti64x2z256rmkz_vinserti64x2z256rrkz_test() #0 { ret void }
+  define void @stack_fold_vinserti64x2zrmkz_vinserti64x2zrrkz_test() #0 { ret void }
+  define void @stack_fold_vmovdqu16z128rmk_vmovdqu16z128rrk_test() #0 { ret void }
+  define void @stack_fold_vmovdqu16z256rmk_vmovdqu16z256rrk_test() #0 { ret void }
+  define void @stack_fold_vmovdqu16zrmk_vmovdqu16zrrk_test() #0 { ret void }
+  define void @stack_fold_vmovdqu8z128rmk_vmovdqu8z128rrk_test() #0 { ret void }
+  define void @stack_fold_vmovdqu8z256rmk_vmovdqu8z256rrk_test() #0 { ret void }
+  define void @stack_fold_vmovdqu8zrmk_vmovdqu8zrrk_test() #0 { ret void }
+  define void @stack_fold_vorpdz128rmkz_vorpdz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vorpdz256rmkz_vorpdz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vorpdzrmkz_vorpdzrrkz_test() #0 { ret void }
+  define void @stack_fold_vorpsz128rmkz_vorpsz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vorpsz256rmkz_vorpsz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vorpszrmkz_vorpszrrkz_test() #0 { ret void }
+  define void @stack_fold_vpabsbz128rmk_vpabsbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpabsbz256rmk_vpabsbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpabsbzrmk_vpabsbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpabswz128rmk_vpabswz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpabswz256rmk_vpabswz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpabswzrmk_vpabswzrrk_test() #0 { ret void }
+  define void @stack_fold_vpackssdwz128rmkz_vpackssdwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpackssdwz256rmkz_vpackssdwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpackssdwzrmkz_vpackssdwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpacksswbz128rmkz_vpacksswbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpacksswbz256rmkz_vpacksswbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpacksswbzrmkz_vpacksswbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpackusdwz128rmkz_vpackusdwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpackusdwz256rmkz_vpackusdwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpackusdwzrmkz_vpackusdwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpackuswbz128rmkz_vpackuswbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpackuswbz256rmkz_vpackuswbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpackuswbzrmkz_vpackuswbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddbz128rmkz_vpaddbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddbz256rmkz_vpaddbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddbzrmkz_vpaddbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddsbz128rmkz_vpaddsbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddsbz256rmkz_vpaddsbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddsbzrmkz_vpaddsbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddswz128rmkz_vpaddswz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddswz256rmkz_vpaddswz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddswzrmkz_vpaddswzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddusbz128rmkz_vpaddusbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddusbz256rmkz_vpaddusbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddusbzrmkz_vpaddusbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpadduswz128rmkz_vpadduswz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpadduswz256rmkz_vpadduswz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpadduswzrmkz_vpadduswzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddwz128rmkz_vpaddwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddwz256rmkz_vpaddwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpaddwzrmkz_vpaddwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpalignrz128rmikz_vpalignrz128rrikz_test() #0 { ret void }
+  define void @stack_fold_vpalignrz256rmikz_vpalignrz256rrikz_test() #0 { ret void }
+  define void @stack_fold_vpalignrzrmikz_vpalignrzrrikz_test() #0 { ret void }
+  define void @stack_fold_vpavgbz128rmkz_vpavgbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpavgbz256rmkz_vpavgbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpavgbzrmkz_vpavgbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpavgwz128rmkz_vpavgwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpavgwz256rmkz_vpavgwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpavgwzrmkz_vpavgwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpblendmbz128rmk_vpblendmbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpblendmbz128rmkz_vpblendmbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpblendmbz256rmk_vpblendmbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpblendmbz256rmkz_vpblendmbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpblendmbzrmk_vpblendmbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpblendmbzrmkz_vpblendmbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpblendmwz128rmk_vpblendmwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpblendmwz128rmkz_vpblendmwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpblendmwz256rmk_vpblendmwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpblendmwz256rmkz_vpblendmwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpblendmwzrmk_vpblendmwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpblendmwzrmkz_vpblendmwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastbz128mk_vpbroadcastbz128rk_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastbz256mk_vpbroadcastbz256rk_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastbzmk_vpbroadcastbzrk_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastwz128mk_vpbroadcastwz128rk_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastwz256mk_vpbroadcastwz256rk_test() #0 { ret void }
+  define void @stack_fold_vpbroadcastwzmk_vpbroadcastwzrk_test() #0 { ret void }
+  define void @stack_fold_vpcmpbz128rmik_vpcmpbz128rrik_test() #0 { ret void }
+  define void @stack_fold_vpcmpbz128rmik_alt_vpcmpbz128rrik_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpbz256rmik_vpcmpbz256rrik_test() #0 { ret void }
+  define void @stack_fold_vpcmpbz256rmik_alt_vpcmpbz256rrik_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpbzrmik_vpcmpbzrrik_test() #0 { ret void }
+  define void @stack_fold_vpcmpbzrmik_alt_vpcmpbzrrik_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpeqbz128rmk_vpcmpeqbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpcmpeqbz256rmk_vpcmpeqbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpcmpeqbzrmk_vpcmpeqbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpcmpeqwz128rmk_vpcmpeqwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpcmpeqwz256rmk_vpcmpeqwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpcmpeqwzrmk_vpcmpeqwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpcmpgtbz128rmk_vpcmpgtbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpcmpgtbz256rmk_vpcmpgtbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpcmpgtbzrmk_vpcmpgtbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpcmpgtwz128rmk_vpcmpgtwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpcmpgtwz256rmk_vpcmpgtwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpcmpgtwzrmk_vpcmpgtwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpcmpubz128rmik_vpcmpubz128rrik_test() #0 { ret void }
+  define void @stack_fold_vpcmpubz128rmik_alt_vpcmpubz128rrik_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpubz256rmik_vpcmpubz256rrik_test() #0 { ret void }
+  define void @stack_fold_vpcmpubz256rmik_alt_vpcmpubz256rrik_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpubzrmik_vpcmpubzrrik_test() #0 { ret void }
+  define void @stack_fold_vpcmpubzrmik_alt_vpcmpubzrrik_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpuwz128rmik_vpcmpuwz128rrik_test() #0 { ret void }
+  define void @stack_fold_vpcmpuwz128rmik_alt_vpcmpuwz128rrik_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpuwz256rmik_vpcmpuwz256rrik_test() #0 { ret void }
+  define void @stack_fold_vpcmpuwz256rmik_alt_vpcmpuwz256rrik_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpuwzrmik_vpcmpuwzrrik_test() #0 { ret void }
+  define void @stack_fold_vpcmpuwzrmik_alt_vpcmpuwzrrik_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpwz128rmik_vpcmpwz128rrik_test() #0 { ret void }
+  define void @stack_fold_vpcmpwz128rmik_alt_vpcmpwz128rrik_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpwz256rmik_vpcmpwz256rrik_test() #0 { ret void }
+  define void @stack_fold_vpcmpwz256rmik_alt_vpcmpwz256rrik_alt_test() #0 { ret void }
+  define void @stack_fold_vpcmpwzrmik_vpcmpwzrrik_test() #0 { ret void }
+  define void @stack_fold_vpcmpwzrmik_alt_vpcmpwzrrik_alt_test() #0 { ret void }
+  define void @stack_fold_vpconflictdz128rmk_vpconflictdz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpconflictdz256rmk_vpconflictdz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpconflictdzrmk_vpconflictdzrrk_test() #0 { ret void }
+  define void @stack_fold_vpconflictqz128rmk_vpconflictqz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpconflictqz256rmk_vpconflictqz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpconflictqzrmk_vpconflictqzrrk_test() #0 { ret void }
+  define void @stack_fold_vpermbz128rmkz_vpermbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpermbz256rmkz_vpermbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpermbzrmkz_vpermbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpermi2b128rm_vpermi2b128rr_test() #0 { ret void }
+  define void @stack_fold_vpermi2b256rm_vpermi2b256rr_test() #0 { ret void }
+  define void @stack_fold_vpermi2brm_vpermi2brr_test() #0 { ret void }
+  define void @stack_fold_vpermi2w128rm_vpermi2w128rr_test() #0 { ret void }
+  define void @stack_fold_vpermi2w256rm_vpermi2w256rr_test() #0 { ret void }
+  define void @stack_fold_vpermi2wrm_vpermi2wrr_test() #0 { ret void }
+  define void @stack_fold_vpermt2b128rm_vpermt2b128rr_test() #0 { ret void }
+  define void @stack_fold_vpermt2b256rm_vpermt2b256rr_test() #0 { ret void }
+  define void @stack_fold_vpermt2brm_vpermt2brr_test() #0 { ret void }
+  define void @stack_fold_vpermt2w128rm_vpermt2w128rr_test() #0 { ret void }
+  define void @stack_fold_vpermt2w256rm_vpermt2w256rr_test() #0 { ret void }
+  define void @stack_fold_vpermt2wrm_vpermt2wrr_test() #0 { ret void }
+  define void @stack_fold_vpermwz128rmkz_vpermwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpermwz256rmkz_vpermwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpermwzrmkz_vpermwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vplzcntdz128rmk_vplzcntdz128rrk_test() #0 { ret void }
+  define void @stack_fold_vplzcntdz256rmk_vplzcntdz256rrk_test() #0 { ret void }
+  define void @stack_fold_vplzcntdzrmk_vplzcntdzrrk_test() #0 { ret void }
+  define void @stack_fold_vplzcntqz128rmk_vplzcntqz128rrk_test() #0 { ret void }
+  define void @stack_fold_vplzcntqz256rmk_vplzcntqz256rrk_test() #0 { ret void }
+  define void @stack_fold_vplzcntqzrmk_vplzcntqzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmadd52huqz128m_vpmadd52huqz128r_test() #0 { ret void }
+  define void @stack_fold_vpmadd52huqz256m_vpmadd52huqz256r_test() #0 { ret void }
+  define void @stack_fold_vpmadd52huqzm_vpmadd52huqzr_test() #0 { ret void }
+  define void @stack_fold_vpmadd52luqz128m_vpmadd52luqz128r_test() #0 { ret void }
+  define void @stack_fold_vpmadd52luqz256m_vpmadd52luqz256r_test() #0 { ret void }
+  define void @stack_fold_vpmadd52luqzm_vpmadd52luqzr_test() #0 { ret void }
+  define void @stack_fold_vpmaddubswz128rmkz_vpmaddubswz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaddubswz256rmkz_vpmaddubswz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaddubswzrmkz_vpmaddubswzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaddwdz128rmkz_vpmaddwdz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaddwdz256rmkz_vpmaddwdz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaddwdzrmkz_vpmaddwdzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaxsbz128rmkz_vpmaxsbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaxsbz256rmkz_vpmaxsbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaxsbzrmkz_vpmaxsbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaxswz128rmkz_vpmaxswz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaxswz256rmkz_vpmaxswz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaxswzrmkz_vpmaxswzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaxubz128rmkz_vpmaxubz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaxubz256rmkz_vpmaxubz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaxubzrmkz_vpmaxubzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaxuwz128rmkz_vpmaxuwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaxuwz256rmkz_vpmaxuwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaxuwzrmkz_vpmaxuwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpminsbz128rmkz_vpminsbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpminsbz256rmkz_vpminsbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpminsbzrmkz_vpminsbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpminswz128rmkz_vpminswz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpminswz256rmkz_vpminswz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpminswzrmkz_vpminswzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpminubz128rmkz_vpminubz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpminubz256rmkz_vpminubz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpminubzrmkz_vpminubzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpminuwz128rmkz_vpminuwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpminuwz256rmkz_vpminuwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpminuwzrmkz_vpminuwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmovsxbwz128rmk_vpmovsxbwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmovsxbwz256rmk_vpmovsxbwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmovsxbwzrmk_vpmovsxbwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmovzxbwz128rmk_vpmovzxbwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmovzxbwz256rmk_vpmovzxbwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmovzxbwzrmk_vpmovzxbwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmulhrswz128rmkz_vpmulhrswz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmulhrswz256rmkz_vpmulhrswz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmulhrswzrmkz_vpmulhrswzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmulhuwz128rmkz_vpmulhuwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmulhuwz256rmkz_vpmulhuwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmulhuwzrmkz_vpmulhuwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmulhwz128rmkz_vpmulhwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmulhwz256rmkz_vpmulhwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmulhwzrmkz_vpmulhwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmullqz128rmkz_vpmullqz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmullqz256rmkz_vpmullqz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmullqzrmkz_vpmullqzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmullwz128rmkz_vpmullwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmullwz256rmkz_vpmullwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmullwzrmkz_vpmullwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpmultishiftqbz128rmkz_vpmultishiftqbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmultishiftqbz256rmkz_vpmultishiftqbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpmultishiftqbzrmkz_vpmultishiftqbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpshufbz128rmkz_vpshufbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpshufbz256rmkz_vpshufbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpshufbzrmkz_vpshufbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpshufhwz128mik_vpshufhwz128rik_test() #0 { ret void }
+  define void @stack_fold_vpshufhwz256mik_vpshufhwz256rik_test() #0 { ret void }
+  define void @stack_fold_vpshufhwzmik_vpshufhwzrik_test() #0 { ret void }
+  define void @stack_fold_vpshuflwz128mik_vpshuflwz128rik_test() #0 { ret void }
+  define void @stack_fold_vpshuflwz256mik_vpshuflwz256rik_test() #0 { ret void }
+  define void @stack_fold_vpshuflwzmik_vpshuflwzrik_test() #0 { ret void }
+  define void @stack_fold_vpsllvwz128rmkz_vpsllvwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsllvwz256rmkz_vpsllvwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsllvwzrmkz_vpsllvwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpsllwz128mik_vpsllwz128rik_test() #0 { ret void }
+  define void @stack_fold_vpsllwz128rmkz_vpsllwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsllwz256mik_vpsllwz256rik_test() #0 { ret void }
+  define void @stack_fold_vpsllwz256rmkz_vpsllwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsllwzmik_vpsllwzrik_test() #0 { ret void }
+  define void @stack_fold_vpsllwzrmkz_vpsllwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpsravwz128rmkz_vpsravwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsravwz256rmkz_vpsravwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsravwzrmkz_vpsravwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpsrawz128mik_vpsrawz128rik_test() #0 { ret void }
+  define void @stack_fold_vpsrawz128rmkz_vpsrawz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsrawz256mik_vpsrawz256rik_test() #0 { ret void }
+  define void @stack_fold_vpsrawz256rmkz_vpsrawz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsrawzmik_vpsrawzrik_test() #0 { ret void }
+  define void @stack_fold_vpsrawzrmkz_vpsrawzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpsrlvwz128rmkz_vpsrlvwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsrlvwz256rmkz_vpsrlvwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsrlvwzrmkz_vpsrlvwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpsrlwz128mik_vpsrlwz128rik_test() #0 { ret void }
+  define void @stack_fold_vpsrlwz128rmkz_vpsrlwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsrlwz256mik_vpsrlwz256rik_test() #0 { ret void }
+  define void @stack_fold_vpsrlwz256rmkz_vpsrlwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsrlwzmik_vpsrlwzrik_test() #0 { ret void }
+  define void @stack_fold_vpsrlwzrmkz_vpsrlwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubbz128rmkz_vpsubbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubbz256rmkz_vpsubbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubbzrmkz_vpsubbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubsbz128rmkz_vpsubsbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubsbz256rmkz_vpsubsbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubsbzrmkz_vpsubsbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubswz128rmkz_vpsubswz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubswz256rmkz_vpsubswz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubswzrmkz_vpsubswzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubusbz128rmkz_vpsubusbz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubusbz256rmkz_vpsubusbz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubusbzrmkz_vpsubusbzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubuswz128rmkz_vpsubuswz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubuswz256rmkz_vpsubuswz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubuswzrmkz_vpsubuswzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubwz128rmkz_vpsubwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubwz256rmkz_vpsubwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpsubwzrmkz_vpsubwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vptestmbz128rmk_vptestmbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vptestmbz256rmk_vptestmbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vptestmbzrmk_vptestmbzrrk_test() #0 { ret void }
+  define void @stack_fold_vptestmwz128rmk_vptestmwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vptestmwz256rmk_vptestmwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vptestmwzrmk_vptestmwzrrk_test() #0 { ret void }
+  define void @stack_fold_vptestnmbz128rmk_vptestnmbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vptestnmbz256rmk_vptestnmbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vptestnmbzrmk_vptestnmbzrrk_test() #0 { ret void }
+  define void @stack_fold_vptestnmwz128rmk_vptestnmwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vptestnmwz256rmk_vptestnmwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vptestnmwzrmk_vptestnmwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpunpckhbwz128rmkz_vpunpckhbwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpunpckhbwz256rmkz_vpunpckhbwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpunpckhbwzrmkz_vpunpckhbwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpunpckhwdz128rmkz_vpunpckhwdz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpunpckhwdz256rmkz_vpunpckhwdz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpunpckhwdzrmkz_vpunpckhwdzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpunpcklbwz128rmkz_vpunpcklbwz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpunpcklbwz256rmkz_vpunpcklbwz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpunpcklbwzrmkz_vpunpcklbwzrrkz_test() #0 { ret void }
+  define void @stack_fold_vpunpcklwdz128rmkz_vpunpcklwdz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpunpcklwdz256rmkz_vpunpcklwdz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpunpcklwdzrmkz_vpunpcklwdzrrkz_test() #0 { ret void }
+  define void @stack_fold_vrangepdz128rmikz_vrangepdz128rrikz_test() #0 { ret void }
+  define void @stack_fold_vrangepdz256rmikz_vrangepdz256rrikz_test() #0 { ret void }
+  define void @stack_fold_vrangepdzrmbikz_vrangepdzrribkz_test() #0 { ret void }
+  define void @stack_fold_vrangepdzrmikz_vrangepdzrrikz_test() #0 { ret void }
+  define void @stack_fold_vrangepsz128rmikz_vrangepsz128rrikz_test() #0 { ret void }
+  define void @stack_fold_vrangepsz256rmikz_vrangepsz256rrikz_test() #0 { ret void }
+  define void @stack_fold_vrangepszrmbikz_vrangepszrribkz_test() #0 { ret void }
+  define void @stack_fold_vrangepszrmikz_vrangepszrrikz_test() #0 { ret void }
+  define void @stack_fold_vrangesdz128rmikz_vrangesdz128rrikz_test() #0 { ret void }
+  define void @stack_fold_vrangessz128rmikz_vrangessz128rrikz_test() #0 { ret void }
+  define void @stack_fold_vrcp28pdmbk_vrcp28pdrbk_test() #0 { ret void }
+  define void @stack_fold_vrcp28pdmk_vrcp28pdrk_test() #0 { ret void }
+  define void @stack_fold_vrcp28psmbk_vrcp28psrbk_test() #0 { ret void }
+  define void @stack_fold_vrcp28psmk_vrcp28psrk_test() #0 { ret void }
+  define void @stack_fold_vrcp28sdmkz_vrcp28sdrkz_test() #0 { ret void }
+  define void @stack_fold_vrcp28ssmkz_vrcp28ssrkz_test() #0 { ret void }
+  define void @stack_fold_vreducepdz128rmik_vreducepdz128rrik_test() #0 { ret void }
+  define void @stack_fold_vreducepdz256rmik_vreducepdz256rrik_test() #0 { ret void }
+  define void @stack_fold_vreducepdzrmbik_vreducepdzrribk_test() #0 { ret void }
+  define void @stack_fold_vreducepdzrmik_vreducepdzrrik_test() #0 { ret void }
+  define void @stack_fold_vreducepsz128rmik_vreducepsz128rrik_test() #0 { ret void }
+  define void @stack_fold_vreducepsz256rmik_vreducepsz256rrik_test() #0 { ret void }
+  define void @stack_fold_vreducepszrmbik_vreducepszrribk_test() #0 { ret void }
+  define void @stack_fold_vreducepszrmik_vreducepszrrik_test() #0 { ret void }
+  define void @stack_fold_vreducesdz128rmikz_vreducesdz128rrikz_test() #0 { ret void }
+  define void @stack_fold_vreducessz128rmikz_vreducessz128rrikz_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28pdmbk_vrsqrt28pdrbk_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28pdmk_vrsqrt28pdrk_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28psmbk_vrsqrt28psrbk_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28psmk_vrsqrt28psrk_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28sdmkz_vrsqrt28sdrkz_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28ssmkz_vrsqrt28ssrkz_test() #0 { ret void }
+  define void @stack_fold_vxorpdz128rmkz_vxorpdz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vxorpdz256rmkz_vxorpdz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vxorpdzrmkz_vxorpdzrrkz_test() #0 { ret void }
+  define void @stack_fold_vxorpsz128rmkz_vxorpsz128rrkz_test() #0 { ret void }
+  define void @stack_fold_vxorpsz256rmkz_vxorpsz256rrkz_test() #0 { ret void }
+  define void @stack_fold_vxorpszrmkz_vxorpszrrkz_test() #0 { ret void }
+  define void @stack_fold_vandnpdz128rmk_vandnpdz128rrk_test() #0 { ret void }
+  define void @stack_fold_vandnpdz256rmk_vandnpdz256rrk_test() #0 { ret void }
+  define void @stack_fold_vandnpdzrmk_vandnpdzrrk_test() #0 { ret void }
+  define void @stack_fold_vandnpsz128rmk_vandnpsz128rrk_test() #0 { ret void }
+  define void @stack_fold_vandnpsz256rmk_vandnpsz256rrk_test() #0 { ret void }
+  define void @stack_fold_vandnpszrmk_vandnpszrrk_test() #0 { ret void }
+  define void @stack_fold_vandpdz128rmk_vandpdz128rrk_test() #0 { ret void }
+  define void @stack_fold_vandpdz256rmk_vandpdz256rrk_test() #0 { ret void }
+  define void @stack_fold_vandpdzrmk_vandpdzrrk_test() #0 { ret void }
+  define void @stack_fold_vandpsz128rmk_vandpsz128rrk_test() #0 { ret void }
+  define void @stack_fold_vandpsz256rmk_vandpsz256rrk_test() #0 { ret void }
+  define void @stack_fold_vandpszrmk_vandpszrrk_test() #0 { ret void }
+  define void @stack_fold_vdbpsadbwz128rmik_vdbpsadbwz128rrik_test() #0 { ret void }
+  define void @stack_fold_vdbpsadbwz256rmik_vdbpsadbwz256rrik_test() #0 { ret void }
+  define void @stack_fold_vdbpsadbwzrmik_vdbpsadbwzrrik_test() #0 { ret void }
+  define void @stack_fold_vinsertf32x8zrmk_vinsertf32x8zrrk_test() #0 { ret void }
+  define void @stack_fold_vinsertf64x2z256rmk_vinsertf64x2z256rrk_test() #0 { ret void }
+  define void @stack_fold_vinsertf64x2zrmk_vinsertf64x2zrrk_test() #0 { ret void }
+  define void @stack_fold_vinserti32x8zrmk_vinserti32x8zrrk_test() #0 { ret void }
+  define void @stack_fold_vinserti64x2z256rmk_vinserti64x2z256rrk_test() #0 { ret void }
+  define void @stack_fold_vinserti64x2zrmk_vinserti64x2zrrk_test() #0 { ret void }
+  define void @stack_fold_vorpdz128rmk_vorpdz128rrk_test() #0 { ret void }
+  define void @stack_fold_vorpdz256rmk_vorpdz256rrk_test() #0 { ret void }
+  define void @stack_fold_vorpdzrmk_vorpdzrrk_test() #0 { ret void }
+  define void @stack_fold_vorpsz128rmk_vorpsz128rrk_test() #0 { ret void }
+  define void @stack_fold_vorpsz256rmk_vorpsz256rrk_test() #0 { ret void }
+  define void @stack_fold_vorpszrmk_vorpszrrk_test() #0 { ret void }
+  define void @stack_fold_vpackssdwz128rmk_vpackssdwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpackssdwz256rmk_vpackssdwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpackssdwzrmk_vpackssdwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpacksswbz128rmk_vpacksswbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpacksswbz256rmk_vpacksswbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpacksswbzrmk_vpacksswbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpackusdwz128rmk_vpackusdwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpackusdwz256rmk_vpackusdwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpackusdwzrmk_vpackusdwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpackuswbz128rmk_vpackuswbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpackuswbz256rmk_vpackuswbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpackuswbzrmk_vpackuswbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpaddbz128rmk_vpaddbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpaddbz256rmk_vpaddbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpaddbzrmk_vpaddbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpaddsbz128rmk_vpaddsbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpaddsbz256rmk_vpaddsbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpaddsbzrmk_vpaddsbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpaddswz128rmk_vpaddswz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpaddswz256rmk_vpaddswz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpaddswzrmk_vpaddswzrrk_test() #0 { ret void }
+  define void @stack_fold_vpaddusbz128rmk_vpaddusbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpaddusbz256rmk_vpaddusbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpaddusbzrmk_vpaddusbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpadduswz128rmk_vpadduswz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpadduswz256rmk_vpadduswz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpadduswzrmk_vpadduswzrrk_test() #0 { ret void }
+  define void @stack_fold_vpaddwz128rmk_vpaddwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpaddwz256rmk_vpaddwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpaddwzrmk_vpaddwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpalignrz128rmik_vpalignrz128rrik_test() #0 { ret void }
+  define void @stack_fold_vpalignrz256rmik_vpalignrz256rrik_test() #0 { ret void }
+  define void @stack_fold_vpalignrzrmik_vpalignrzrrik_test() #0 { ret void }
+  define void @stack_fold_vpavgbz128rmk_vpavgbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpavgbz256rmk_vpavgbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpavgbzrmk_vpavgbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpavgwz128rmk_vpavgwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpavgwz256rmk_vpavgwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpavgwzrmk_vpavgwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpermbz128rmk_vpermbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpermbz256rmk_vpermbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpermbzrmk_vpermbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpermi2b128rmk_vpermi2b128rrk_test() #0 { ret void }
+  define void @stack_fold_vpermi2b128rmkz_vpermi2b128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpermi2b256rmk_vpermi2b256rrk_test() #0 { ret void }
+  define void @stack_fold_vpermi2b256rmkz_vpermi2b256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpermi2brmk_vpermi2brrk_test() #0 { ret void }
+  define void @stack_fold_vpermi2brmkz_vpermi2brrkz_test() #0 { ret void }
+  define void @stack_fold_vpermi2w128rmk_vpermi2w128rrk_test() #0 { ret void }
+  define void @stack_fold_vpermi2w128rmkz_vpermi2w128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpermi2w256rmk_vpermi2w256rrk_test() #0 { ret void }
+  define void @stack_fold_vpermi2w256rmkz_vpermi2w256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpermi2wrmk_vpermi2wrrk_test() #0 { ret void }
+  define void @stack_fold_vpermi2wrmkz_vpermi2wrrkz_test() #0 { ret void }
+  define void @stack_fold_vpermt2b128rmk_vpermt2b128rrk_test() #0 { ret void }
+  define void @stack_fold_vpermt2b128rmkz_vpermt2b128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpermt2b256rmk_vpermt2b256rrk_test() #0 { ret void }
+  define void @stack_fold_vpermt2b256rmkz_vpermt2b256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpermt2brmk_vpermt2brrk_test() #0 { ret void }
+  define void @stack_fold_vpermt2brmkz_vpermt2brrkz_test() #0 { ret void }
+  define void @stack_fold_vpermt2w128rmk_vpermt2w128rrk_test() #0 { ret void }
+  define void @stack_fold_vpermt2w128rmkz_vpermt2w128rrkz_test() #0 { ret void }
+  define void @stack_fold_vpermt2w256rmk_vpermt2w256rrk_test() #0 { ret void }
+  define void @stack_fold_vpermt2w256rmkz_vpermt2w256rrkz_test() #0 { ret void }
+  define void @stack_fold_vpermt2wrmk_vpermt2wrrk_test() #0 { ret void }
+  define void @stack_fold_vpermt2wrmkz_vpermt2wrrkz_test() #0 { ret void }
+  define void @stack_fold_vpermwz128rmk_vpermwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpermwz256rmk_vpermwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpermwzrmk_vpermwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmadd52huqz128mk_vpmadd52huqz128rk_test() #0 { ret void }
+  define void @stack_fold_vpmadd52huqz128mkz_vpmadd52huqz128rkz_test() #0 { ret void }
+  define void @stack_fold_vpmadd52huqz256mk_vpmadd52huqz256rk_test() #0 { ret void }
+  define void @stack_fold_vpmadd52huqz256mkz_vpmadd52huqz256rkz_test() #0 { ret void }
+  define void @stack_fold_vpmadd52huqzmk_vpmadd52huqzrk_test() #0 { ret void }
+  define void @stack_fold_vpmadd52huqzmkz_vpmadd52huqzrkz_test() #0 { ret void }
+  define void @stack_fold_vpmadd52luqz128mk_vpmadd52luqz128rk_test() #0 { ret void }
+  define void @stack_fold_vpmadd52luqz128mkz_vpmadd52luqz128rkz_test() #0 { ret void }
+  define void @stack_fold_vpmadd52luqz256mk_vpmadd52luqz256rk_test() #0 { ret void }
+  define void @stack_fold_vpmadd52luqz256mkz_vpmadd52luqz256rkz_test() #0 { ret void }
+  define void @stack_fold_vpmadd52luqzmk_vpmadd52luqzrk_test() #0 { ret void }
+  define void @stack_fold_vpmadd52luqzmkz_vpmadd52luqzrkz_test() #0 { ret void }
+  define void @stack_fold_vpmaddubswz128rmk_vpmaddubswz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmaddubswz256rmk_vpmaddubswz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmaddubswzrmk_vpmaddubswzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmaddwdz128rmk_vpmaddwdz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmaddwdz256rmk_vpmaddwdz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmaddwdzrmk_vpmaddwdzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmaxsbz128rmk_vpmaxsbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmaxsbz256rmk_vpmaxsbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmaxsbzrmk_vpmaxsbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmaxswz128rmk_vpmaxswz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmaxswz256rmk_vpmaxswz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmaxswzrmk_vpmaxswzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmaxubz128rmk_vpmaxubz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmaxubz256rmk_vpmaxubz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmaxubzrmk_vpmaxubzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmaxuwz128rmk_vpmaxuwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmaxuwz256rmk_vpmaxuwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmaxuwzrmk_vpmaxuwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpminsbz128rmk_vpminsbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpminsbz256rmk_vpminsbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpminsbzrmk_vpminsbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpminswz128rmk_vpminswz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpminswz256rmk_vpminswz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpminswzrmk_vpminswzrrk_test() #0 { ret void }
+  define void @stack_fold_vpminubz128rmk_vpminubz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpminubz256rmk_vpminubz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpminubzrmk_vpminubzrrk_test() #0 { ret void }
+  define void @stack_fold_vpminuwz128rmk_vpminuwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpminuwz256rmk_vpminuwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpminuwzrmk_vpminuwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmulhrswz128rmk_vpmulhrswz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmulhrswz256rmk_vpmulhrswz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmulhrswzrmk_vpmulhrswzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmulhuwz128rmk_vpmulhuwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmulhuwz256rmk_vpmulhuwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmulhuwzrmk_vpmulhuwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmulhwz128rmk_vpmulhwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmulhwz256rmk_vpmulhwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmulhwzrmk_vpmulhwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmullqz128rmk_vpmullqz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmullqz256rmk_vpmullqz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmullqzrmk_vpmullqzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmullwz128rmk_vpmullwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmullwz256rmk_vpmullwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmullwzrmk_vpmullwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpmultishiftqbz128rmk_vpmultishiftqbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpmultishiftqbz256rmk_vpmultishiftqbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpmultishiftqbzrmk_vpmultishiftqbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpshufbz128rmk_vpshufbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpshufbz256rmk_vpshufbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpshufbzrmk_vpshufbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpsllvwz128rmk_vpsllvwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpsllvwz256rmk_vpsllvwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpsllvwzrmk_vpsllvwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpsllwz128rmk_vpsllwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpsllwz256rmk_vpsllwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpsllwzrmk_vpsllwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpsravwz128rmk_vpsravwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpsravwz256rmk_vpsravwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpsravwzrmk_vpsravwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpsrawz128rmk_vpsrawz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpsrawz256rmk_vpsrawz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpsrawzrmk_vpsrawzrrk_test() #0 { ret void }
+  define void @stack_fold_vpsrlvwz128rmk_vpsrlvwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpsrlvwz256rmk_vpsrlvwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpsrlvwzrmk_vpsrlvwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpsrlwz128rmk_vpsrlwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpsrlwz256rmk_vpsrlwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpsrlwzrmk_vpsrlwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpsubbz128rmk_vpsubbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpsubbz256rmk_vpsubbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpsubbzrmk_vpsubbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpsubsbz128rmk_vpsubsbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpsubsbz256rmk_vpsubsbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpsubsbzrmk_vpsubsbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpsubswz128rmk_vpsubswz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpsubswz256rmk_vpsubswz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpsubswzrmk_vpsubswzrrk_test() #0 { ret void }
+  define void @stack_fold_vpsubusbz128rmk_vpsubusbz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpsubusbz256rmk_vpsubusbz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpsubusbzrmk_vpsubusbzrrk_test() #0 { ret void }
+  define void @stack_fold_vpsubuswz128rmk_vpsubuswz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpsubuswz256rmk_vpsubuswz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpsubuswzrmk_vpsubuswzrrk_test() #0 { ret void }
+  define void @stack_fold_vpsubwz128rmk_vpsubwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpsubwz256rmk_vpsubwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpsubwzrmk_vpsubwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpunpckhbwz128rmk_vpunpckhbwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpunpckhbwz256rmk_vpunpckhbwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpunpckhbwzrmk_vpunpckhbwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpunpckhwdz128rmk_vpunpckhwdz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpunpckhwdz256rmk_vpunpckhwdz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpunpckhwdzrmk_vpunpckhwdzrrk_test() #0 { ret void }
+  define void @stack_fold_vpunpcklbwz128rmk_vpunpcklbwz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpunpcklbwz256rmk_vpunpcklbwz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpunpcklbwzrmk_vpunpcklbwzrrk_test() #0 { ret void }
+  define void @stack_fold_vpunpcklwdz128rmk_vpunpcklwdz128rrk_test() #0 { ret void }
+  define void @stack_fold_vpunpcklwdz256rmk_vpunpcklwdz256rrk_test() #0 { ret void }
+  define void @stack_fold_vpunpcklwdzrmk_vpunpcklwdzrrk_test() #0 { ret void }
+  define void @stack_fold_vrangepdz128rmik_vrangepdz128rrik_test() #0 { ret void }
+  define void @stack_fold_vrangepdz256rmik_vrangepdz256rrik_test() #0 { ret void }
+  define void @stack_fold_vrangepdzrmbik_vrangepdzrribk_test() #0 { ret void }
+  define void @stack_fold_vrangepdzrmik_vrangepdzrrik_test() #0 { ret void }
+  define void @stack_fold_vrangepsz128rmik_vrangepsz128rrik_test() #0 { ret void }
+  define void @stack_fold_vrangepsz256rmik_vrangepsz256rrik_test() #0 { ret void }
+  define void @stack_fold_vrangepszrmbik_vrangepszrribk_test() #0 { ret void }
+  define void @stack_fold_vrangepszrmik_vrangepszrrik_test() #0 { ret void }
+  define void @stack_fold_vrangesdz128rmik_vrangesdz128rrik_test() #0 { ret void }
+  define void @stack_fold_vrangessz128rmik_vrangessz128rrik_test() #0 { ret void }
+  define void @stack_fold_vrcp28sdmk_vrcp28sdrk_test() #0 { ret void }
+  define void @stack_fold_vrcp28ssmk_vrcp28ssrk_test() #0 { ret void }
+  define void @stack_fold_vreducesdz128rmik_vreducesdz128rrik_test() #0 { ret void }
+  define void @stack_fold_vreducessz128rmik_vreducessz128rrik_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28sdmk_vrsqrt28sdrk_test() #0 { ret void }
+  define void @stack_fold_vrsqrt28ssmk_vrsqrt28ssrk_test() #0 { ret void }
+  define void @stack_fold_vxorpdz128rmk_vxorpdz128rrk_test() #0 { ret void }
+  define void @stack_fold_vxorpdz256rmk_vxorpdz256rrk_test() #0 { ret void }
+  define void @stack_fold_vxorpdzrmk_vxorpdzrrk_test() #0 { ret void }
+  define void @stack_fold_vxorpsz128rmk_vxorpsz128rrk_test() #0 { ret void }
+  define void @stack_fold_vxorpsz256rmk_vxorpsz256rrk_test() #0 { ret void }
+  define void @stack_fold_vxorpszrmk_vxorpszrrk_test() #0 { ret void }
+...
+---
+name:      stack_fold_vextractf32x8zmr_vextractf32x8zrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr256x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 32, alignment: 32 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vextractf32x8zmr_vextractf32x8zrr_test
+    ; CHECK: VEXTRACTF32x8Zmr
+    %0 = VEXTRACTF32x8Zrr undef %zmm1, 0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ256mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vextractf64x2z256mr_vextractf64x2z256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vextractf64x2z256mr_vextractf64x2z256rr_test
+    ; CHECK: VEXTRACTF64x2Z256mr
+    %0 = VEXTRACTF64x2Z256rr undef %ymm1, 0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ128mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vextractf64x2zmr_vextractf64x2zrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vextractf64x2zmr_vextractf64x2zrr_test
+    ; CHECK: VEXTRACTF64x2Zmr
+    %0 = VEXTRACTF64x2Zrr undef %zmm1, 0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ128mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vextracti32x8zmr_vextracti32x8zrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr256x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 32, alignment: 32 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vextracti32x8zmr_vextracti32x8zrr_test
+    ; CHECK: VEXTRACTI32x8Zmr
+    %0 = VEXTRACTI32x8Zrr undef %zmm1, 0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ256mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vextracti64x2z256mr_vextracti64x2z256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vextracti64x2z256mr_vextracti64x2z256rr_test
+    ; CHECK: VEXTRACTI64x2Z256mr
+    %0 = VEXTRACTI64x2Z256rr undef %ymm1, 0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ128mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vextracti64x2zmr_vextracti64x2zrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vextracti64x2zmr_vextracti64x2zrr_test
+    ; CHECK: VEXTRACTI64x2Zmr
+    %0 = VEXTRACTI64x2Zrr undef %zmm1, 0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ128mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu16z128mr_vmovdqu16z128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu16z128mr_vmovdqu16z128rr_test
+    ; CHECK: VMOVDQU16Z128mr
+    %0 = VMOVDQU16Z128rr undef %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ128mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu16z256mr_vmovdqu16z256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr256x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 32, alignment: 32 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu16z256mr_vmovdqu16z256rr_test
+    ; CHECK: VMOVDQU16Z256mr
+    %0 = VMOVDQU16Z256rr undef %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ256mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu16zmr_vmovdqu16zrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr512 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 64, alignment: 64 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu16zmr_vmovdqu16zrr_test
+    ; CHECK: VMOVDQU16Zmr
+    %0 = VMOVDQU16Zrr undef %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZmr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu8z128mr_vmovdqu8z128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu8z128mr_vmovdqu8z128rr_test
+    ; CHECK: VMOVDQU8Z128mr
+    %0 = VMOVDQU8Z128rr undef %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ128mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu8z256mr_vmovdqu8z256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr256x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 32, alignment: 32 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu8z256mr_vmovdqu8z256rr_test
+    ; CHECK: VMOVDQU8Z256mr
+    %0 = VMOVDQU8Z256rr undef %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ256mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu8zmr_vmovdqu8zrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr512 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 64, alignment: 64 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu8zmr_vmovdqu8zrr_test
+    ; CHECK: VMOVDQU8Zmr
+    %0 = VMOVDQU8Zrr undef %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZmr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vpextrbzmr_vpextrbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vpextrbzmr_vpextrbzrr_test
+    ; CHECK: VPEXTRBZmr
+    %0 = VPEXTRBZrr undef %xmm0, 0
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vpextrdzmr_vpextrdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vpextrdzmr_vpextrdzrr_test
+    ; CHECK: VPEXTRDZmr
+    %0 = VPEXTRDZrr undef %xmm0, 0
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vpextrqzmr_vpextrqzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vpextrqzmr_vpextrqzrr_test
+    ; CHECK: VPEXTRQZmr
+    %0 = VPEXTRQZrr undef %xmm0, 0
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vpextrwzmr_vpextrwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vpextrwzmr_vpextrwzrr_test
+    ; CHECK: VPEXTRWZmr
+    %0 = VPEXTRWZrr undef %xmm0, 0
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vpmovswbz128mr_vpmovswbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovswbz128mr_vpmovswbz128rr_test
+    ; CHECK: VPMOVSWBZ128mr
+    %0 = VPMOVSWBZ128rr undef %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ128mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vpmovswbz256mr_vpmovswbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovswbz256mr_vpmovswbz256rr_test
+    ; CHECK: VPMOVSWBZ256mr
+    %0 = VPMOVSWBZ256rr undef %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ128mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vpmovswbzmr_vpmovswbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr256x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 32, alignment: 32 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovswbzmr_vpmovswbzrr_test
+    ; CHECK: VPMOVSWBZmr
+    %0 = VPMOVSWBZrr undef %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ256mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vpmovuswbz128mr_vpmovuswbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovuswbz128mr_vpmovuswbz128rr_test
+    ; CHECK: VPMOVUSWBZ128mr
+    %0 = VPMOVUSWBZ128rr undef %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ128mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vpmovuswbz256mr_vpmovuswbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovuswbz256mr_vpmovuswbz256rr_test
+    ; CHECK: VPMOVUSWBZ256mr
+    %0 = VPMOVUSWBZ256rr undef %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ128mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vpmovuswbzmr_vpmovuswbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr256x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 32, alignment: 32 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovuswbzmr_vpmovuswbzrr_test
+    ; CHECK: VPMOVUSWBZmr
+    %0 = VPMOVUSWBZrr undef %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ256mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vpmovwbz128mr_vpmovwbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovwbz128mr_vpmovwbz128rr_test
+    ; CHECK: VPMOVWBZ128mr
+    %0 = VPMOVWBZ128rr undef %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ128mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vpmovwbz256mr_vpmovwbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovwbz256mr_vpmovwbz256rr_test
+    ; CHECK: VPMOVWBZ256mr
+    %0 = VPMOVWBZ256rr undef %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ128mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vpmovwbzmr_vpmovwbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr256x }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 32, alignment: 32 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovwbzmr_vpmovwbzrr_test
+    ; CHECK: VPMOVWBZmr
+    %0 = VPMOVWBZrr undef %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    VMOVAPSZ256mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_kmovbkm_kmovbkk_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vk8 }
+liveins:
+  - { reg: '%k2', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %k2
+
+    ; CHECK-LABEL: name:      stack_fold_kmovbkm_kmovbkk_test
+    %1 = COPY %k2
+    INLINEASM $nop, 1, 12, implicit-def %k0, 12, implicit-def %k1, 12, implicit-def %k2, 12, implicit-def %k3, 12, implicit-def %k4, 12, implicit-def %k5, 12, implicit-def %k6, 12, implicit-def %k7
+    ; CHECK: KMOVBkm
+    %k1 = KMOVBkk %1
+    RET 0
+...
+---
+name:      stack_fold_kmovdkm_kmovdkk_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vk32 }
+liveins:
+  - { reg: '%k2', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %k2
+
+    ; CHECK-LABEL: name:      stack_fold_kmovdkm_kmovdkk_test
+    %1 = COPY %k2
+    INLINEASM $nop, 1, 12, implicit-def %k0, 12, implicit-def %k1, 12, implicit-def %k2, 12, implicit-def %k3, 12, implicit-def %k4, 12, implicit-def %k5, 12, implicit-def %k6, 12, implicit-def %k7
+    ; CHECK: KMOVDkm
+    %k1 = KMOVDkk %1
+    RET 0
+...
+---
+name:      stack_fold_kmovqkm_kmovqkk_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vk64 }
+liveins:
+  - { reg: '%k2', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %k2
+
+    ; CHECK-LABEL: name:      stack_fold_kmovqkm_kmovqkk_test
+    %1 = COPY %k2
+    INLINEASM $nop, 1, 12, implicit-def %k0, 12, implicit-def %k1, 12, implicit-def %k2, 12, implicit-def %k3, 12, implicit-def %k4, 12, implicit-def %k5, 12, implicit-def %k6, 12, implicit-def %k7
+    ; CHECK: KMOVQkm
+    %k1 = KMOVQkk %1
+    RET 0
+...
+---
+name:      stack_fold_vbroadcastf32x2z256m_vbroadcastf32x2z256r_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcastf32x2z256m_vbroadcastf32x2z256r_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTF32X2Z256m
+    %ymm0 = VBROADCASTF32X2Z256r %1
+    RET 0
+...
+---
+name:      stack_fold_vbroadcastf32x2zm_vbroadcastf32x2zr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcastf32x2zm_vbroadcastf32x2zr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTF32X2Zm
+    %zmm0 = VBROADCASTF32X2Zr %1
+    RET 0
+...
+---
+name:      stack_fold_vbroadcasti32x2z128m_vbroadcasti32x2z128r_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcasti32x2z128m_vbroadcasti32x2z128r_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTI32X2Z128m
+    %xmm0 = VBROADCASTI32X2Z128r %1
+    RET 0
+...
+---
+name:      stack_fold_vbroadcasti32x2z256m_vbroadcasti32x2z256r_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcasti32x2z256m_vbroadcasti32x2z256r_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTI32X2Z256m
+    %ymm0 = VBROADCASTI32X2Z256r %1
+    RET 0
+...
+---
+name:      stack_fold_vbroadcasti32x2zm_vbroadcasti32x2zr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcasti32x2zm_vbroadcasti32x2zr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTI32X2Zm
+    %zmm0 = VBROADCASTI32X2Zr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2qqz128rm_vcvtpd2qqz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2qqz128rm_vcvtpd2qqz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2QQZ128rm
+    %xmm0 = VCVTPD2QQZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2qqz256rm_vcvtpd2qqz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2qqz256rm_vcvtpd2qqz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2QQZ256rm
+    %ymm0 = VCVTPD2QQZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2qqzrm_vcvtpd2qqzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2qqzrm_vcvtpd2qqzrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2QQZrm
+    %zmm0 = VCVTPD2QQZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2uqqz128rm_vcvtpd2uqqz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2uqqz128rm_vcvtpd2uqqz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2UQQZ128rm
+    %xmm0 = VCVTPD2UQQZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2uqqz256rm_vcvtpd2uqqz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2uqqz256rm_vcvtpd2uqqz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2UQQZ256rm
+    %ymm0 = VCVTPD2UQQZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2uqqzrm_vcvtpd2uqqzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2uqqzrm_vcvtpd2uqqzrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2UQQZrm
+    %zmm0 = VCVTPD2UQQZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2qqz128rm_vcvtps2qqz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2qqz128rm_vcvtps2qqz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2QQZ128rm
+    %xmm0 = VCVTPS2QQZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2qqz256rm_vcvtps2qqz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2qqz256rm_vcvtps2qqz256rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2QQZ256rm
+    %ymm0 = VCVTPS2QQZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2qqzrm_vcvtps2qqzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2qqzrm_vcvtps2qqzrr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2QQZrm
+    %zmm0 = VCVTPS2QQZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2uqqz128rm_vcvtps2uqqz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2uqqz128rm_vcvtps2uqqz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2UQQZ128rm
+    %xmm0 = VCVTPS2UQQZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2uqqz256rm_vcvtps2uqqz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2uqqz256rm_vcvtps2uqqz256rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2UQQZ256rm
+    %ymm0 = VCVTPS2UQQZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2uqqzrm_vcvtps2uqqzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2uqqzrm_vcvtps2uqqzrr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2UQQZrm
+    %zmm0 = VCVTPS2UQQZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2pdz128rm_vcvtqq2pdz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2pdz128rm_vcvtqq2pdz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PDZ128rm
+    %xmm0 = VCVTQQ2PDZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2pdz256rm_vcvtqq2pdz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2pdz256rm_vcvtqq2pdz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PDZ256rm
+    %ymm0 = VCVTQQ2PDZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2pdzrm_vcvtqq2pdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2pdzrm_vcvtqq2pdzrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PDZrm
+    %zmm0 = VCVTQQ2PDZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2psz128rm_vcvtqq2psz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2psz128rm_vcvtqq2psz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PSZ128rm
+    %xmm0 = VCVTQQ2PSZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2psz256rm_vcvtqq2psz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2psz256rm_vcvtqq2psz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PSZ256rm
+    %xmm0 = VCVTQQ2PSZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2pszrm_vcvtqq2pszrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2pszrm_vcvtqq2pszrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PSZrm
+    %ymm0 = VCVTQQ2PSZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2qqz128rm_vcvttpd2qqz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2qqz128rm_vcvttpd2qqz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2QQZ128rm
+    %xmm0 = VCVTTPD2QQZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2qqz256rm_vcvttpd2qqz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2qqz256rm_vcvttpd2qqz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2QQZ256rm
+    %ymm0 = VCVTTPD2QQZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2qqzrm_vcvttpd2qqzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2qqzrm_vcvttpd2qqzrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2QQZrm
+    %zmm0 = VCVTTPD2QQZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2qqzrmb_vcvttpd2qqzrrb_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2qqzrmb_vcvttpd2qqzrrb_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2QQZrmb
+    %zmm0 = VCVTTPD2QQZrrb %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2uqqz128rm_vcvttpd2uqqz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2uqqz128rm_vcvttpd2uqqz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2UQQZ128rm
+    %xmm0 = VCVTTPD2UQQZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2uqqz256rm_vcvttpd2uqqz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2uqqz256rm_vcvttpd2uqqz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2UQQZ256rm
+    %ymm0 = VCVTTPD2UQQZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2uqqzrm_vcvttpd2uqqzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2uqqzrm_vcvttpd2uqqzrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2UQQZrm
+    %zmm0 = VCVTTPD2UQQZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2uqqzrmb_vcvttpd2uqqzrrb_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2uqqzrmb_vcvttpd2uqqzrrb_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2UQQZrmb
+    %zmm0 = VCVTTPD2UQQZrrb %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2qqz128rm_vcvttps2qqz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2qqz128rm_vcvttps2qqz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2QQZ128rm
+    %xmm0 = VCVTTPS2QQZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2qqz256rm_vcvttps2qqz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2qqz256rm_vcvttps2qqz256rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2QQZ256rm
+    %ymm0 = VCVTTPS2QQZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2qqzrm_vcvttps2qqzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2qqzrm_vcvttps2qqzrr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2QQZrm
+    %zmm0 = VCVTTPS2QQZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2qqzrmb_vcvttps2qqzrrb_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2qqzrmb_vcvttps2qqzrrb_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2QQZrmb
+    %zmm0 = VCVTTPS2QQZrrb %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2uqqz128rm_vcvttps2uqqz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2uqqz128rm_vcvttps2uqqz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2UQQZ128rm
+    %xmm0 = VCVTTPS2UQQZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2uqqz256rm_vcvttps2uqqz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2uqqz256rm_vcvttps2uqqz256rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2UQQZ256rm
+    %ymm0 = VCVTTPS2UQQZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2uqqzrm_vcvttps2uqqzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2uqqzrm_vcvttps2uqqzrr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2UQQZrm
+    %zmm0 = VCVTTPS2UQQZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2uqqzrmb_vcvttps2uqqzrrb_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2uqqzrmb_vcvttps2uqqzrrb_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2UQQZrmb
+    %zmm0 = VCVTTPS2UQQZrrb %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2pdz128rm_vcvtuqq2pdz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2pdz128rm_vcvtuqq2pdz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PDZ128rm
+    %xmm0 = VCVTUQQ2PDZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2pdz256rm_vcvtuqq2pdz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2pdz256rm_vcvtuqq2pdz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PDZ256rm
+    %ymm0 = VCVTUQQ2PDZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2pdzrm_vcvtuqq2pdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2pdzrm_vcvtuqq2pdzrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PDZrm
+    %zmm0 = VCVTUQQ2PDZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2psz128rm_vcvtuqq2psz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2psz128rm_vcvtuqq2psz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PSZ128rm
+    %xmm0 = VCVTUQQ2PSZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2psz256rm_vcvtuqq2psz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2psz256rm_vcvtuqq2psz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PSZ256rm
+    %xmm0 = VCVTUQQ2PSZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2pszrm_vcvtuqq2pszrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2pszrm_vcvtuqq2pszrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PSZrm
+    %ymm0 = VCVTUQQ2PSZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vexp2pdm_vexp2pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vexp2pdm_vexp2pdr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VEXP2PDm
+    %zmm0 = VEXP2PDr %1
+    RET 0
+...
+---
+name:      stack_fold_vexp2pdmb_vexp2pdrb_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vexp2pdmb_vexp2pdrb_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VEXP2PDmb
+    %zmm0 = VEXP2PDrb %1
+    RET 0
+...
+---
+name:      stack_fold_vexp2psm_vexp2psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vexp2psm_vexp2psr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VEXP2PSm
+    %zmm0 = VEXP2PSr %1
+    RET 0
+...
+---
+name:      stack_fold_vexp2psmb_vexp2psrb_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vexp2psmb_vexp2psrb_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VEXP2PSmb
+    %zmm0 = VEXP2PSrb %1
+    RET 0
+...
+---
+name:      stack_fold_vfpclasspdz128rm_vfpclasspdz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm0', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasspdz128rm_vfpclasspdz128rr_test
+    %1 = COPY %xmm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSPDZ128rm
+    %k1 = VFPCLASSPDZ128rr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclasspdz256rm_vfpclasspdz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm0', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasspdz256rm_vfpclasspdz256rr_test
+    %1 = COPY %ymm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSPDZ256rm
+    %k1 = VFPCLASSPDZ256rr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclasspdzrm_vfpclasspdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm0', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasspdzrm_vfpclasspdzrr_test
+    %1 = COPY %zmm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSPDZrm
+    %k1 = VFPCLASSPDZrr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclasspsz128rm_vfpclasspsz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm0', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasspsz128rm_vfpclasspsz128rr_test
+    %1 = COPY %xmm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSPSZ128rm
+    %k1 = VFPCLASSPSZ128rr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclasspsz256rm_vfpclasspsz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm0', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasspsz256rm_vfpclasspsz256rr_test
+    %1 = COPY %ymm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSPSZ256rm
+    %k1 = VFPCLASSPSZ256rr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclasspszrm_vfpclasspszrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm0', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasspszrm_vfpclasspszrr_test
+    %1 = COPY %zmm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSPSZrm
+    %k1 = VFPCLASSPSZrr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclasssdrm_vfpclasssdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm0', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasssdrm_vfpclasssdrr_test
+    %1 = COPY %xmm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSSDrm
+    %k1 = VFPCLASSSDrr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclassssrm_vfpclassssrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm0', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclassssrm_vfpclassssrr_test
+    %1 = COPY %xmm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSSSrm
+    %k1 = VFPCLASSSSrr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu16z128rm_vmovdqu16z128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu16z128rm_vmovdqu16z128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU16Z128rm
+    %xmm0 = VMOVDQU16Z128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu16z256rm_vmovdqu16z256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu16z256rm_vmovdqu16z256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU16Z256rm
+    %ymm0 = VMOVDQU16Z256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu16zrm_vmovdqu16zrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu16zrm_vmovdqu16zrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU16Zrm
+    %zmm0 = VMOVDQU16Zrr %1
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu8z128rm_vmovdqu8z128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu8z128rm_vmovdqu8z128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU8Z128rm
+    %xmm0 = VMOVDQU8Z128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu8z256rm_vmovdqu8z256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu8z256rm_vmovdqu8z256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU8Z256rm
+    %ymm0 = VMOVDQU8Z256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu8zrm_vmovdqu8zrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu8zrm_vmovdqu8zrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU8Zrm
+    %zmm0 = VMOVDQU8Zrr %1
+    RET 0
+...
+---
+name:      stack_fold_vpabsbz128rm_vpabsbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpabsbz128rm_vpabsbz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSBZ128rm
+    %xmm0 = VPABSBZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vpabsbz256rm_vpabsbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpabsbz256rm_vpabsbz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSBZ256rm
+    %ymm0 = VPABSBZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vpabsbzrm_vpabsbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpabsbzrm_vpabsbzrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSBZrm
+    %zmm0 = VPABSBZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vpabswz128rm_vpabswz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpabswz128rm_vpabswz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSWZ128rm
+    %xmm0 = VPABSWZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vpabswz256rm_vpabswz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpabswz256rm_vpabswz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSWZ256rm
+    %ymm0 = VPABSWZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vpabswzrm_vpabswzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpabswzrm_vpabswzrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSWZrm
+    %zmm0 = VPABSWZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastbz128m_vpbroadcastbz128r_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastbz128m_vpbroadcastbz128r_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTBZ128m
+    %xmm0 = VPBROADCASTBZ128r %1
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastbz256m_vpbroadcastbz256r_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastbz256m_vpbroadcastbz256r_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTBZ256m
+    %ymm0 = VPBROADCASTBZ256r %1
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastbzm_vpbroadcastbzr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastbzm_vpbroadcastbzr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTBZm
+    %zmm0 = VPBROADCASTBZr %1
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastwz128m_vpbroadcastwz128r_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastwz128m_vpbroadcastwz128r_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTWZ128m
+    %xmm0 = VPBROADCASTWZ128r %1
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastwz256m_vpbroadcastwz256r_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastwz256m_vpbroadcastwz256r_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTWZ256m
+    %ymm0 = VPBROADCASTWZ256r %1
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastwzm_vpbroadcastwzr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastwzm_vpbroadcastwzr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTWZm
+    %zmm0 = VPBROADCASTWZr %1
+    RET 0
+...
+---
+name:      stack_fold_vpconflictdz128rm_vpconflictdz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictdz128rm_vpconflictdz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTDZ128rm
+    %xmm0 = VPCONFLICTDZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vpconflictdz256rm_vpconflictdz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictdz256rm_vpconflictdz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTDZ256rm
+    %ymm0 = VPCONFLICTDZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vpconflictdzrm_vpconflictdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictdzrm_vpconflictdzrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTDZrm
+    %zmm0 = VPCONFLICTDZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vpconflictqz128rm_vpconflictqz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictqz128rm_vpconflictqz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTQZ128rm
+    %xmm0 = VPCONFLICTQZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vpconflictqz256rm_vpconflictqz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictqz256rm_vpconflictqz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTQZ256rm
+    %ymm0 = VPCONFLICTQZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vpconflictqzrm_vpconflictqzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictqzrm_vpconflictqzrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTQZrm
+    %zmm0 = VPCONFLICTQZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vplzcntdz128rm_vplzcntdz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntdz128rm_vplzcntdz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTDZ128rm
+    %xmm0 = VPLZCNTDZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vplzcntdz256rm_vplzcntdz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntdz256rm_vplzcntdz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTDZ256rm
+    %ymm0 = VPLZCNTDZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vplzcntdzrm_vplzcntdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntdzrm_vplzcntdzrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTDZrm
+    %zmm0 = VPLZCNTDZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vplzcntqz128rm_vplzcntqz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntqz128rm_vplzcntqz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTQZ128rm
+    %xmm0 = VPLZCNTQZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vplzcntqz256rm_vplzcntqz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntqz256rm_vplzcntqz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTQZ256rm
+    %ymm0 = VPLZCNTQZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vplzcntqzrm_vplzcntqzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntqzrm_vplzcntqzrr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTQZrm
+    %zmm0 = VPLZCNTQZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vpmovsxbwz128rm_vpmovsxbwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovsxbwz128rm_vpmovsxbwz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVSXBWZ128rm
+    %xmm0 = VPMOVSXBWZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vpmovsxbwz256rm_vpmovsxbwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovsxbwz256rm_vpmovsxbwz256rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVSXBWZ256rm
+    %ymm0 = VPMOVSXBWZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vpmovsxbwzrm_vpmovsxbwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovsxbwzrm_vpmovsxbwzrr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVSXBWZrm
+    %zmm0 = VPMOVSXBWZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vpmovzxbwz128rm_vpmovzxbwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovzxbwz128rm_vpmovzxbwz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVZXBWZ128rm
+    %xmm0 = VPMOVZXBWZ128rr %1
+    RET 0
+...
+---
+name:      stack_fold_vpmovzxbwz256rm_vpmovzxbwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovzxbwz256rm_vpmovzxbwz256rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVZXBWZ256rm
+    %ymm0 = VPMOVZXBWZ256rr %1
+    RET 0
+...
+---
+name:      stack_fold_vpmovzxbwzrm_vpmovzxbwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovzxbwzrm_vpmovzxbwzrr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVZXBWZrm
+    %zmm0 = VPMOVZXBWZrr %1
+    RET 0
+...
+---
+name:      stack_fold_vpshufhwz128mi_vpshufhwz128ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufhwz128mi_vpshufhwz128ri_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFHWZ128mi
+    %xmm0 = VPSHUFHWZ128ri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshufhwz256mi_vpshufhwz256ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufhwz256mi_vpshufhwz256ri_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFHWZ256mi
+    %ymm0 = VPSHUFHWZ256ri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshufhwzmi_vpshufhwzri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufhwzmi_vpshufhwzri_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFHWZmi
+    %zmm0 = VPSHUFHWZri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshuflwz128mi_vpshuflwz128ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshuflwz128mi_vpshuflwz128ri_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFLWZ128mi
+    %xmm0 = VPSHUFLWZ128ri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshuflwz256mi_vpshuflwz256ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshuflwz256mi_vpshuflwz256ri_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFLWZ256mi
+    %ymm0 = VPSHUFLWZ256ri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshuflwzmi_vpshuflwzri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshuflwzmi_vpshuflwzri_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFLWZmi
+    %zmm0 = VPSHUFLWZri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpslldqz128rm_vpslldqz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpslldqz128rm_vpslldqz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLDQZ128rm
+    %xmm0 = VPSLLDQZ128rr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpslldqz256rm_vpslldqz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpslldqz256rm_vpslldqz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLDQZ256rm
+    %ymm0 = VPSLLDQZ256rr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpslldqz512rm_vpslldqz512rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpslldqz512rm_vpslldqz512rr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLDQZ512rm
+    %zmm0 = VPSLLDQZ512rr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsllwz128mi_vpsllwz128ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwz128mi_vpsllwz128ri_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZ128mi
+    %xmm0 = VPSLLWZ128ri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsllwz256mi_vpsllwz256ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwz256mi_vpsllwz256ri_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZ256mi
+    %ymm0 = VPSLLWZ256ri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsllwzmi_vpsllwzri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwzmi_vpsllwzri_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZmi
+    %zmm0 = VPSLLWZri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrawz128mi_vpsrawz128ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawz128mi_vpsrawz128ri_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZ128mi
+    %xmm0 = VPSRAWZ128ri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrawz256mi_vpsrawz256ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawz256mi_vpsrawz256ri_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZ256mi
+    %ymm0 = VPSRAWZ256ri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrawzmi_vpsrawzri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawzmi_vpsrawzri_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZmi
+    %zmm0 = VPSRAWZri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrldqz128rm_vpsrldqz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrldqz128rm_vpsrldqz128rr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLDQZ128rm
+    %xmm0 = VPSRLDQZ128rr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrldqz256rm_vpsrldqz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrldqz256rm_vpsrldqz256rr_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLDQZ256rm
+    %ymm0 = VPSRLDQZ256rr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrldqz512rm_vpsrldqz512rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrldqz512rm_vpsrldqz512rr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLDQZ512rm
+    %zmm0 = VPSRLDQZ512rr %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwz128mi_vpsrlwz128ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwz128mi_vpsrlwz128ri_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZ128mi
+    %xmm0 = VPSRLWZ128ri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwz256mi_vpsrlwz256ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwz256mi_vpsrlwz256ri_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZ256mi
+    %ymm0 = VPSRLWZ256ri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwzmi_vpsrlwzri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwzmi_vpsrlwzri_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZmi
+    %zmm0 = VPSRLWZri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vrcp28pdm_vrcp28pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28pdm_vrcp28pdr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28PDm
+    %zmm0 = VRCP28PDr %1
+    RET 0
+...
+---
+name:      stack_fold_vrcp28pdmb_vrcp28pdrb_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28pdmb_vrcp28pdrb_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28PDmb
+    %zmm0 = VRCP28PDrb %1
+    RET 0
+...
+---
+name:      stack_fold_vrcp28psm_vrcp28psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28psm_vrcp28psr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28PSm
+    %zmm0 = VRCP28PSr %1
+    RET 0
+...
+---
+name:      stack_fold_vrcp28psmb_vrcp28psrb_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28psmb_vrcp28psrb_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28PSmb
+    %zmm0 = VRCP28PSrb %1
+    RET 0
+...
+---
+name:      stack_fold_vreducepdz128rmi_vreducepdz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepdz128rmi_vreducepdz128rri_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPDZ128rmi
+    %xmm0 = VREDUCEPDZ128rri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepdz256rmi_vreducepdz256rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepdz256rmi_vreducepdz256rri_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPDZ256rmi
+    %ymm0 = VREDUCEPDZ256rri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepdzrmbi_vreducepdzrrib_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepdzrmbi_vreducepdzrrib_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPDZrmbi
+    %zmm0 = VREDUCEPDZrrib %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepdzrmi_vreducepdzrri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepdzrmi_vreducepdzrri_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPDZrmi
+    %zmm0 = VREDUCEPDZrri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepsz128rmi_vreducepsz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepsz128rmi_vreducepsz128rri_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPSZ128rmi
+    %xmm0 = VREDUCEPSZ128rri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepsz256rmi_vreducepsz256rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepsz256rmi_vreducepsz256rri_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPSZ256rmi
+    %ymm0 = VREDUCEPSZ256rri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepszrmbi_vreducepszrrib_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepszrmbi_vreducepszrrib_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPSZrmbi
+    %zmm0 = VREDUCEPSZrrib %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepszrmi_vreducepszrri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepszrmi_vreducepszrri_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPSZrmi
+    %zmm0 = VREDUCEPSZrri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28pdm_vrsqrt28pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28pdm_vrsqrt28pdr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28PDm
+    %zmm0 = VRSQRT28PDr %1
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28pdmb_vrsqrt28pdrb_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28pdmb_vrsqrt28pdrb_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28PDmb
+    %zmm0 = VRSQRT28PDrb %1
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28psm_vrsqrt28psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28psm_vrsqrt28psr_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28PSm
+    %zmm0 = VRSQRT28PSr %1
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28psmb_vrsqrt28psrb_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28psmb_vrsqrt28psrb_test
+    %1 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28PSmb
+    %zmm0 = VRSQRT28PSrb %1
+    RET 0
+...
+---
+name:      stack_fold_vandnpdz128rm_vandnpdz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpdz128rm_vandnpdz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPDZ128rm
+    %xmm0 = VANDNPDZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vandnpdz256rm_vandnpdz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpdz256rm_vandnpdz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPDZ256rm
+    %ymm0 = VANDNPDZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vandnpdzrm_vandnpdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpdzrm_vandnpdzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPDZrm
+    %zmm0 = VANDNPDZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vandnpsz128rm_vandnpsz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpsz128rm_vandnpsz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPSZ128rm
+    %xmm0 = VANDNPSZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vandnpsz256rm_vandnpsz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpsz256rm_vandnpsz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPSZ256rm
+    %ymm0 = VANDNPSZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vandnpszrm_vandnpszrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpszrm_vandnpszrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPSZrm
+    %zmm0 = VANDNPSZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vandpdz128rm_vandpdz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandpdz128rm_vandpdz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPDZ128rm
+    %xmm0 = VANDPDZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vandpdz256rm_vandpdz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandpdz256rm_vandpdz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPDZ256rm
+    %ymm0 = VANDPDZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vandpdzrm_vandpdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandpdzrm_vandpdzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPDZrm
+    %zmm0 = VANDPDZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vandpsz128rm_vandpsz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandpsz128rm_vandpsz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPSZ128rm
+    %xmm0 = VANDPSZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vandpsz256rm_vandpsz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandpsz256rm_vandpsz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPSZ256rm
+    %ymm0 = VANDPSZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vandpszrm_vandpszrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandpszrm_vandpszrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPSZrm
+    %zmm0 = VANDPSZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vbroadcastf32x2z256mkz_vbroadcastf32x2z256rkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcastf32x2z256mkz_vbroadcastf32x2z256rkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTF32X2Z256mkz
+    %ymm0 = VBROADCASTF32X2Z256rkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vbroadcastf32x2zmkz_vbroadcastf32x2zrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcastf32x2zmkz_vbroadcastf32x2zrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTF32X2Zmkz
+    %zmm0 = VBROADCASTF32X2Zrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vbroadcasti32x2z128mkz_vbroadcasti32x2z128rkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcasti32x2z128mkz_vbroadcasti32x2z128rkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTI32X2Z128mkz
+    %xmm0 = VBROADCASTI32X2Z128rkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vbroadcasti32x2z256mkz_vbroadcasti32x2z256rkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcasti32x2z256mkz_vbroadcasti32x2z256rkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTI32X2Z256mkz
+    %ymm0 = VBROADCASTI32X2Z256rkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vbroadcasti32x2zmkz_vbroadcasti32x2zrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcasti32x2zmkz_vbroadcasti32x2zrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTI32X2Zmkz
+    %zmm0 = VBROADCASTI32X2Zrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2qqz128rmkz_vcvtpd2qqz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2qqz128rmkz_vcvtpd2qqz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2QQZ128rmkz
+    %xmm0 = VCVTPD2QQZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2qqz256rmkz_vcvtpd2qqz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2qqz256rmkz_vcvtpd2qqz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2QQZ256rmkz
+    %ymm0 = VCVTPD2QQZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2qqzrmkz_vcvtpd2qqzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2qqzrmkz_vcvtpd2qqzrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2QQZrmkz
+    %zmm0 = VCVTPD2QQZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2uqqz128rmkz_vcvtpd2uqqz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2uqqz128rmkz_vcvtpd2uqqz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2UQQZ128rmkz
+    %xmm0 = VCVTPD2UQQZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2uqqz256rmkz_vcvtpd2uqqz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2uqqz256rmkz_vcvtpd2uqqz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2UQQZ256rmkz
+    %ymm0 = VCVTPD2UQQZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2uqqzrmkz_vcvtpd2uqqzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2uqqzrmkz_vcvtpd2uqqzrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2UQQZrmkz
+    %zmm0 = VCVTPD2UQQZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2qqz128rmkz_vcvtps2qqz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2qqz128rmkz_vcvtps2qqz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2QQZ128rmkz
+    %xmm0 = VCVTPS2QQZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2qqz256rmkz_vcvtps2qqz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2qqz256rmkz_vcvtps2qqz256rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2QQZ256rmkz
+    %ymm0 = VCVTPS2QQZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2qqzrmkz_vcvtps2qqzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2qqzrmkz_vcvtps2qqzrrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2QQZrmkz
+    %zmm0 = VCVTPS2QQZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2uqqz128rmkz_vcvtps2uqqz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2uqqz128rmkz_vcvtps2uqqz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2UQQZ128rmkz
+    %xmm0 = VCVTPS2UQQZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2uqqz256rmkz_vcvtps2uqqz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2uqqz256rmkz_vcvtps2uqqz256rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2UQQZ256rmkz
+    %ymm0 = VCVTPS2UQQZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2uqqzrmkz_vcvtps2uqqzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2uqqzrmkz_vcvtps2uqqzrrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2UQQZrmkz
+    %zmm0 = VCVTPS2UQQZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2pdz128rmkz_vcvtqq2pdz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2pdz128rmkz_vcvtqq2pdz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PDZ128rmkz
+    %xmm0 = VCVTQQ2PDZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2pdz256rmkz_vcvtqq2pdz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2pdz256rmkz_vcvtqq2pdz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PDZ256rmkz
+    %ymm0 = VCVTQQ2PDZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2pdzrmkz_vcvtqq2pdzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2pdzrmkz_vcvtqq2pdzrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PDZrmkz
+    %zmm0 = VCVTQQ2PDZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2psz128rmkz_vcvtqq2psz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2psz128rmkz_vcvtqq2psz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PSZ128rmkz
+    %xmm0 = VCVTQQ2PSZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2psz256rmkz_vcvtqq2psz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2psz256rmkz_vcvtqq2psz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PSZ256rmkz
+    %xmm0 = VCVTQQ2PSZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2pszrmkz_vcvtqq2pszrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2pszrmkz_vcvtqq2pszrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PSZrmkz
+    %ymm0 = VCVTQQ2PSZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2qqz128rmkz_vcvttpd2qqz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2qqz128rmkz_vcvttpd2qqz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2QQZ128rmkz
+    %xmm0 = VCVTTPD2QQZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2qqz256rmkz_vcvttpd2qqz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2qqz256rmkz_vcvttpd2qqz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2QQZ256rmkz
+    %ymm0 = VCVTTPD2QQZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2qqzrmbkz_vcvttpd2qqzrrbkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2qqzrmbkz_vcvttpd2qqzrrbkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2QQZrmbkz
+    %zmm0 = VCVTTPD2QQZrrbkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2qqzrmkz_vcvttpd2qqzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2qqzrmkz_vcvttpd2qqzrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2QQZrmkz
+    %zmm0 = VCVTTPD2QQZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2uqqz128rmkz_vcvttpd2uqqz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2uqqz128rmkz_vcvttpd2uqqz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2UQQZ128rmkz
+    %xmm0 = VCVTTPD2UQQZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2uqqz256rmkz_vcvttpd2uqqz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2uqqz256rmkz_vcvttpd2uqqz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2UQQZ256rmkz
+    %ymm0 = VCVTTPD2UQQZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2uqqzrmbkz_vcvttpd2uqqzrrbkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2uqqzrmbkz_vcvttpd2uqqzrrbkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2UQQZrmbkz
+    %zmm0 = VCVTTPD2UQQZrrbkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2uqqzrmkz_vcvttpd2uqqzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2uqqzrmkz_vcvttpd2uqqzrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2UQQZrmkz
+    %zmm0 = VCVTTPD2UQQZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2qqz128rmkz_vcvttps2qqz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2qqz128rmkz_vcvttps2qqz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2QQZ128rmkz
+    %xmm0 = VCVTTPS2QQZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2qqz256rmkz_vcvttps2qqz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2qqz256rmkz_vcvttps2qqz256rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2QQZ256rmkz
+    %ymm0 = VCVTTPS2QQZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2qqzrmbkz_vcvttps2qqzrrbkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2qqzrmbkz_vcvttps2qqzrrbkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2QQZrmbkz
+    %zmm0 = VCVTTPS2QQZrrbkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2qqzrmkz_vcvttps2qqzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2qqzrmkz_vcvttps2qqzrrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2QQZrmkz
+    %zmm0 = VCVTTPS2QQZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2uqqz128rmkz_vcvttps2uqqz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2uqqz128rmkz_vcvttps2uqqz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2UQQZ128rmkz
+    %xmm0 = VCVTTPS2UQQZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2uqqz256rmkz_vcvttps2uqqz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2uqqz256rmkz_vcvttps2uqqz256rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2UQQZ256rmkz
+    %ymm0 = VCVTTPS2UQQZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2uqqzrmbkz_vcvttps2uqqzrrbkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2uqqzrmbkz_vcvttps2uqqzrrbkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2UQQZrmbkz
+    %zmm0 = VCVTTPS2UQQZrrbkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2uqqzrmkz_vcvttps2uqqzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2uqqzrmkz_vcvttps2uqqzrrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2UQQZrmkz
+    %zmm0 = VCVTTPS2UQQZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2pdz128rmkz_vcvtuqq2pdz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2pdz128rmkz_vcvtuqq2pdz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PDZ128rmkz
+    %xmm0 = VCVTUQQ2PDZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2pdz256rmkz_vcvtuqq2pdz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2pdz256rmkz_vcvtuqq2pdz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PDZ256rmkz
+    %ymm0 = VCVTUQQ2PDZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2pdzrmkz_vcvtuqq2pdzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2pdzrmkz_vcvtuqq2pdzrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PDZrmkz
+    %zmm0 = VCVTUQQ2PDZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2psz128rmkz_vcvtuqq2psz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2psz128rmkz_vcvtuqq2psz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PSZ128rmkz
+    %xmm0 = VCVTUQQ2PSZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2psz256rmkz_vcvtuqq2psz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2psz256rmkz_vcvtuqq2psz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PSZ256rmkz
+    %xmm0 = VCVTUQQ2PSZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2pszrmkz_vcvtuqq2pszrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2pszrmkz_vcvtuqq2pszrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PSZrmkz
+    %ymm0 = VCVTUQQ2PSZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vdbpsadbwz128rmi_vdbpsadbwz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vdbpsadbwz128rmi_vdbpsadbwz128rri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VDBPSADBWZ128rmi
+    %xmm0 = VDBPSADBWZ128rri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vdbpsadbwz256rmi_vdbpsadbwz256rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vdbpsadbwz256rmi_vdbpsadbwz256rri_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VDBPSADBWZ256rmi
+    %ymm0 = VDBPSADBWZ256rri undef %ymm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vdbpsadbwzrmi_vdbpsadbwzrri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vdbpsadbwzrmi_vdbpsadbwzrri_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VDBPSADBWZrmi
+    %zmm0 = VDBPSADBWZrri undef %zmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vexp2pdmbkz_vexp2pdrbkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vexp2pdmbkz_vexp2pdrbkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VEXP2PDmbkz
+    %zmm0 = VEXP2PDrbkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vexp2pdmkz_vexp2pdrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vexp2pdmkz_vexp2pdrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VEXP2PDmkz
+    %zmm0 = VEXP2PDrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vexp2psmbkz_vexp2psrbkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vexp2psmbkz_vexp2psrbkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VEXP2PSmbkz
+    %zmm0 = VEXP2PSrbkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vexp2psmkz_vexp2psrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vexp2psmkz_vexp2psrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VEXP2PSmkz
+    %zmm0 = VEXP2PSrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vfpclasspdz128rmk_vfpclasspdz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm0', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasspdz128rmk_vfpclasspdz128rrk_test
+    %2 = COPY %xmm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSPDZ128rmk
+    %k1 = VFPCLASSPDZ128rrk undef %k2, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclasspdz256rmk_vfpclasspdz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm0', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasspdz256rmk_vfpclasspdz256rrk_test
+    %2 = COPY %ymm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSPDZ256rmk
+    %k1 = VFPCLASSPDZ256rrk undef %k2, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclasspdzrmk_vfpclasspdzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm0', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasspdzrmk_vfpclasspdzrrk_test
+    %2 = COPY %zmm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSPDZrmk
+    %k1 = VFPCLASSPDZrrk undef %k2, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclasspsz128rmk_vfpclasspsz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm0', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasspsz128rmk_vfpclasspsz128rrk_test
+    %2 = COPY %xmm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSPSZ128rmk
+    %k1 = VFPCLASSPSZ128rrk undef %k2, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclasspsz256rmk_vfpclasspsz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm0', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasspsz256rmk_vfpclasspsz256rrk_test
+    %2 = COPY %ymm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSPSZ256rmk
+    %k1 = VFPCLASSPSZ256rrk undef %k2, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclasspszrmk_vfpclasspszrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm0', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasspszrmk_vfpclasspszrrk_test
+    %2 = COPY %zmm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSPSZrmk
+    %k1 = VFPCLASSPSZrrk undef %k2, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclasssdrmk_vfpclasssdrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm0', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclasssdrmk_vfpclasssdrrk_test
+    %2 = COPY %xmm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSSDrmk
+    %k1 = VFPCLASSSDrrk undef %k2, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vfpclassssrmk_vfpclassssrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm0', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm0
+
+    ; CHECK-LABEL: name:      stack_fold_vfpclassssrmk_vfpclassssrrk_test
+    %2 = COPY %xmm0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFPCLASSSSrmk
+    %k1 = VFPCLASSSSrrk undef %k2, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vinsertf32x8zrm_vinsertf32x8zrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vinsertf32x8zrm_vinsertf32x8zrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTF32x8Zrm
+    %zmm0 = VINSERTF32x8Zrr undef %zmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vinsertf64x2z256rm_vinsertf64x2z256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vinsertf64x2z256rm_vinsertf64x2z256rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTF64x2Z256rm
+    %ymm0 = VINSERTF64x2Z256rr undef %ymm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vinsertf64x2zrm_vinsertf64x2zrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vinsertf64x2zrm_vinsertf64x2zrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTF64x2Zrm
+    %zmm0 = VINSERTF64x2Zrr undef %zmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vinserti32x8zrm_vinserti32x8zrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vinserti32x8zrm_vinserti32x8zrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTI32x8Zrm
+    %zmm0 = VINSERTI32x8Zrr undef %zmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vinserti64x2z256rm_vinserti64x2z256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vinserti64x2z256rm_vinserti64x2z256rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTI64x2Z256rm
+    %ymm0 = VINSERTI64x2Z256rr undef %ymm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vinserti64x2zrm_vinserti64x2zrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vinserti64x2zrm_vinserti64x2zrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTI64x2Zrm
+    %zmm0 = VINSERTI64x2Zrr undef %zmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu16z128rmkz_vmovdqu16z128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu16z128rmkz_vmovdqu16z128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU16Z128rmkz
+    %xmm0 = VMOVDQU16Z128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu16z256rmkz_vmovdqu16z256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu16z256rmkz_vmovdqu16z256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU16Z256rmkz
+    %ymm0 = VMOVDQU16Z256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu16zrmkz_vmovdqu16zrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu16zrmkz_vmovdqu16zrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU16Zrmkz
+    %zmm0 = VMOVDQU16Zrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu8z128rmkz_vmovdqu8z128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu8z128rmkz_vmovdqu8z128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU8Z128rmkz
+    %xmm0 = VMOVDQU8Z128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu8z256rmkz_vmovdqu8z256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu8z256rmkz_vmovdqu8z256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU8Z256rmkz
+    %ymm0 = VMOVDQU8Z256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu8zrmkz_vmovdqu8zrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu8zrmkz_vmovdqu8zrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU8Zrmkz
+    %zmm0 = VMOVDQU8Zrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vorpdz128rm_vorpdz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vorpdz128rm_vorpdz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPDZ128rm
+    %xmm0 = VORPDZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vorpdz256rm_vorpdz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vorpdz256rm_vorpdz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPDZ256rm
+    %ymm0 = VORPDZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vorpdzrm_vorpdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vorpdzrm_vorpdzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPDZrm
+    %zmm0 = VORPDZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vorpsz128rm_vorpsz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vorpsz128rm_vorpsz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPSZ128rm
+    %xmm0 = VORPSZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vorpsz256rm_vorpsz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vorpsz256rm_vorpsz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPSZ256rm
+    %ymm0 = VORPSZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vorpszrm_vorpszrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vorpszrm_vorpszrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPSZrm
+    %zmm0 = VORPSZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpabsbz128rmkz_vpabsbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpabsbz128rmkz_vpabsbz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSBZ128rmkz
+    %xmm0 = VPABSBZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpabsbz256rmkz_vpabsbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpabsbz256rmkz_vpabsbz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSBZ256rmkz
+    %ymm0 = VPABSBZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpabsbzrmkz_vpabsbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpabsbzrmkz_vpabsbzrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSBZrmkz
+    %zmm0 = VPABSBZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpabswz128rmkz_vpabswz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpabswz128rmkz_vpabswz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSWZ128rmkz
+    %xmm0 = VPABSWZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpabswz256rmkz_vpabswz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpabswz256rmkz_vpabswz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSWZ256rmkz
+    %ymm0 = VPABSWZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpabswzrmkz_vpabswzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpabswzrmkz_vpabswzrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSWZrmkz
+    %zmm0 = VPABSWZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpackssdwz128rm_vpackssdwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackssdwz128rm_vpackssdwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSDWZ128rm
+    %xmm0 = VPACKSSDWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpackssdwz256rm_vpackssdwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackssdwz256rm_vpackssdwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSDWZ256rm
+    %ymm0 = VPACKSSDWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpackssdwzrm_vpackssdwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackssdwzrm_vpackssdwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSDWZrm
+    %zmm0 = VPACKSSDWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpacksswbz128rm_vpacksswbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpacksswbz128rm_vpacksswbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSWBZ128rm
+    %xmm0 = VPACKSSWBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpacksswbz256rm_vpacksswbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpacksswbz256rm_vpacksswbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSWBZ256rm
+    %ymm0 = VPACKSSWBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpacksswbzrm_vpacksswbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpacksswbzrm_vpacksswbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSWBZrm
+    %zmm0 = VPACKSSWBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpackusdwz128rm_vpackusdwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackusdwz128rm_vpackusdwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSDWZ128rm
+    %xmm0 = VPACKUSDWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpackusdwz256rm_vpackusdwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackusdwz256rm_vpackusdwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSDWZ256rm
+    %ymm0 = VPACKUSDWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpackusdwzrm_vpackusdwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackusdwzrm_vpackusdwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSDWZrm
+    %zmm0 = VPACKUSDWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpackuswbz128rm_vpackuswbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackuswbz128rm_vpackuswbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSWBZ128rm
+    %xmm0 = VPACKUSWBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpackuswbz256rm_vpackuswbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackuswbz256rm_vpackuswbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSWBZ256rm
+    %ymm0 = VPACKUSWBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpackuswbzrm_vpackuswbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackuswbzrm_vpackuswbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSWBZrm
+    %zmm0 = VPACKUSWBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddbz128rm_vpaddbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddbz128rm_vpaddbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDBZ128rm
+    %xmm0 = VPADDBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddbz256rm_vpaddbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddbz256rm_vpaddbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDBZ256rm
+    %ymm0 = VPADDBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddbzrm_vpaddbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddbzrm_vpaddbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDBZrm
+    %zmm0 = VPADDBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddsbz128rm_vpaddsbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddsbz128rm_vpaddsbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSBZ128rm
+    %xmm0 = VPADDSBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddsbz256rm_vpaddsbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddsbz256rm_vpaddsbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSBZ256rm
+    %ymm0 = VPADDSBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddsbzrm_vpaddsbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddsbzrm_vpaddsbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSBZrm
+    %zmm0 = VPADDSBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddswz128rm_vpaddswz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddswz128rm_vpaddswz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSWZ128rm
+    %xmm0 = VPADDSWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddswz256rm_vpaddswz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddswz256rm_vpaddswz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSWZ256rm
+    %ymm0 = VPADDSWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddswzrm_vpaddswzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddswzrm_vpaddswzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSWZrm
+    %zmm0 = VPADDSWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddusbz128rm_vpaddusbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddusbz128rm_vpaddusbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSBZ128rm
+    %xmm0 = VPADDUSBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddusbz256rm_vpaddusbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddusbz256rm_vpaddusbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSBZ256rm
+    %ymm0 = VPADDUSBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddusbzrm_vpaddusbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddusbzrm_vpaddusbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSBZrm
+    %zmm0 = VPADDUSBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpadduswz128rm_vpadduswz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpadduswz128rm_vpadduswz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSWZ128rm
+    %xmm0 = VPADDUSWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpadduswz256rm_vpadduswz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpadduswz256rm_vpadduswz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSWZ256rm
+    %ymm0 = VPADDUSWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpadduswzrm_vpadduswzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpadduswzrm_vpadduswzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSWZrm
+    %zmm0 = VPADDUSWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddwz128rm_vpaddwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddwz128rm_vpaddwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDWZ128rm
+    %xmm0 = VPADDWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddwz256rm_vpaddwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddwz256rm_vpaddwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDWZ256rm
+    %ymm0 = VPADDWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpaddwzrm_vpaddwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddwzrm_vpaddwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDWZrm
+    %zmm0 = VPADDWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpalignrz128rmi_vpalignrz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpalignrz128rmi_vpalignrz128rri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPALIGNRZ128rmi
+    %xmm0 = VPALIGNRZ128rri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpalignrz256rmi_vpalignrz256rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpalignrz256rmi_vpalignrz256rri_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPALIGNRZ256rmi
+    %ymm0 = VPALIGNRZ256rri undef %ymm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpalignrzrmi_vpalignrzrri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpalignrzrmi_vpalignrzrri_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPALIGNRZrmi
+    %zmm0 = VPALIGNRZrri undef %zmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpavgbz128rm_vpavgbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgbz128rm_vpavgbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGBZ128rm
+    %xmm0 = VPAVGBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpavgbz256rm_vpavgbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgbz256rm_vpavgbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGBZ256rm
+    %ymm0 = VPAVGBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpavgbzrm_vpavgbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgbzrm_vpavgbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGBZrm
+    %zmm0 = VPAVGBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpavgwz128rm_vpavgwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgwz128rm_vpavgwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGWZ128rm
+    %xmm0 = VPAVGWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpavgwz256rm_vpavgwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgwz256rm_vpavgwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGWZ256rm
+    %ymm0 = VPAVGWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpavgwzrm_vpavgwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgwzrm_vpavgwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGWZrm
+    %zmm0 = VPAVGWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpblendmbz128rm_vpblendmbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmbz128rm_vpblendmbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMBZ128rm
+    %xmm0 = VPBLENDMBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpblendmbz256rm_vpblendmbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmbz256rm_vpblendmbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMBZ256rm
+    %ymm0 = VPBLENDMBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpblendmbzrm_vpblendmbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmbzrm_vpblendmbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMBZrm
+    %zmm0 = VPBLENDMBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpblendmwz128rm_vpblendmwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmwz128rm_vpblendmwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMWZ128rm
+    %xmm0 = VPBLENDMWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpblendmwz256rm_vpblendmwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmwz256rm_vpblendmwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMWZ256rm
+    %ymm0 = VPBLENDMWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpblendmwzrm_vpblendmwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmwzrm_vpblendmwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMWZrm
+    %zmm0 = VPBLENDMWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastbz128mkz_vpbroadcastbz128rkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastbz128mkz_vpbroadcastbz128rkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTBZ128mkz
+    %xmm0 = VPBROADCASTBZ128rkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastbz256mkz_vpbroadcastbz256rkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastbz256mkz_vpbroadcastbz256rkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTBZ256mkz
+    %ymm0 = VPBROADCASTBZ256rkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastbzmkz_vpbroadcastbzrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastbzmkz_vpbroadcastbzrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTBZmkz
+    %zmm0 = VPBROADCASTBZrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastwz128mkz_vpbroadcastwz128rkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastwz128mkz_vpbroadcastwz128rkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTWZ128mkz
+    %xmm0 = VPBROADCASTWZ128rkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastwz256mkz_vpbroadcastwz256rkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastwz256mkz_vpbroadcastwz256rkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTWZ256mkz
+    %ymm0 = VPBROADCASTWZ256rkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastwzmkz_vpbroadcastwzrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastwzmkz_vpbroadcastwzrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTWZmkz
+    %zmm0 = VPBROADCASTWZrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpcmpbz128rmi_vpcmpbz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpbz128rmi_vpcmpbz128rri_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPBZ128rmi
+    %k1 = VPCMPBZ128rri undef %xmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpbz128rmi_alt_vpcmpbz128rri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpbz128rmi_alt_vpcmpbz128rri_alt_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPBZ128rmi_alt
+    %k1 = VPCMPBZ128rri_alt undef %xmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpbz256rmi_vpcmpbz256rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpbz256rmi_vpcmpbz256rri_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPBZ256rmi
+    %k1 = VPCMPBZ256rri undef %ymm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpbz256rmi_alt_vpcmpbz256rri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpbz256rmi_alt_vpcmpbz256rri_alt_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPBZ256rmi_alt
+    %k1 = VPCMPBZ256rri_alt undef %ymm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpbzrmi_vpcmpbzrri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpbzrmi_vpcmpbzrri_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPBZrmi
+    %k1 = VPCMPBZrri undef %zmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpbzrmi_alt_vpcmpbzrri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpbzrmi_alt_vpcmpbzrri_alt_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPBZrmi_alt
+    %k1 = VPCMPBZrri_alt undef %zmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpeqbz128rm_vpcmpeqbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpeqbz128rm_vpcmpeqbz128rr_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPEQBZ128rm
+    %k1 = VPCMPEQBZ128rr undef %xmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vpcmpeqbz256rm_vpcmpeqbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpeqbz256rm_vpcmpeqbz256rr_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPEQBZ256rm
+    %k1 = VPCMPEQBZ256rr undef %ymm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vpcmpeqbzrm_vpcmpeqbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpeqbzrm_vpcmpeqbzrr_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPEQBZrm
+    %k1 = VPCMPEQBZrr undef %zmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vpcmpeqwz128rm_vpcmpeqwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpeqwz128rm_vpcmpeqwz128rr_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPEQWZ128rm
+    %k1 = VPCMPEQWZ128rr undef %xmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vpcmpeqwz256rm_vpcmpeqwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpeqwz256rm_vpcmpeqwz256rr_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPEQWZ256rm
+    %k1 = VPCMPEQWZ256rr undef %ymm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vpcmpeqwzrm_vpcmpeqwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpeqwzrm_vpcmpeqwzrr_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPEQWZrm
+    %k1 = VPCMPEQWZrr undef %zmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vpcmpgtbz128rm_vpcmpgtbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpgtbz128rm_vpcmpgtbz128rr_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPGTBZ128rm
+    %k1 = VPCMPGTBZ128rr undef %xmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vpcmpgtbz256rm_vpcmpgtbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpgtbz256rm_vpcmpgtbz256rr_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPGTBZ256rm
+    %k1 = VPCMPGTBZ256rr undef %ymm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vpcmpgtbzrm_vpcmpgtbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpgtbzrm_vpcmpgtbzrr_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPGTBZrm
+    %k1 = VPCMPGTBZrr undef %zmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vpcmpgtwz128rm_vpcmpgtwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpgtwz128rm_vpcmpgtwz128rr_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPGTWZ128rm
+    %k1 = VPCMPGTWZ128rr undef %xmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vpcmpgtwz256rm_vpcmpgtwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpgtwz256rm_vpcmpgtwz256rr_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPGTWZ256rm
+    %k1 = VPCMPGTWZ256rr undef %ymm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vpcmpgtwzrm_vpcmpgtwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpgtwzrm_vpcmpgtwzrr_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPGTWZrm
+    %k1 = VPCMPGTWZrr undef %zmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vpcmpubz128rmi_vpcmpubz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpubz128rmi_vpcmpubz128rri_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUBZ128rmi
+    %k1 = VPCMPUBZ128rri undef %xmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpubz128rmi_alt_vpcmpubz128rri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpubz128rmi_alt_vpcmpubz128rri_alt_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUBZ128rmi_alt
+    %k1 = VPCMPUBZ128rri_alt undef %xmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpubz256rmi_vpcmpubz256rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpubz256rmi_vpcmpubz256rri_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUBZ256rmi
+    %k1 = VPCMPUBZ256rri undef %ymm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpubz256rmi_alt_vpcmpubz256rri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpubz256rmi_alt_vpcmpubz256rri_alt_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUBZ256rmi_alt
+    %k1 = VPCMPUBZ256rri_alt undef %ymm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpubzrmi_vpcmpubzrri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpubzrmi_vpcmpubzrri_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUBZrmi
+    %k1 = VPCMPUBZrri undef %zmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpubzrmi_alt_vpcmpubzrri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpubzrmi_alt_vpcmpubzrri_alt_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUBZrmi_alt
+    %k1 = VPCMPUBZrri_alt undef %zmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpuwz128rmi_vpcmpuwz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpuwz128rmi_vpcmpuwz128rri_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUWZ128rmi
+    %k1 = VPCMPUWZ128rri undef %xmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpuwz128rmi_alt_vpcmpuwz128rri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpuwz128rmi_alt_vpcmpuwz128rri_alt_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUWZ128rmi_alt
+    %k1 = VPCMPUWZ128rri_alt undef %xmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpuwz256rmi_vpcmpuwz256rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpuwz256rmi_vpcmpuwz256rri_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUWZ256rmi
+    %k1 = VPCMPUWZ256rri undef %ymm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpuwz256rmi_alt_vpcmpuwz256rri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpuwz256rmi_alt_vpcmpuwz256rri_alt_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUWZ256rmi_alt
+    %k1 = VPCMPUWZ256rri_alt undef %ymm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpuwzrmi_vpcmpuwzrri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpuwzrmi_vpcmpuwzrri_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUWZrmi
+    %k1 = VPCMPUWZrri undef %zmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpuwzrmi_alt_vpcmpuwzrri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpuwzrmi_alt_vpcmpuwzrri_alt_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUWZrmi_alt
+    %k1 = VPCMPUWZrri_alt undef %zmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpwz128rmi_vpcmpwz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpwz128rmi_vpcmpwz128rri_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPWZ128rmi
+    %k1 = VPCMPWZ128rri undef %xmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpwz128rmi_alt_vpcmpwz128rri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpwz128rmi_alt_vpcmpwz128rri_alt_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPWZ128rmi_alt
+    %k1 = VPCMPWZ128rri_alt undef %xmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpwz256rmi_vpcmpwz256rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpwz256rmi_vpcmpwz256rri_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPWZ256rmi
+    %k1 = VPCMPWZ256rri undef %ymm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpwz256rmi_alt_vpcmpwz256rri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpwz256rmi_alt_vpcmpwz256rri_alt_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPWZ256rmi_alt
+    %k1 = VPCMPWZ256rri_alt undef %ymm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpwzrmi_vpcmpwzrri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpwzrmi_vpcmpwzrri_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPWZrmi
+    %k1 = VPCMPWZrri undef %zmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpwzrmi_alt_vpcmpwzrri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpwzrmi_alt_vpcmpwzrri_alt_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPWZrmi_alt
+    %k1 = VPCMPWZrri_alt undef %zmm0, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpconflictdz128rmkz_vpconflictdz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictdz128rmkz_vpconflictdz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTDZ128rmkz
+    %xmm0 = VPCONFLICTDZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpconflictdz256rmkz_vpconflictdz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictdz256rmkz_vpconflictdz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTDZ256rmkz
+    %ymm0 = VPCONFLICTDZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpconflictdzrmkz_vpconflictdzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictdzrmkz_vpconflictdzrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTDZrmkz
+    %zmm0 = VPCONFLICTDZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpconflictqz128rmkz_vpconflictqz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictqz128rmkz_vpconflictqz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTQZ128rmkz
+    %xmm0 = VPCONFLICTQZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpconflictqz256rmkz_vpconflictqz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictqz256rmkz_vpconflictqz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTQZ256rmkz
+    %ymm0 = VPCONFLICTQZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpconflictqzrmkz_vpconflictqzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictqzrmkz_vpconflictqzrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTQZrmkz
+    %zmm0 = VPCONFLICTQZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpermbz128rm_vpermbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermbz128rm_vpermbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMBZ128rm
+    %xmm0 = VPERMBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpermbz256rm_vpermbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermbz256rm_vpermbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMBZ256rm
+    %ymm0 = VPERMBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpermbzrm_vpermbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermbzrm_vpermbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMBZrm
+    %zmm0 = VPERMBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpermwz128rm_vpermwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermwz128rm_vpermwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMWZ128rm
+    %xmm0 = VPERMWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpermwz256rm_vpermwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermwz256rm_vpermwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMWZ256rm
+    %ymm0 = VPERMWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpermwzrm_vpermwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermwzrm_vpermwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMWZrm
+    %zmm0 = VPERMWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpinsrbzrm_vpinsrbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_vpinsrbzrm_vpinsrbzrr_test
+    %2 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: VPINSRBZrm
+    %xmm0 = VPINSRBZrr undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpinsrdzrm_vpinsrdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_vpinsrdzrm_vpinsrdzrr_test
+    %2 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: VPINSRDZrm
+    %xmm0 = VPINSRDZrr undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpinsrqzrm_vpinsrqzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_vpinsrqzrm_vpinsrqzrr_test
+    %2 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: VPINSRQZrm
+    %xmm0 = VPINSRQZrr undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpinsrwzrm_vpinsrwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_vpinsrwzrm_vpinsrwzrr_test
+    %2 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: VPINSRWZrm
+    %xmm0 = VPINSRWZrr undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vplzcntdz128rmkz_vplzcntdz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntdz128rmkz_vplzcntdz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTDZ128rmkz
+    %xmm0 = VPLZCNTDZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vplzcntdz256rmkz_vplzcntdz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntdz256rmkz_vplzcntdz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTDZ256rmkz
+    %ymm0 = VPLZCNTDZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vplzcntdzrmkz_vplzcntdzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntdzrmkz_vplzcntdzrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTDZrmkz
+    %zmm0 = VPLZCNTDZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vplzcntqz128rmkz_vplzcntqz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntqz128rmkz_vplzcntqz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTQZ128rmkz
+    %xmm0 = VPLZCNTQZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vplzcntqz256rmkz_vplzcntqz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntqz256rmkz_vplzcntqz256rrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTQZ256rmkz
+    %ymm0 = VPLZCNTQZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vplzcntqzrmkz_vplzcntqzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntqzrmkz_vplzcntqzrrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTQZrmkz
+    %zmm0 = VPLZCNTQZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaddubswz128rm_vpmaddubswz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddubswz128rm_vpmaddubswz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDUBSWZ128rm
+    %xmm0 = VPMADDUBSWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaddubswz256rm_vpmaddubswz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddubswz256rm_vpmaddubswz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDUBSWZ256rm
+    %ymm0 = VPMADDUBSWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaddubswzrm_vpmaddubswzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddubswzrm_vpmaddubswzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDUBSWZrm
+    %zmm0 = VPMADDUBSWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaddwdz128rm_vpmaddwdz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddwdz128rm_vpmaddwdz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDWDZ128rm
+    %xmm0 = VPMADDWDZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaddwdz256rm_vpmaddwdz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddwdz256rm_vpmaddwdz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDWDZ256rm
+    %ymm0 = VPMADDWDZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaddwdzrm_vpmaddwdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddwdzrm_vpmaddwdzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDWDZrm
+    %zmm0 = VPMADDWDZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaxsbz128rm_vpmaxsbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxsbz128rm_vpmaxsbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSBZ128rm
+    %xmm0 = VPMAXSBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaxsbz256rm_vpmaxsbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxsbz256rm_vpmaxsbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSBZ256rm
+    %ymm0 = VPMAXSBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaxsbzrm_vpmaxsbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxsbzrm_vpmaxsbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSBZrm
+    %zmm0 = VPMAXSBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaxswz128rm_vpmaxswz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxswz128rm_vpmaxswz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSWZ128rm
+    %xmm0 = VPMAXSWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaxswz256rm_vpmaxswz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxswz256rm_vpmaxswz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSWZ256rm
+    %ymm0 = VPMAXSWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaxswzrm_vpmaxswzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxswzrm_vpmaxswzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSWZrm
+    %zmm0 = VPMAXSWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaxubz128rm_vpmaxubz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxubz128rm_vpmaxubz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUBZ128rm
+    %xmm0 = VPMAXUBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaxubz256rm_vpmaxubz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxubz256rm_vpmaxubz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUBZ256rm
+    %ymm0 = VPMAXUBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaxubzrm_vpmaxubzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxubzrm_vpmaxubzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUBZrm
+    %zmm0 = VPMAXUBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaxuwz128rm_vpmaxuwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxuwz128rm_vpmaxuwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUWZ128rm
+    %xmm0 = VPMAXUWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaxuwz256rm_vpmaxuwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxuwz256rm_vpmaxuwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUWZ256rm
+    %ymm0 = VPMAXUWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmaxuwzrm_vpmaxuwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxuwzrm_vpmaxuwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUWZrm
+    %zmm0 = VPMAXUWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpminsbz128rm_vpminsbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminsbz128rm_vpminsbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSBZ128rm
+    %xmm0 = VPMINSBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpminsbz256rm_vpminsbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminsbz256rm_vpminsbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSBZ256rm
+    %ymm0 = VPMINSBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpminsbzrm_vpminsbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminsbzrm_vpminsbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSBZrm
+    %zmm0 = VPMINSBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpminswz128rm_vpminswz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminswz128rm_vpminswz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSWZ128rm
+    %xmm0 = VPMINSWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpminswz256rm_vpminswz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminswz256rm_vpminswz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSWZ256rm
+    %ymm0 = VPMINSWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpminswzrm_vpminswzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminswzrm_vpminswzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSWZrm
+    %zmm0 = VPMINSWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpminubz128rm_vpminubz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminubz128rm_vpminubz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUBZ128rm
+    %xmm0 = VPMINUBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpminubz256rm_vpminubz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminubz256rm_vpminubz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUBZ256rm
+    %ymm0 = VPMINUBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpminubzrm_vpminubzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminubzrm_vpminubzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUBZrm
+    %zmm0 = VPMINUBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpminuwz128rm_vpminuwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminuwz128rm_vpminuwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUWZ128rm
+    %xmm0 = VPMINUWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpminuwz256rm_vpminuwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminuwz256rm_vpminuwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUWZ256rm
+    %ymm0 = VPMINUWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpminuwzrm_vpminuwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminuwzrm_vpminuwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUWZrm
+    %zmm0 = VPMINUWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmovsxbwz128rmkz_vpmovsxbwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovsxbwz128rmkz_vpmovsxbwz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVSXBWZ128rmkz
+    %xmm0 = VPMOVSXBWZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmovsxbwz256rmkz_vpmovsxbwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovsxbwz256rmkz_vpmovsxbwz256rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVSXBWZ256rmkz
+    %ymm0 = VPMOVSXBWZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmovsxbwzrmkz_vpmovsxbwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovsxbwzrmkz_vpmovsxbwzrrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVSXBWZrmkz
+    %zmm0 = VPMOVSXBWZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmovzxbwz128rmkz_vpmovzxbwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovzxbwz128rmkz_vpmovzxbwz128rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVZXBWZ128rmkz
+    %xmm0 = VPMOVZXBWZ128rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmovzxbwz256rmkz_vpmovzxbwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovzxbwz256rmkz_vpmovzxbwz256rrkz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVZXBWZ256rmkz
+    %ymm0 = VPMOVZXBWZ256rrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmovzxbwzrmkz_vpmovzxbwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovzxbwzrmkz_vpmovzxbwzrrkz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVZXBWZrmkz
+    %zmm0 = VPMOVZXBWZrrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmulhrswz128rm_vpmulhrswz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhrswz128rm_vpmulhrswz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHRSWZ128rm
+    %xmm0 = VPMULHRSWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmulhrswz256rm_vpmulhrswz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhrswz256rm_vpmulhrswz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHRSWZ256rm
+    %ymm0 = VPMULHRSWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmulhrswzrm_vpmulhrswzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhrswzrm_vpmulhrswzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHRSWZrm
+    %zmm0 = VPMULHRSWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmulhuwz128rm_vpmulhuwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhuwz128rm_vpmulhuwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHUWZ128rm
+    %xmm0 = VPMULHUWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmulhuwz256rm_vpmulhuwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhuwz256rm_vpmulhuwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHUWZ256rm
+    %ymm0 = VPMULHUWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmulhuwzrm_vpmulhuwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhuwzrm_vpmulhuwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHUWZrm
+    %zmm0 = VPMULHUWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmulhwz128rm_vpmulhwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhwz128rm_vpmulhwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHWZ128rm
+    %xmm0 = VPMULHWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmulhwz256rm_vpmulhwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhwz256rm_vpmulhwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHWZ256rm
+    %ymm0 = VPMULHWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmulhwzrm_vpmulhwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhwzrm_vpmulhwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHWZrm
+    %zmm0 = VPMULHWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmullqz128rm_vpmullqz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullqz128rm_vpmullqz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLQZ128rm
+    %xmm0 = VPMULLQZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmullqz256rm_vpmullqz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullqz256rm_vpmullqz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLQZ256rm
+    %ymm0 = VPMULLQZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmullqzrm_vpmullqzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullqzrm_vpmullqzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLQZrm
+    %zmm0 = VPMULLQZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmullwz128rm_vpmullwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullwz128rm_vpmullwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLWZ128rm
+    %xmm0 = VPMULLWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmullwz256rm_vpmullwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullwz256rm_vpmullwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLWZ256rm
+    %ymm0 = VPMULLWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmullwzrm_vpmullwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullwzrm_vpmullwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLWZrm
+    %zmm0 = VPMULLWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmultishiftqbz128rm_vpmultishiftqbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmultishiftqbz128rm_vpmultishiftqbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULTISHIFTQBZ128rm
+    %xmm0 = VPMULTISHIFTQBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmultishiftqbz256rm_vpmultishiftqbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmultishiftqbz256rm_vpmultishiftqbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULTISHIFTQBZ256rm
+    %ymm0 = VPMULTISHIFTQBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpmultishiftqbzrm_vpmultishiftqbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmultishiftqbzrm_vpmultishiftqbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULTISHIFTQBZrm
+    %zmm0 = VPMULTISHIFTQBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsadbwz128rm_vpsadbwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsadbwz128rm_vpsadbwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSADBWZ128rm
+    %xmm0 = VPSADBWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsadbwz256rm_vpsadbwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsadbwz256rm_vpsadbwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSADBWZ256rm
+    %ymm0 = VPSADBWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsadbwz512rm_vpsadbwz512rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsadbwz512rm_vpsadbwz512rr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSADBWZ512rm
+    %zmm0 = VPSADBWZ512rr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpshufbz128rm_vpshufbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufbz128rm_vpshufbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFBZ128rm
+    %xmm0 = VPSHUFBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpshufbz256rm_vpshufbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufbz256rm_vpshufbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFBZ256rm
+    %ymm0 = VPSHUFBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpshufbzrm_vpshufbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufbzrm_vpshufbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFBZrm
+    %zmm0 = VPSHUFBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpshufhwz128mikz_vpshufhwz128rikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufhwz128mikz_vpshufhwz128rikz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFHWZ128mikz
+    %xmm0 = VPSHUFHWZ128rikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshufhwz256mikz_vpshufhwz256rikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufhwz256mikz_vpshufhwz256rikz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFHWZ256mikz
+    %ymm0 = VPSHUFHWZ256rikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshufhwzmikz_vpshufhwzrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufhwzmikz_vpshufhwzrikz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFHWZmikz
+    %zmm0 = VPSHUFHWZrikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshuflwz128mikz_vpshuflwz128rikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshuflwz128mikz_vpshuflwz128rikz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFLWZ128mikz
+    %xmm0 = VPSHUFLWZ128rikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshuflwz256mikz_vpshuflwz256rikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshuflwz256mikz_vpshuflwz256rikz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFLWZ256mikz
+    %ymm0 = VPSHUFLWZ256rikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshuflwzmikz_vpshuflwzrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshuflwzmikz_vpshuflwzrikz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFLWZmikz
+    %zmm0 = VPSHUFLWZrikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsllvwz128rm_vpsllvwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllvwz128rm_vpsllvwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLVWZ128rm
+    %xmm0 = VPSLLVWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsllvwz256rm_vpsllvwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllvwz256rm_vpsllvwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLVWZ256rm
+    %ymm0 = VPSLLVWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsllvwzrm_vpsllvwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllvwzrm_vpsllvwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLVWZrm
+    %zmm0 = VPSLLVWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsllwz128mikz_vpsllwz128rikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwz128mikz_vpsllwz128rikz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZ128mikz
+    %xmm0 = VPSLLWZ128rikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsllwz128rm_vpsllwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwz128rm_vpsllwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZ128rm
+    %xmm0 = VPSLLWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsllwz256mikz_vpsllwz256rikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwz256mikz_vpsllwz256rikz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZ256mikz
+    %ymm0 = VPSLLWZ256rikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsllwz256rm_vpsllwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwz256rm_vpsllwz256rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZ256rm
+    %ymm0 = VPSLLWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsllwzmikz_vpsllwzrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwzmikz_vpsllwzrikz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZmikz
+    %zmm0 = VPSLLWZrikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsllwzrm_vpsllwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwzrm_vpsllwzrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZrm
+    %zmm0 = VPSLLWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsravwz128rm_vpsravwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsravwz128rm_vpsravwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAVWZ128rm
+    %xmm0 = VPSRAVWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsravwz256rm_vpsravwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsravwz256rm_vpsravwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAVWZ256rm
+    %ymm0 = VPSRAVWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsravwzrm_vpsravwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsravwzrm_vpsravwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAVWZrm
+    %zmm0 = VPSRAVWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsrawz128mikz_vpsrawz128rikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawz128mikz_vpsrawz128rikz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZ128mikz
+    %xmm0 = VPSRAWZ128rikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrawz128rm_vpsrawz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawz128rm_vpsrawz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZ128rm
+    %xmm0 = VPSRAWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsrawz256mikz_vpsrawz256rikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawz256mikz_vpsrawz256rikz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZ256mikz
+    %ymm0 = VPSRAWZ256rikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrawz256rm_vpsrawz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawz256rm_vpsrawz256rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZ256rm
+    %ymm0 = VPSRAWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsrawzmikz_vpsrawzrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawzmikz_vpsrawzrikz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZmikz
+    %zmm0 = VPSRAWZrikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrawzrm_vpsrawzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawzrm_vpsrawzrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZrm
+    %zmm0 = VPSRAWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsrlvwz128rm_vpsrlvwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlvwz128rm_vpsrlvwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLVWZ128rm
+    %xmm0 = VPSRLVWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsrlvwz256rm_vpsrlvwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlvwz256rm_vpsrlvwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLVWZ256rm
+    %ymm0 = VPSRLVWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsrlvwzrm_vpsrlvwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlvwzrm_vpsrlvwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLVWZrm
+    %zmm0 = VPSRLVWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwz128mikz_vpsrlwz128rikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwz128mikz_vpsrlwz128rikz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZ128mikz
+    %xmm0 = VPSRLWZ128rikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwz128rm_vpsrlwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwz128rm_vpsrlwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZ128rm
+    %xmm0 = VPSRLWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwz256mikz_vpsrlwz256rikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwz256mikz_vpsrlwz256rikz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZ256mikz
+    %ymm0 = VPSRLWZ256rikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwz256rm_vpsrlwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwz256rm_vpsrlwz256rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZ256rm
+    %ymm0 = VPSRLWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwzmikz_vpsrlwzrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwzmikz_vpsrlwzrikz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZmikz
+    %zmm0 = VPSRLWZrikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwzrm_vpsrlwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwzrm_vpsrlwzrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZrm
+    %zmm0 = VPSRLWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubbz128rm_vpsubbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubbz128rm_vpsubbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBBZ128rm
+    %xmm0 = VPSUBBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubbz256rm_vpsubbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubbz256rm_vpsubbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBBZ256rm
+    %ymm0 = VPSUBBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubbzrm_vpsubbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubbzrm_vpsubbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBBZrm
+    %zmm0 = VPSUBBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubsbz128rm_vpsubsbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubsbz128rm_vpsubsbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSBZ128rm
+    %xmm0 = VPSUBSBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubsbz256rm_vpsubsbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubsbz256rm_vpsubsbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSBZ256rm
+    %ymm0 = VPSUBSBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubsbzrm_vpsubsbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubsbzrm_vpsubsbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSBZrm
+    %zmm0 = VPSUBSBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubswz128rm_vpsubswz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubswz128rm_vpsubswz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSWZ128rm
+    %xmm0 = VPSUBSWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubswz256rm_vpsubswz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubswz256rm_vpsubswz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSWZ256rm
+    %ymm0 = VPSUBSWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubswzrm_vpsubswzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubswzrm_vpsubswzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSWZrm
+    %zmm0 = VPSUBSWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubusbz128rm_vpsubusbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubusbz128rm_vpsubusbz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSBZ128rm
+    %xmm0 = VPSUBUSBZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubusbz256rm_vpsubusbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubusbz256rm_vpsubusbz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSBZ256rm
+    %ymm0 = VPSUBUSBZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubusbzrm_vpsubusbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubusbzrm_vpsubusbzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSBZrm
+    %zmm0 = VPSUBUSBZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubuswz128rm_vpsubuswz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubuswz128rm_vpsubuswz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSWZ128rm
+    %xmm0 = VPSUBUSWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubuswz256rm_vpsubuswz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubuswz256rm_vpsubuswz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSWZ256rm
+    %ymm0 = VPSUBUSWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubuswzrm_vpsubuswzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubuswzrm_vpsubuswzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSWZrm
+    %zmm0 = VPSUBUSWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubwz128rm_vpsubwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubwz128rm_vpsubwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBWZ128rm
+    %xmm0 = VPSUBWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubwz256rm_vpsubwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubwz256rm_vpsubwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBWZ256rm
+    %ymm0 = VPSUBWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpsubwzrm_vpsubwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubwzrm_vpsubwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBWZrm
+    %zmm0 = VPSUBWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vptestmbz128rm_vptestmbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestmbz128rm_vptestmbz128rr_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTMBZ128rm
+    %k1 = VPTESTMBZ128rr undef %xmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vptestmbz256rm_vptestmbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestmbz256rm_vptestmbz256rr_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTMBZ256rm
+    %k1 = VPTESTMBZ256rr undef %ymm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vptestmbzrm_vptestmbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestmbzrm_vptestmbzrr_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTMBZrm
+    %k1 = VPTESTMBZrr undef %zmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vptestmwz128rm_vptestmwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestmwz128rm_vptestmwz128rr_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTMWZ128rm
+    %k1 = VPTESTMWZ128rr undef %xmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vptestmwz256rm_vptestmwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestmwz256rm_vptestmwz256rr_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTMWZ256rm
+    %k1 = VPTESTMWZ256rr undef %ymm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vptestmwzrm_vptestmwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestmwzrm_vptestmwzrr_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTMWZrm
+    %k1 = VPTESTMWZrr undef %zmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vptestnmbz128rm_vptestnmbz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestnmbz128rm_vptestnmbz128rr_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTNMBZ128rm
+    %k1 = VPTESTNMBZ128rr undef %xmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vptestnmbz256rm_vptestnmbz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestnmbz256rm_vptestnmbz256rr_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTNMBZ256rm
+    %k1 = VPTESTNMBZ256rr undef %ymm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vptestnmbzrm_vptestnmbzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestnmbzrm_vptestnmbzrr_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTNMBZrm
+    %k1 = VPTESTNMBZrr undef %zmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vptestnmwz128rm_vptestnmwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestnmwz128rm_vptestnmwz128rr_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTNMWZ128rm
+    %k1 = VPTESTNMWZ128rr undef %xmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vptestnmwz256rm_vptestnmwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestnmwz256rm_vptestnmwz256rr_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTNMWZ256rm
+    %k1 = VPTESTNMWZ256rr undef %ymm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vptestnmwzrm_vptestnmwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestnmwzrm_vptestnmwzrr_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTNMWZrm
+    %k1 = VPTESTNMWZrr undef %zmm0, %2
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhbwz128rm_vpunpckhbwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhbwz128rm_vpunpckhbwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHBWZ128rm
+    %xmm0 = VPUNPCKHBWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhbwz256rm_vpunpckhbwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhbwz256rm_vpunpckhbwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHBWZ256rm
+    %ymm0 = VPUNPCKHBWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhbwzrm_vpunpckhbwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhbwzrm_vpunpckhbwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHBWZrm
+    %zmm0 = VPUNPCKHBWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhwdz128rm_vpunpckhwdz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhwdz128rm_vpunpckhwdz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHWDZ128rm
+    %xmm0 = VPUNPCKHWDZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhwdz256rm_vpunpckhwdz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhwdz256rm_vpunpckhwdz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHWDZ256rm
+    %ymm0 = VPUNPCKHWDZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhwdzrm_vpunpckhwdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhwdzrm_vpunpckhwdzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHWDZrm
+    %zmm0 = VPUNPCKHWDZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklbwz128rm_vpunpcklbwz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklbwz128rm_vpunpcklbwz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLBWZ128rm
+    %xmm0 = VPUNPCKLBWZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklbwz256rm_vpunpcklbwz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklbwz256rm_vpunpcklbwz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLBWZ256rm
+    %ymm0 = VPUNPCKLBWZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklbwzrm_vpunpcklbwzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklbwzrm_vpunpcklbwzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLBWZrm
+    %zmm0 = VPUNPCKLBWZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklwdz128rm_vpunpcklwdz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklwdz128rm_vpunpcklwdz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLWDZ128rm
+    %xmm0 = VPUNPCKLWDZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklwdz256rm_vpunpcklwdz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklwdz256rm_vpunpcklwdz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLWDZ256rm
+    %ymm0 = VPUNPCKLWDZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklwdzrm_vpunpcklwdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklwdzrm_vpunpcklwdzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLWDZrm
+    %zmm0 = VPUNPCKLWDZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrangepdz128rmi_vrangepdz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepdz128rmi_vrangepdz128rri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPDZ128rmi
+    %xmm0 = VRANGEPDZ128rri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepdz256rmi_vrangepdz256rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepdz256rmi_vrangepdz256rri_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPDZ256rmi
+    %ymm0 = VRANGEPDZ256rri undef %ymm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepdzrmbi_vrangepdzrrib_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepdzrmbi_vrangepdzrrib_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPDZrmbi
+    %zmm0 = VRANGEPDZrrib undef %zmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepdzrmi_vrangepdzrri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepdzrmi_vrangepdzrri_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPDZrmi
+    %zmm0 = VRANGEPDZrri undef %zmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepsz128rmi_vrangepsz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepsz128rmi_vrangepsz128rri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPSZ128rmi
+    %xmm0 = VRANGEPSZ128rri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepsz256rmi_vrangepsz256rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepsz256rmi_vrangepsz256rri_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPSZ256rmi
+    %ymm0 = VRANGEPSZ256rri undef %ymm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepszrmbi_vrangepszrrib_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepszrmbi_vrangepszrrib_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPSZrmbi
+    %zmm0 = VRANGEPSZrrib undef %zmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepszrmi_vrangepszrri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepszrmi_vrangepszrri_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPSZrmi
+    %zmm0 = VRANGEPSZrri undef %zmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangesdz128rmi_vrangesdz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangesdz128rmi_vrangesdz128rri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGESDZ128rmi
+    %xmm0 = VRANGESDZ128rri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangessz128rmi_vrangessz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangessz128rmi_vrangessz128rri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGESSZ128rmi
+    %xmm0 = VRANGESSZ128rri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vrcp28pdmbkz_vrcp28pdrbkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28pdmbkz_vrcp28pdrbkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28PDmbkz
+    %zmm0 = VRCP28PDrbkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrcp28pdmkz_vrcp28pdrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28pdmkz_vrcp28pdrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28PDmkz
+    %zmm0 = VRCP28PDrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrcp28psmbkz_vrcp28psrbkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28psmbkz_vrcp28psrbkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28PSmbkz
+    %zmm0 = VRCP28PSrbkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrcp28psmkz_vrcp28psrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28psmkz_vrcp28psrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28PSmkz
+    %zmm0 = VRCP28PSrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrcp28sdm_vrcp28sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28sdm_vrcp28sdr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28SDm
+    %xmm0 = VRCP28SDr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrcp28ssm_vrcp28ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28ssm_vrcp28ssr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28SSm
+    %xmm0 = VRCP28SSr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vreducepdz128rmikz_vreducepdz128rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepdz128rmikz_vreducepdz128rrikz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPDZ128rmikz
+    %xmm0 = VREDUCEPDZ128rrikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepdz256rmikz_vreducepdz256rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepdz256rmikz_vreducepdz256rrikz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPDZ256rmikz
+    %ymm0 = VREDUCEPDZ256rrikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepdzrmbikz_vreducepdzrribkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepdzrmbikz_vreducepdzrribkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPDZrmbikz
+    %zmm0 = VREDUCEPDZrribkz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepdzrmikz_vreducepdzrrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepdzrmikz_vreducepdzrrikz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPDZrmikz
+    %zmm0 = VREDUCEPDZrrikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepsz128rmikz_vreducepsz128rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepsz128rmikz_vreducepsz128rrikz_test
+    %2 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPSZ128rmikz
+    %xmm0 = VREDUCEPSZ128rrikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepsz256rmikz_vreducepsz256rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepsz256rmikz_vreducepsz256rrikz_test
+    %2 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPSZ256rmikz
+    %ymm0 = VREDUCEPSZ256rrikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepszrmbikz_vreducepszrribkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepszrmbikz_vreducepszrribkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPSZrmbikz
+    %zmm0 = VREDUCEPSZrribkz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepszrmikz_vreducepszrrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepszrmikz_vreducepszrrikz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPSZrmikz
+    %zmm0 = VREDUCEPSZrrikz undef %k1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducesdz128rmi_vreducesdz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vreducesdz128rmi_vreducesdz128rri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCESDZ128rmi
+    %xmm0 = VREDUCESDZ128rri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducessz128rmi_vreducessz128rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vreducessz128rmi_vreducessz128rri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCESSZ128rmi
+    %xmm0 = VREDUCESSZ128rri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28pdmbkz_vrsqrt28pdrbkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28pdmbkz_vrsqrt28pdrbkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28PDmbkz
+    %zmm0 = VRSQRT28PDrbkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28pdmkz_vrsqrt28pdrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28pdmkz_vrsqrt28pdrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28PDmkz
+    %zmm0 = VRSQRT28PDrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28psmbkz_vrsqrt28psrbkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28psmbkz_vrsqrt28psrbkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28PSmbkz
+    %zmm0 = VRSQRT28PSrbkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28psmkz_vrsqrt28psrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28psmkz_vrsqrt28psrkz_test
+    %2 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28PSmkz
+    %zmm0 = VRSQRT28PSrkz undef %k1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28sdm_vrsqrt28sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28sdm_vrsqrt28sdr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28SDm
+    %xmm0 = VRSQRT28SDr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28ssm_vrsqrt28ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28ssm_vrsqrt28ssr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28SSm
+    %xmm0 = VRSQRT28SSr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vxorpdz128rm_vxorpdz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpdz128rm_vxorpdz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPDZ128rm
+    %xmm0 = VXORPDZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vxorpdz256rm_vxorpdz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpdz256rm_vxorpdz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPDZ256rm
+    %ymm0 = VXORPDZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vxorpdzrm_vxorpdzrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpdzrm_vxorpdzrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPDZrm
+    %zmm0 = VXORPDZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vxorpsz128rm_vxorpsz128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpsz128rm_vxorpsz128rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPSZ128rm
+    %xmm0 = VXORPSZ128rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vxorpsz256rm_vxorpsz256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpsz256rm_vxorpsz256rr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPSZ256rm
+    %ymm0 = VXORPSZ256rr undef %ymm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vxorpszrm_vxorpszrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpszrm_vxorpszrr_test
+    %2 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPSZrm
+    %zmm0 = VXORPSZrr undef %zmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vandnpdz128rmkz_vandnpdz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpdz128rmkz_vandnpdz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPDZ128rmkz
+    %xmm0 = VANDNPDZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vandnpdz256rmkz_vandnpdz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpdz256rmkz_vandnpdz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPDZ256rmkz
+    %ymm0 = VANDNPDZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vandnpdzrmkz_vandnpdzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpdzrmkz_vandnpdzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPDZrmkz
+    %zmm0 = VANDNPDZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vandnpsz128rmkz_vandnpsz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpsz128rmkz_vandnpsz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPSZ128rmkz
+    %xmm0 = VANDNPSZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vandnpsz256rmkz_vandnpsz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpsz256rmkz_vandnpsz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPSZ256rmkz
+    %ymm0 = VANDNPSZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vandnpszrmkz_vandnpszrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpszrmkz_vandnpszrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPSZrmkz
+    %zmm0 = VANDNPSZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vandpdz128rmkz_vandpdz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandpdz128rmkz_vandpdz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPDZ128rmkz
+    %xmm0 = VANDPDZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vandpdz256rmkz_vandpdz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandpdz256rmkz_vandpdz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPDZ256rmkz
+    %ymm0 = VANDPDZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vandpdzrmkz_vandpdzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandpdzrmkz_vandpdzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPDZrmkz
+    %zmm0 = VANDPDZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vandpsz128rmkz_vandpsz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandpsz128rmkz_vandpsz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPSZ128rmkz
+    %xmm0 = VANDPSZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vandpsz256rmkz_vandpsz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandpsz256rmkz_vandpsz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPSZ256rmkz
+    %ymm0 = VANDPSZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vandpszrmkz_vandpszrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vandpszrmkz_vandpszrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPSZrmkz
+    %zmm0 = VANDPSZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vbroadcastf32x2z256mk_vbroadcastf32x2z256rk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcastf32x2z256mk_vbroadcastf32x2z256rk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTF32X2Z256mk
+    %ymm0 = VBROADCASTF32X2Z256rk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vbroadcastf32x2zmk_vbroadcastf32x2zrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcastf32x2zmk_vbroadcastf32x2zrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTF32X2Zmk
+    %zmm0 = VBROADCASTF32X2Zrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vbroadcasti32x2z128mk_vbroadcasti32x2z128rk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcasti32x2z128mk_vbroadcasti32x2z128rk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTI32X2Z128mk
+    %xmm0 = VBROADCASTI32X2Z128rk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vbroadcasti32x2z256mk_vbroadcasti32x2z256rk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcasti32x2z256mk_vbroadcasti32x2z256rk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTI32X2Z256mk
+    %ymm0 = VBROADCASTI32X2Z256rk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vbroadcasti32x2zmk_vbroadcasti32x2zrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vbroadcasti32x2zmk_vbroadcasti32x2zrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VBROADCASTI32X2Zmk
+    %zmm0 = VBROADCASTI32X2Zrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2qqz128rmk_vcvtpd2qqz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2qqz128rmk_vcvtpd2qqz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2QQZ128rmk
+    %xmm0 = VCVTPD2QQZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2qqz256rmk_vcvtpd2qqz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2qqz256rmk_vcvtpd2qqz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2QQZ256rmk
+    %ymm0 = VCVTPD2QQZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2qqzrmk_vcvtpd2qqzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2qqzrmk_vcvtpd2qqzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2QQZrmk
+    %zmm0 = VCVTPD2QQZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2uqqz128rmk_vcvtpd2uqqz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2uqqz128rmk_vcvtpd2uqqz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2UQQZ128rmk
+    %xmm0 = VCVTPD2UQQZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2uqqz256rmk_vcvtpd2uqqz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2uqqz256rmk_vcvtpd2uqqz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2UQQZ256rmk
+    %ymm0 = VCVTPD2UQQZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtpd2uqqzrmk_vcvtpd2uqqzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtpd2uqqzrmk_vcvtpd2uqqzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPD2UQQZrmk
+    %zmm0 = VCVTPD2UQQZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2qqz128rmk_vcvtps2qqz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2qqz128rmk_vcvtps2qqz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2QQZ128rmk
+    %xmm0 = VCVTPS2QQZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2qqz256rmk_vcvtps2qqz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2qqz256rmk_vcvtps2qqz256rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2QQZ256rmk
+    %ymm0 = VCVTPS2QQZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2qqzrmk_vcvtps2qqzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2qqzrmk_vcvtps2qqzrrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2QQZrmk
+    %zmm0 = VCVTPS2QQZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2uqqz128rmk_vcvtps2uqqz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2uqqz128rmk_vcvtps2uqqz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2UQQZ128rmk
+    %xmm0 = VCVTPS2UQQZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2uqqz256rmk_vcvtps2uqqz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2uqqz256rmk_vcvtps2uqqz256rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2UQQZ256rmk
+    %ymm0 = VCVTPS2UQQZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2uqqzrmk_vcvtps2uqqzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2uqqzrmk_vcvtps2uqqzrrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPS2UQQZrmk
+    %zmm0 = VCVTPS2UQQZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2pdz128rmk_vcvtqq2pdz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2pdz128rmk_vcvtqq2pdz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PDZ128rmk
+    %xmm0 = VCVTQQ2PDZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2pdz256rmk_vcvtqq2pdz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2pdz256rmk_vcvtqq2pdz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PDZ256rmk
+    %ymm0 = VCVTQQ2PDZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2pdzrmk_vcvtqq2pdzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2pdzrmk_vcvtqq2pdzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PDZrmk
+    %zmm0 = VCVTQQ2PDZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2psz128rmk_vcvtqq2psz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2psz128rmk_vcvtqq2psz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PSZ128rmk
+    %xmm0 = VCVTQQ2PSZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2psz256rmk_vcvtqq2psz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2psz256rmk_vcvtqq2psz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PSZ256rmk
+    %xmm0 = VCVTQQ2PSZ256rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtqq2pszrmk_vcvtqq2pszrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtqq2pszrmk_vcvtqq2pszrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTQQ2PSZrmk
+    %ymm0 = VCVTQQ2PSZrrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2qqz128rmk_vcvttpd2qqz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2qqz128rmk_vcvttpd2qqz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2QQZ128rmk
+    %xmm0 = VCVTTPD2QQZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2qqz256rmk_vcvttpd2qqz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2qqz256rmk_vcvttpd2qqz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2QQZ256rmk
+    %ymm0 = VCVTTPD2QQZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2qqzrmbk_vcvttpd2qqzrrbk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2qqzrmbk_vcvttpd2qqzrrbk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2QQZrmbk
+    %zmm0 = VCVTTPD2QQZrrbk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2qqzrmk_vcvttpd2qqzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2qqzrmk_vcvttpd2qqzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2QQZrmk
+    %zmm0 = VCVTTPD2QQZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2uqqz128rmk_vcvttpd2uqqz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2uqqz128rmk_vcvttpd2uqqz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2UQQZ128rmk
+    %xmm0 = VCVTTPD2UQQZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2uqqz256rmk_vcvttpd2uqqz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2uqqz256rmk_vcvttpd2uqqz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2UQQZ256rmk
+    %ymm0 = VCVTTPD2UQQZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2uqqzrmbk_vcvttpd2uqqzrrbk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2uqqzrmbk_vcvttpd2uqqzrrbk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2UQQZrmbk
+    %zmm0 = VCVTTPD2UQQZrrbk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttpd2uqqzrmk_vcvttpd2uqqzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttpd2uqqzrmk_vcvttpd2uqqzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPD2UQQZrmk
+    %zmm0 = VCVTTPD2UQQZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2qqz128rmk_vcvttps2qqz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2qqz128rmk_vcvttps2qqz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2QQZ128rmk
+    %xmm0 = VCVTTPS2QQZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2qqz256rmk_vcvttps2qqz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2qqz256rmk_vcvttps2qqz256rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2QQZ256rmk
+    %ymm0 = VCVTTPS2QQZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2qqzrmbk_vcvttps2qqzrrbk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2qqzrmbk_vcvttps2qqzrrbk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2QQZrmbk
+    %zmm0 = VCVTTPS2QQZrrbk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2qqzrmk_vcvttps2qqzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2qqzrmk_vcvttps2qqzrrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2QQZrmk
+    %zmm0 = VCVTTPS2QQZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2uqqz128rmk_vcvttps2uqqz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2uqqz128rmk_vcvttps2uqqz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2UQQZ128rmk
+    %xmm0 = VCVTTPS2UQQZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2uqqz256rmk_vcvttps2uqqz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2uqqz256rmk_vcvttps2uqqz256rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2UQQZ256rmk
+    %ymm0 = VCVTTPS2UQQZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2uqqzrmbk_vcvttps2uqqzrrbk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2uqqzrmbk_vcvttps2uqqzrrbk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2UQQZrmbk
+    %zmm0 = VCVTTPS2UQQZrrbk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvttps2uqqzrmk_vcvttps2uqqzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvttps2uqqzrmk_vcvttps2uqqzrrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTTPS2UQQZrmk
+    %zmm0 = VCVTTPS2UQQZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2pdz128rmk_vcvtuqq2pdz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2pdz128rmk_vcvtuqq2pdz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PDZ128rmk
+    %xmm0 = VCVTUQQ2PDZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2pdz256rmk_vcvtuqq2pdz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2pdz256rmk_vcvtuqq2pdz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PDZ256rmk
+    %ymm0 = VCVTUQQ2PDZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2pdzrmk_vcvtuqq2pdzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2pdzrmk_vcvtuqq2pdzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PDZrmk
+    %zmm0 = VCVTUQQ2PDZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2psz128rmk_vcvtuqq2psz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2psz128rmk_vcvtuqq2psz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PSZ128rmk
+    %xmm0 = VCVTUQQ2PSZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2psz256rmk_vcvtuqq2psz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2psz256rmk_vcvtuqq2psz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PSZ256rmk
+    %xmm0 = VCVTUQQ2PSZ256rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vcvtuqq2pszrmk_vcvtuqq2pszrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtuqq2pszrmk_vcvtuqq2pszrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTUQQ2PSZrmk
+    %ymm0 = VCVTUQQ2PSZrrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vdbpsadbwz128rmikz_vdbpsadbwz128rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vdbpsadbwz128rmikz_vdbpsadbwz128rrikz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VDBPSADBWZ128rmikz
+    %xmm0 = VDBPSADBWZ128rrikz undef %k1, undef %xmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vdbpsadbwz256rmikz_vdbpsadbwz256rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vdbpsadbwz256rmikz_vdbpsadbwz256rrikz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VDBPSADBWZ256rmikz
+    %ymm0 = VDBPSADBWZ256rrikz undef %k1, undef %ymm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vdbpsadbwzrmikz_vdbpsadbwzrrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vdbpsadbwzrmikz_vdbpsadbwzrrikz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VDBPSADBWZrmikz
+    %zmm0 = VDBPSADBWZrrikz undef %k1, undef %zmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vexp2pdmbk_vexp2pdrbk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vexp2pdmbk_vexp2pdrbk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VEXP2PDmbk
+    %zmm0 = VEXP2PDrbk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vexp2pdmk_vexp2pdrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vexp2pdmk_vexp2pdrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VEXP2PDmk
+    %zmm0 = VEXP2PDrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vexp2psmbk_vexp2psrbk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vexp2psmbk_vexp2psrbk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VEXP2PSmbk
+    %zmm0 = VEXP2PSrbk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vexp2psmk_vexp2psrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vexp2psmk_vexp2psrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VEXP2PSmk
+    %zmm0 = VEXP2PSrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vinsertf32x8zrmkz_vinsertf32x8zrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vinsertf32x8zrmkz_vinsertf32x8zrrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTF32x8Zrmkz
+    %zmm0 = VINSERTF32x8Zrrkz undef %k1, undef %zmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vinsertf64x2z256rmkz_vinsertf64x2z256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vinsertf64x2z256rmkz_vinsertf64x2z256rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTF64x2Z256rmkz
+    %ymm0 = VINSERTF64x2Z256rrkz undef %k1, undef %ymm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vinsertf64x2zrmkz_vinsertf64x2zrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vinsertf64x2zrmkz_vinsertf64x2zrrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTF64x2Zrmkz
+    %zmm0 = VINSERTF64x2Zrrkz undef %k1, undef %zmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vinserti32x8zrmkz_vinserti32x8zrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vinserti32x8zrmkz_vinserti32x8zrrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTI32x8Zrmkz
+    %zmm0 = VINSERTI32x8Zrrkz undef %k1, undef %zmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vinserti64x2z256rmkz_vinserti64x2z256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vinserti64x2z256rmkz_vinserti64x2z256rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTI64x2Z256rmkz
+    %ymm0 = VINSERTI64x2Z256rrkz undef %k1, undef %ymm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vinserti64x2zrmkz_vinserti64x2zrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vinserti64x2zrmkz_vinserti64x2zrrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTI64x2Zrmkz
+    %zmm0 = VINSERTI64x2Zrrkz undef %k1, undef %zmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu16z128rmk_vmovdqu16z128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu16z128rmk_vmovdqu16z128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU16Z128rmk
+    %xmm0 = VMOVDQU16Z128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu16z256rmk_vmovdqu16z256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu16z256rmk_vmovdqu16z256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU16Z256rmk
+    %ymm0 = VMOVDQU16Z256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu16zrmk_vmovdqu16zrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu16zrmk_vmovdqu16zrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU16Zrmk
+    %zmm0 = VMOVDQU16Zrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu8z128rmk_vmovdqu8z128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu8z128rmk_vmovdqu8z128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU8Z128rmk
+    %xmm0 = VMOVDQU8Z128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu8z256rmk_vmovdqu8z256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu8z256rmk_vmovdqu8z256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU8Z256rmk
+    %ymm0 = VMOVDQU8Z256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vmovdqu8zrmk_vmovdqu8zrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vmovdqu8zrmk_vmovdqu8zrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VMOVDQU8Zrmk
+    %zmm0 = VMOVDQU8Zrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vorpdz128rmkz_vorpdz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vorpdz128rmkz_vorpdz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPDZ128rmkz
+    %xmm0 = VORPDZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vorpdz256rmkz_vorpdz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vorpdz256rmkz_vorpdz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPDZ256rmkz
+    %ymm0 = VORPDZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vorpdzrmkz_vorpdzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vorpdzrmkz_vorpdzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPDZrmkz
+    %zmm0 = VORPDZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vorpsz128rmkz_vorpsz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vorpsz128rmkz_vorpsz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPSZ128rmkz
+    %xmm0 = VORPSZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vorpsz256rmkz_vorpsz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vorpsz256rmkz_vorpsz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPSZ256rmkz
+    %ymm0 = VORPSZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vorpszrmkz_vorpszrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vorpszrmkz_vorpszrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPSZrmkz
+    %zmm0 = VORPSZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpabsbz128rmk_vpabsbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpabsbz128rmk_vpabsbz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSBZ128rmk
+    %xmm0 = VPABSBZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpabsbz256rmk_vpabsbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpabsbz256rmk_vpabsbz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSBZ256rmk
+    %ymm0 = VPABSBZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpabsbzrmk_vpabsbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpabsbzrmk_vpabsbzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSBZrmk
+    %zmm0 = VPABSBZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpabswz128rmk_vpabswz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpabswz128rmk_vpabswz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSWZ128rmk
+    %xmm0 = VPABSWZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpabswz256rmk_vpabswz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpabswz256rmk_vpabswz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSWZ256rmk
+    %ymm0 = VPABSWZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpabswzrmk_vpabswzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpabswzrmk_vpabswzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPABSWZrmk
+    %zmm0 = VPABSWZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpackssdwz128rmkz_vpackssdwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackssdwz128rmkz_vpackssdwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSDWZ128rmkz
+    %xmm0 = VPACKSSDWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpackssdwz256rmkz_vpackssdwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackssdwz256rmkz_vpackssdwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSDWZ256rmkz
+    %ymm0 = VPACKSSDWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpackssdwzrmkz_vpackssdwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackssdwzrmkz_vpackssdwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSDWZrmkz
+    %zmm0 = VPACKSSDWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpacksswbz128rmkz_vpacksswbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpacksswbz128rmkz_vpacksswbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSWBZ128rmkz
+    %xmm0 = VPACKSSWBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpacksswbz256rmkz_vpacksswbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpacksswbz256rmkz_vpacksswbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSWBZ256rmkz
+    %ymm0 = VPACKSSWBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpacksswbzrmkz_vpacksswbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpacksswbzrmkz_vpacksswbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSWBZrmkz
+    %zmm0 = VPACKSSWBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpackusdwz128rmkz_vpackusdwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackusdwz128rmkz_vpackusdwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSDWZ128rmkz
+    %xmm0 = VPACKUSDWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpackusdwz256rmkz_vpackusdwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackusdwz256rmkz_vpackusdwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSDWZ256rmkz
+    %ymm0 = VPACKUSDWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpackusdwzrmkz_vpackusdwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackusdwzrmkz_vpackusdwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSDWZrmkz
+    %zmm0 = VPACKUSDWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpackuswbz128rmkz_vpackuswbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackuswbz128rmkz_vpackuswbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSWBZ128rmkz
+    %xmm0 = VPACKUSWBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpackuswbz256rmkz_vpackuswbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackuswbz256rmkz_vpackuswbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSWBZ256rmkz
+    %ymm0 = VPACKUSWBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpackuswbzrmkz_vpackuswbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpackuswbzrmkz_vpackuswbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSWBZrmkz
+    %zmm0 = VPACKUSWBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddbz128rmkz_vpaddbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddbz128rmkz_vpaddbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDBZ128rmkz
+    %xmm0 = VPADDBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddbz256rmkz_vpaddbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddbz256rmkz_vpaddbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDBZ256rmkz
+    %ymm0 = VPADDBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddbzrmkz_vpaddbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddbzrmkz_vpaddbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDBZrmkz
+    %zmm0 = VPADDBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddsbz128rmkz_vpaddsbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddsbz128rmkz_vpaddsbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSBZ128rmkz
+    %xmm0 = VPADDSBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddsbz256rmkz_vpaddsbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddsbz256rmkz_vpaddsbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSBZ256rmkz
+    %ymm0 = VPADDSBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddsbzrmkz_vpaddsbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddsbzrmkz_vpaddsbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSBZrmkz
+    %zmm0 = VPADDSBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddswz128rmkz_vpaddswz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddswz128rmkz_vpaddswz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSWZ128rmkz
+    %xmm0 = VPADDSWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddswz256rmkz_vpaddswz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddswz256rmkz_vpaddswz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSWZ256rmkz
+    %ymm0 = VPADDSWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddswzrmkz_vpaddswzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddswzrmkz_vpaddswzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSWZrmkz
+    %zmm0 = VPADDSWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddusbz128rmkz_vpaddusbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddusbz128rmkz_vpaddusbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSBZ128rmkz
+    %xmm0 = VPADDUSBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddusbz256rmkz_vpaddusbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddusbz256rmkz_vpaddusbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSBZ256rmkz
+    %ymm0 = VPADDUSBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddusbzrmkz_vpaddusbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddusbzrmkz_vpaddusbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSBZrmkz
+    %zmm0 = VPADDUSBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpadduswz128rmkz_vpadduswz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpadduswz128rmkz_vpadduswz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSWZ128rmkz
+    %xmm0 = VPADDUSWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpadduswz256rmkz_vpadduswz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpadduswz256rmkz_vpadduswz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSWZ256rmkz
+    %ymm0 = VPADDUSWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpadduswzrmkz_vpadduswzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpadduswzrmkz_vpadduswzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSWZrmkz
+    %zmm0 = VPADDUSWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddwz128rmkz_vpaddwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddwz128rmkz_vpaddwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDWZ128rmkz
+    %xmm0 = VPADDWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddwz256rmkz_vpaddwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddwz256rmkz_vpaddwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDWZ256rmkz
+    %ymm0 = VPADDWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpaddwzrmkz_vpaddwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddwzrmkz_vpaddwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDWZrmkz
+    %zmm0 = VPADDWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpalignrz128rmikz_vpalignrz128rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpalignrz128rmikz_vpalignrz128rrikz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPALIGNRZ128rmikz
+    %xmm0 = VPALIGNRZ128rrikz undef %k1, undef %xmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpalignrz256rmikz_vpalignrz256rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpalignrz256rmikz_vpalignrz256rrikz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPALIGNRZ256rmikz
+    %ymm0 = VPALIGNRZ256rrikz undef %k1, undef %ymm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpalignrzrmikz_vpalignrzrrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpalignrzrmikz_vpalignrzrrikz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPALIGNRZrmikz
+    %zmm0 = VPALIGNRZrrikz undef %k1, undef %zmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpavgbz128rmkz_vpavgbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgbz128rmkz_vpavgbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGBZ128rmkz
+    %xmm0 = VPAVGBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpavgbz256rmkz_vpavgbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgbz256rmkz_vpavgbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGBZ256rmkz
+    %ymm0 = VPAVGBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpavgbzrmkz_vpavgbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgbzrmkz_vpavgbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGBZrmkz
+    %zmm0 = VPAVGBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpavgwz128rmkz_vpavgwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgwz128rmkz_vpavgwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGWZ128rmkz
+    %xmm0 = VPAVGWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpavgwz256rmkz_vpavgwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgwz256rmkz_vpavgwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGWZ256rmkz
+    %ymm0 = VPAVGWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpavgwzrmkz_vpavgwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgwzrmkz_vpavgwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGWZrmkz
+    %zmm0 = VPAVGWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpblendmbz128rmk_vpblendmbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmbz128rmk_vpblendmbz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMBZ128rmk
+    %xmm0 = VPBLENDMBZ128rrk undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpblendmbz128rmkz_vpblendmbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmbz128rmkz_vpblendmbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMBZ128rmkz
+    %xmm0 = VPBLENDMBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpblendmbz256rmk_vpblendmbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmbz256rmk_vpblendmbz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMBZ256rmk
+    %ymm0 = VPBLENDMBZ256rrk undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpblendmbz256rmkz_vpblendmbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmbz256rmkz_vpblendmbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMBZ256rmkz
+    %ymm0 = VPBLENDMBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpblendmbzrmk_vpblendmbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmbzrmk_vpblendmbzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMBZrmk
+    %zmm0 = VPBLENDMBZrrk undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpblendmbzrmkz_vpblendmbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmbzrmkz_vpblendmbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMBZrmkz
+    %zmm0 = VPBLENDMBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpblendmwz128rmk_vpblendmwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmwz128rmk_vpblendmwz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMWZ128rmk
+    %xmm0 = VPBLENDMWZ128rrk undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpblendmwz128rmkz_vpblendmwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmwz128rmkz_vpblendmwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMWZ128rmkz
+    %xmm0 = VPBLENDMWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpblendmwz256rmk_vpblendmwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmwz256rmk_vpblendmwz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMWZ256rmk
+    %ymm0 = VPBLENDMWZ256rrk undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpblendmwz256rmkz_vpblendmwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmwz256rmkz_vpblendmwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMWZ256rmkz
+    %ymm0 = VPBLENDMWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpblendmwzrmk_vpblendmwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmwzrmk_vpblendmwzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMWZrmk
+    %zmm0 = VPBLENDMWZrrk undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpblendmwzrmkz_vpblendmwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpblendmwzrmkz_vpblendmwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBLENDMWZrmkz
+    %zmm0 = VPBLENDMWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastbz128mk_vpbroadcastbz128rk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastbz128mk_vpbroadcastbz128rk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTBZ128mk
+    %xmm0 = VPBROADCASTBZ128rk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastbz256mk_vpbroadcastbz256rk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastbz256mk_vpbroadcastbz256rk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTBZ256mk
+    %ymm0 = VPBROADCASTBZ256rk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastbzmk_vpbroadcastbzrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastbzmk_vpbroadcastbzrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTBZmk
+    %zmm0 = VPBROADCASTBZrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastwz128mk_vpbroadcastwz128rk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastwz128mk_vpbroadcastwz128rk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTWZ128mk
+    %xmm0 = VPBROADCASTWZ128rk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastwz256mk_vpbroadcastwz256rk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastwz256mk_vpbroadcastwz256rk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTWZ256mk
+    %ymm0 = VPBROADCASTWZ256rk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpbroadcastwzmk_vpbroadcastwzrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpbroadcastwzmk_vpbroadcastwzrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPBROADCASTWZmk
+    %zmm0 = VPBROADCASTWZrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmpbz128rmik_vpcmpbz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpbz128rmik_vpcmpbz128rrik_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPBZ128rmik
+    %k1 = VPCMPBZ128rrik undef %k2, undef %xmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpbz128rmik_alt_vpcmpbz128rrik_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpbz128rmik_alt_vpcmpbz128rrik_alt_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPBZ128rmik_alt
+    %k1 = VPCMPBZ128rrik_alt undef %k2, undef %xmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpbz256rmik_vpcmpbz256rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpbz256rmik_vpcmpbz256rrik_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPBZ256rmik
+    %k1 = VPCMPBZ256rrik undef %k2, undef %ymm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpbz256rmik_alt_vpcmpbz256rrik_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpbz256rmik_alt_vpcmpbz256rrik_alt_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPBZ256rmik_alt
+    %k1 = VPCMPBZ256rrik_alt undef %k2, undef %ymm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpbzrmik_vpcmpbzrrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpbzrmik_vpcmpbzrrik_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPBZrmik
+    %k1 = VPCMPBZrrik undef %k2, undef %zmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpbzrmik_alt_vpcmpbzrrik_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpbzrmik_alt_vpcmpbzrrik_alt_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPBZrmik_alt
+    %k1 = VPCMPBZrrik_alt undef %k2, undef %zmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpeqbz128rmk_vpcmpeqbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpeqbz128rmk_vpcmpeqbz128rrk_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPEQBZ128rmk
+    %k1 = VPCMPEQBZ128rrk undef %k2, undef %xmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmpeqbz256rmk_vpcmpeqbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpeqbz256rmk_vpcmpeqbz256rrk_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPEQBZ256rmk
+    %k1 = VPCMPEQBZ256rrk undef %k2, undef %ymm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmpeqbzrmk_vpcmpeqbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpeqbzrmk_vpcmpeqbzrrk_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPEQBZrmk
+    %k1 = VPCMPEQBZrrk undef %k2, undef %zmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmpeqwz128rmk_vpcmpeqwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpeqwz128rmk_vpcmpeqwz128rrk_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPEQWZ128rmk
+    %k1 = VPCMPEQWZ128rrk undef %k2, undef %xmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmpeqwz256rmk_vpcmpeqwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpeqwz256rmk_vpcmpeqwz256rrk_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPEQWZ256rmk
+    %k1 = VPCMPEQWZ256rrk undef %k2, undef %ymm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmpeqwzrmk_vpcmpeqwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpeqwzrmk_vpcmpeqwzrrk_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPEQWZrmk
+    %k1 = VPCMPEQWZrrk undef %k2, undef %zmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmpgtbz128rmk_vpcmpgtbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpgtbz128rmk_vpcmpgtbz128rrk_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPGTBZ128rmk
+    %k1 = VPCMPGTBZ128rrk undef %k2, undef %xmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmpgtbz256rmk_vpcmpgtbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpgtbz256rmk_vpcmpgtbz256rrk_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPGTBZ256rmk
+    %k1 = VPCMPGTBZ256rrk undef %k2, undef %ymm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmpgtbzrmk_vpcmpgtbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpgtbzrmk_vpcmpgtbzrrk_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPGTBZrmk
+    %k1 = VPCMPGTBZrrk undef %k2, undef %zmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmpgtwz128rmk_vpcmpgtwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpgtwz128rmk_vpcmpgtwz128rrk_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPGTWZ128rmk
+    %k1 = VPCMPGTWZ128rrk undef %k2, undef %xmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmpgtwz256rmk_vpcmpgtwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpgtwz256rmk_vpcmpgtwz256rrk_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPGTWZ256rmk
+    %k1 = VPCMPGTWZ256rrk undef %k2, undef %ymm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmpgtwzrmk_vpcmpgtwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpgtwzrmk_vpcmpgtwzrrk_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPGTWZrmk
+    %k1 = VPCMPGTWZrrk undef %k2, undef %zmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmpubz128rmik_vpcmpubz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpubz128rmik_vpcmpubz128rrik_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUBZ128rmik
+    %k1 = VPCMPUBZ128rrik undef %k2, undef %xmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpubz128rmik_alt_vpcmpubz128rrik_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpubz128rmik_alt_vpcmpubz128rrik_alt_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUBZ128rmik_alt
+    %k1 = VPCMPUBZ128rrik_alt undef %k2, undef %xmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpubz256rmik_vpcmpubz256rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpubz256rmik_vpcmpubz256rrik_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUBZ256rmik
+    %k1 = VPCMPUBZ256rrik undef %k2, undef %ymm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpubz256rmik_alt_vpcmpubz256rrik_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpubz256rmik_alt_vpcmpubz256rrik_alt_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUBZ256rmik_alt
+    %k1 = VPCMPUBZ256rrik_alt undef %k2, undef %ymm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpubzrmik_vpcmpubzrrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpubzrmik_vpcmpubzrrik_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUBZrmik
+    %k1 = VPCMPUBZrrik undef %k2, undef %zmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpubzrmik_alt_vpcmpubzrrik_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpubzrmik_alt_vpcmpubzrrik_alt_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUBZrmik_alt
+    %k1 = VPCMPUBZrrik_alt undef %k2, undef %zmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpuwz128rmik_vpcmpuwz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpuwz128rmik_vpcmpuwz128rrik_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUWZ128rmik
+    %k1 = VPCMPUWZ128rrik undef %k2, undef %xmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpuwz128rmik_alt_vpcmpuwz128rrik_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpuwz128rmik_alt_vpcmpuwz128rrik_alt_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUWZ128rmik_alt
+    %k1 = VPCMPUWZ128rrik_alt undef %k2, undef %xmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpuwz256rmik_vpcmpuwz256rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpuwz256rmik_vpcmpuwz256rrik_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUWZ256rmik
+    %k1 = VPCMPUWZ256rrik undef %k2, undef %ymm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpuwz256rmik_alt_vpcmpuwz256rrik_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpuwz256rmik_alt_vpcmpuwz256rrik_alt_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUWZ256rmik_alt
+    %k1 = VPCMPUWZ256rrik_alt undef %k2, undef %ymm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpuwzrmik_vpcmpuwzrrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpuwzrmik_vpcmpuwzrrik_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUWZrmik
+    %k1 = VPCMPUWZrrik undef %k2, undef %zmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpuwzrmik_alt_vpcmpuwzrrik_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpuwzrmik_alt_vpcmpuwzrrik_alt_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPUWZrmik_alt
+    %k1 = VPCMPUWZrrik_alt undef %k2, undef %zmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpwz128rmik_vpcmpwz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpwz128rmik_vpcmpwz128rrik_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPWZ128rmik
+    %k1 = VPCMPWZ128rrik undef %k2, undef %xmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpwz128rmik_alt_vpcmpwz128rrik_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpwz128rmik_alt_vpcmpwz128rrik_alt_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPWZ128rmik_alt
+    %k1 = VPCMPWZ128rrik_alt undef %k2, undef %xmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpwz256rmik_vpcmpwz256rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpwz256rmik_vpcmpwz256rrik_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPWZ256rmik
+    %k1 = VPCMPWZ256rrik undef %k2, undef %ymm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpwz256rmik_alt_vpcmpwz256rrik_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpwz256rmik_alt_vpcmpwz256rrik_alt_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPWZ256rmik_alt
+    %k1 = VPCMPWZ256rrik_alt undef %k2, undef %ymm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpwzrmik_vpcmpwzrrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpwzrmik_vpcmpwzrrik_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPWZrmik
+    %k1 = VPCMPWZrrik undef %k2, undef %zmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcmpwzrmik_alt_vpcmpwzrrik_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmpwzrmik_alt_vpcmpwzrrik_alt_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMPWZrmik_alt
+    %k1 = VPCMPWZrrik_alt undef %k2, undef %zmm0, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpconflictdz128rmk_vpconflictdz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictdz128rmk_vpconflictdz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTDZ128rmk
+    %xmm0 = VPCONFLICTDZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpconflictdz256rmk_vpconflictdz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictdz256rmk_vpconflictdz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTDZ256rmk
+    %ymm0 = VPCONFLICTDZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpconflictdzrmk_vpconflictdzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictdzrmk_vpconflictdzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTDZrmk
+    %zmm0 = VPCONFLICTDZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpconflictqz128rmk_vpconflictqz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictqz128rmk_vpconflictqz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTQZ128rmk
+    %xmm0 = VPCONFLICTQZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpconflictqz256rmk_vpconflictqz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictqz256rmk_vpconflictqz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTQZ256rmk
+    %ymm0 = VPCONFLICTQZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpconflictqzrmk_vpconflictqzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpconflictqzrmk_vpconflictqzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCONFLICTQZrmk
+    %zmm0 = VPCONFLICTQZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermbz128rmkz_vpermbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermbz128rmkz_vpermbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMBZ128rmkz
+    %xmm0 = VPERMBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermbz256rmkz_vpermbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermbz256rmkz_vpermbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMBZ256rmkz
+    %ymm0 = VPERMBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermbzrmkz_vpermbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermbzrmkz_vpermbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMBZrmkz
+    %zmm0 = VPERMBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermi2b128rm_vpermi2b128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2b128rm_vpermi2b128rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2B128rm
+    %xmm0 = VPERMI2B128rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermi2b256rm_vpermi2b256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2b256rm_vpermi2b256rr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2B256rm
+    %ymm0 = VPERMI2B256rr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermi2brm_vpermi2brr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2brm_vpermi2brr_test
+    %3 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2Brm
+    %zmm0 = VPERMI2Brr undef %zmm1, undef %zmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermi2w128rm_vpermi2w128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2w128rm_vpermi2w128rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2W128rm
+    %xmm0 = VPERMI2W128rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermi2w256rm_vpermi2w256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2w256rm_vpermi2w256rr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2W256rm
+    %ymm0 = VPERMI2W256rr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermi2wrm_vpermi2wrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2wrm_vpermi2wrr_test
+    %3 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2Wrm
+    %zmm0 = VPERMI2Wrr undef %zmm1, undef %zmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermt2b128rm_vpermt2b128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2b128rm_vpermt2b128rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2B128rm
+    %xmm0 = VPERMT2B128rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermt2b256rm_vpermt2b256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2b256rm_vpermt2b256rr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2B256rm
+    %ymm0 = VPERMT2B256rr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermt2brm_vpermt2brr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2brm_vpermt2brr_test
+    %3 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2Brm
+    %zmm0 = VPERMT2Brr undef %zmm1, undef %zmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermt2w128rm_vpermt2w128rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2w128rm_vpermt2w128rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2W128rm
+    %xmm0 = VPERMT2W128rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermt2w256rm_vpermt2w256rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2w256rm_vpermt2w256rr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2W256rm
+    %ymm0 = VPERMT2W256rr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermt2wrm_vpermt2wrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2wrm_vpermt2wrr_test
+    %3 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2Wrm
+    %zmm0 = VPERMT2Wrr undef %zmm1, undef %zmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermwz128rmkz_vpermwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermwz128rmkz_vpermwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMWZ128rmkz
+    %xmm0 = VPERMWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermwz256rmkz_vpermwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermwz256rmkz_vpermwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMWZ256rmkz
+    %ymm0 = VPERMWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermwzrmkz_vpermwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermwzrmkz_vpermwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMWZrmkz
+    %zmm0 = VPERMWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vplzcntdz128rmk_vplzcntdz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntdz128rmk_vplzcntdz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTDZ128rmk
+    %xmm0 = VPLZCNTDZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vplzcntdz256rmk_vplzcntdz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntdz256rmk_vplzcntdz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTDZ256rmk
+    %ymm0 = VPLZCNTDZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vplzcntdzrmk_vplzcntdzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntdzrmk_vplzcntdzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTDZrmk
+    %zmm0 = VPLZCNTDZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vplzcntqz128rmk_vplzcntqz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntqz128rmk_vplzcntqz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTQZ128rmk
+    %xmm0 = VPLZCNTQZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vplzcntqz256rmk_vplzcntqz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntqz256rmk_vplzcntqz256rrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTQZ256rmk
+    %ymm0 = VPLZCNTQZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vplzcntqzrmk_vplzcntqzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vplzcntqzrmk_vplzcntqzrrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPLZCNTQZrmk
+    %zmm0 = VPLZCNTQZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52huqz128m_vpmadd52huqz128r_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52huqz128m_vpmadd52huqz128r_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52HUQZ128m
+    %xmm0 = VPMADD52HUQZ128r undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52huqz256m_vpmadd52huqz256r_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52huqz256m_vpmadd52huqz256r_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52HUQZ256m
+    %ymm0 = VPMADD52HUQZ256r undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52huqzm_vpmadd52huqzr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52huqzm_vpmadd52huqzr_test
+    %3 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52HUQZm
+    %zmm0 = VPMADD52HUQZr undef %zmm1, undef %zmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52luqz128m_vpmadd52luqz128r_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52luqz128m_vpmadd52luqz128r_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52LUQZ128m
+    %xmm0 = VPMADD52LUQZ128r undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52luqz256m_vpmadd52luqz256r_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52luqz256m_vpmadd52luqz256r_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52LUQZ256m
+    %ymm0 = VPMADD52LUQZ256r undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52luqzm_vpmadd52luqzr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52luqzm_vpmadd52luqzr_test
+    %3 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52LUQZm
+    %zmm0 = VPMADD52LUQZr undef %zmm1, undef %zmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaddubswz128rmkz_vpmaddubswz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddubswz128rmkz_vpmaddubswz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDUBSWZ128rmkz
+    %xmm0 = VPMADDUBSWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaddubswz256rmkz_vpmaddubswz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddubswz256rmkz_vpmaddubswz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDUBSWZ256rmkz
+    %ymm0 = VPMADDUBSWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaddubswzrmkz_vpmaddubswzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddubswzrmkz_vpmaddubswzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDUBSWZrmkz
+    %zmm0 = VPMADDUBSWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaddwdz128rmkz_vpmaddwdz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddwdz128rmkz_vpmaddwdz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDWDZ128rmkz
+    %xmm0 = VPMADDWDZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaddwdz256rmkz_vpmaddwdz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddwdz256rmkz_vpmaddwdz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDWDZ256rmkz
+    %ymm0 = VPMADDWDZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaddwdzrmkz_vpmaddwdzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddwdzrmkz_vpmaddwdzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDWDZrmkz
+    %zmm0 = VPMADDWDZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaxsbz128rmkz_vpmaxsbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxsbz128rmkz_vpmaxsbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSBZ128rmkz
+    %xmm0 = VPMAXSBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaxsbz256rmkz_vpmaxsbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxsbz256rmkz_vpmaxsbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSBZ256rmkz
+    %ymm0 = VPMAXSBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaxsbzrmkz_vpmaxsbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxsbzrmkz_vpmaxsbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSBZrmkz
+    %zmm0 = VPMAXSBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaxswz128rmkz_vpmaxswz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxswz128rmkz_vpmaxswz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSWZ128rmkz
+    %xmm0 = VPMAXSWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaxswz256rmkz_vpmaxswz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxswz256rmkz_vpmaxswz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSWZ256rmkz
+    %ymm0 = VPMAXSWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaxswzrmkz_vpmaxswzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxswzrmkz_vpmaxswzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSWZrmkz
+    %zmm0 = VPMAXSWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaxubz128rmkz_vpmaxubz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxubz128rmkz_vpmaxubz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUBZ128rmkz
+    %xmm0 = VPMAXUBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaxubz256rmkz_vpmaxubz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxubz256rmkz_vpmaxubz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUBZ256rmkz
+    %ymm0 = VPMAXUBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaxubzrmkz_vpmaxubzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxubzrmkz_vpmaxubzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUBZrmkz
+    %zmm0 = VPMAXUBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaxuwz128rmkz_vpmaxuwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxuwz128rmkz_vpmaxuwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUWZ128rmkz
+    %xmm0 = VPMAXUWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaxuwz256rmkz_vpmaxuwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxuwz256rmkz_vpmaxuwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUWZ256rmkz
+    %ymm0 = VPMAXUWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmaxuwzrmkz_vpmaxuwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxuwzrmkz_vpmaxuwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUWZrmkz
+    %zmm0 = VPMAXUWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpminsbz128rmkz_vpminsbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminsbz128rmkz_vpminsbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSBZ128rmkz
+    %xmm0 = VPMINSBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpminsbz256rmkz_vpminsbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminsbz256rmkz_vpminsbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSBZ256rmkz
+    %ymm0 = VPMINSBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpminsbzrmkz_vpminsbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminsbzrmkz_vpminsbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSBZrmkz
+    %zmm0 = VPMINSBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpminswz128rmkz_vpminswz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminswz128rmkz_vpminswz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSWZ128rmkz
+    %xmm0 = VPMINSWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpminswz256rmkz_vpminswz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminswz256rmkz_vpminswz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSWZ256rmkz
+    %ymm0 = VPMINSWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpminswzrmkz_vpminswzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminswzrmkz_vpminswzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSWZrmkz
+    %zmm0 = VPMINSWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpminubz128rmkz_vpminubz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminubz128rmkz_vpminubz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUBZ128rmkz
+    %xmm0 = VPMINUBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpminubz256rmkz_vpminubz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminubz256rmkz_vpminubz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUBZ256rmkz
+    %ymm0 = VPMINUBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpminubzrmkz_vpminubzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminubzrmkz_vpminubzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUBZrmkz
+    %zmm0 = VPMINUBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpminuwz128rmkz_vpminuwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminuwz128rmkz_vpminuwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUWZ128rmkz
+    %xmm0 = VPMINUWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpminuwz256rmkz_vpminuwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminuwz256rmkz_vpminuwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUWZ256rmkz
+    %ymm0 = VPMINUWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpminuwzrmkz_vpminuwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpminuwzrmkz_vpminuwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUWZrmkz
+    %zmm0 = VPMINUWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmovsxbwz128rmk_vpmovsxbwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovsxbwz128rmk_vpmovsxbwz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVSXBWZ128rmk
+    %xmm0 = VPMOVSXBWZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmovsxbwz256rmk_vpmovsxbwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovsxbwz256rmk_vpmovsxbwz256rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVSXBWZ256rmk
+    %ymm0 = VPMOVSXBWZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmovsxbwzrmk_vpmovsxbwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovsxbwzrmk_vpmovsxbwzrrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVSXBWZrmk
+    %zmm0 = VPMOVSXBWZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmovzxbwz128rmk_vpmovzxbwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovzxbwz128rmk_vpmovzxbwz128rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVZXBWZ128rmk
+    %xmm0 = VPMOVZXBWZ128rrk undef %xmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmovzxbwz256rmk_vpmovzxbwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovzxbwz256rmk_vpmovzxbwz256rrk_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVZXBWZ256rmk
+    %ymm0 = VPMOVZXBWZ256rrk undef %ymm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmovzxbwzrmk_vpmovzxbwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmovzxbwzrmk_vpmovzxbwzrrk_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMOVZXBWZrmk
+    %zmm0 = VPMOVZXBWZrrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmulhrswz128rmkz_vpmulhrswz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhrswz128rmkz_vpmulhrswz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHRSWZ128rmkz
+    %xmm0 = VPMULHRSWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmulhrswz256rmkz_vpmulhrswz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhrswz256rmkz_vpmulhrswz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHRSWZ256rmkz
+    %ymm0 = VPMULHRSWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmulhrswzrmkz_vpmulhrswzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhrswzrmkz_vpmulhrswzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHRSWZrmkz
+    %zmm0 = VPMULHRSWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmulhuwz128rmkz_vpmulhuwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhuwz128rmkz_vpmulhuwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHUWZ128rmkz
+    %xmm0 = VPMULHUWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmulhuwz256rmkz_vpmulhuwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhuwz256rmkz_vpmulhuwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHUWZ256rmkz
+    %ymm0 = VPMULHUWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmulhuwzrmkz_vpmulhuwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhuwzrmkz_vpmulhuwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHUWZrmkz
+    %zmm0 = VPMULHUWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmulhwz128rmkz_vpmulhwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhwz128rmkz_vpmulhwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHWZ128rmkz
+    %xmm0 = VPMULHWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmulhwz256rmkz_vpmulhwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhwz256rmkz_vpmulhwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHWZ256rmkz
+    %ymm0 = VPMULHWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmulhwzrmkz_vpmulhwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhwzrmkz_vpmulhwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHWZrmkz
+    %zmm0 = VPMULHWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmullqz128rmkz_vpmullqz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullqz128rmkz_vpmullqz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLQZ128rmkz
+    %xmm0 = VPMULLQZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmullqz256rmkz_vpmullqz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullqz256rmkz_vpmullqz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLQZ256rmkz
+    %ymm0 = VPMULLQZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmullqzrmkz_vpmullqzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullqzrmkz_vpmullqzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLQZrmkz
+    %zmm0 = VPMULLQZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmullwz128rmkz_vpmullwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullwz128rmkz_vpmullwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLWZ128rmkz
+    %xmm0 = VPMULLWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmullwz256rmkz_vpmullwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullwz256rmkz_vpmullwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLWZ256rmkz
+    %ymm0 = VPMULLWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmullwzrmkz_vpmullwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullwzrmkz_vpmullwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLWZrmkz
+    %zmm0 = VPMULLWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmultishiftqbz128rmkz_vpmultishiftqbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmultishiftqbz128rmkz_vpmultishiftqbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULTISHIFTQBZ128rmkz
+    %xmm0 = VPMULTISHIFTQBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmultishiftqbz256rmkz_vpmultishiftqbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmultishiftqbz256rmkz_vpmultishiftqbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULTISHIFTQBZ256rmkz
+    %ymm0 = VPMULTISHIFTQBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpmultishiftqbzrmkz_vpmultishiftqbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmultishiftqbzrmkz_vpmultishiftqbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULTISHIFTQBZrmkz
+    %zmm0 = VPMULTISHIFTQBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpshufbz128rmkz_vpshufbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufbz128rmkz_vpshufbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFBZ128rmkz
+    %xmm0 = VPSHUFBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpshufbz256rmkz_vpshufbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufbz256rmkz_vpshufbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFBZ256rmkz
+    %ymm0 = VPSHUFBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpshufbzrmkz_vpshufbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufbzrmkz_vpshufbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFBZrmkz
+    %zmm0 = VPSHUFBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpshufhwz128mik_vpshufhwz128rik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufhwz128mik_vpshufhwz128rik_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFHWZ128mik
+    %xmm0 = VPSHUFHWZ128rik undef %xmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshufhwz256mik_vpshufhwz256rik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufhwz256mik_vpshufhwz256rik_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFHWZ256mik
+    %ymm0 = VPSHUFHWZ256rik undef %ymm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshufhwzmik_vpshufhwzrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufhwzmik_vpshufhwzrik_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFHWZmik
+    %zmm0 = VPSHUFHWZrik undef %zmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshuflwz128mik_vpshuflwz128rik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshuflwz128mik_vpshuflwz128rik_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFLWZ128mik
+    %xmm0 = VPSHUFLWZ128rik undef %xmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshuflwz256mik_vpshuflwz256rik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshuflwz256mik_vpshuflwz256rik_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFLWZ256mik
+    %ymm0 = VPSHUFLWZ256rik undef %ymm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpshuflwzmik_vpshuflwzrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshuflwzmik_vpshuflwzrik_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFLWZmik
+    %zmm0 = VPSHUFLWZrik undef %zmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsllvwz128rmkz_vpsllvwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllvwz128rmkz_vpsllvwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLVWZ128rmkz
+    %xmm0 = VPSLLVWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsllvwz256rmkz_vpsllvwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllvwz256rmkz_vpsllvwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLVWZ256rmkz
+    %ymm0 = VPSLLVWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsllvwzrmkz_vpsllvwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllvwzrmkz_vpsllvwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLVWZrmkz
+    %zmm0 = VPSLLVWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsllwz128mik_vpsllwz128rik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwz128mik_vpsllwz128rik_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZ128mik
+    %xmm0 = VPSLLWZ128rik undef %xmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsllwz128rmkz_vpsllwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwz128rmkz_vpsllwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZ128rmkz
+    %xmm0 = VPSLLWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsllwz256mik_vpsllwz256rik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwz256mik_vpsllwz256rik_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZ256mik
+    %ymm0 = VPSLLWZ256rik undef %ymm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsllwz256rmkz_vpsllwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwz256rmkz_vpsllwz256rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZ256rmkz
+    %ymm0 = VPSLLWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsllwzmik_vpsllwzrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwzmik_vpsllwzrik_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZmik
+    %zmm0 = VPSLLWZrik undef %zmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsllwzrmkz_vpsllwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwzrmkz_vpsllwzrrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZrmkz
+    %zmm0 = VPSLLWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsravwz128rmkz_vpsravwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsravwz128rmkz_vpsravwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAVWZ128rmkz
+    %xmm0 = VPSRAVWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsravwz256rmkz_vpsravwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsravwz256rmkz_vpsravwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAVWZ256rmkz
+    %ymm0 = VPSRAVWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsravwzrmkz_vpsravwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsravwzrmkz_vpsravwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAVWZrmkz
+    %zmm0 = VPSRAVWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsrawz128mik_vpsrawz128rik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawz128mik_vpsrawz128rik_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZ128mik
+    %xmm0 = VPSRAWZ128rik undef %xmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrawz128rmkz_vpsrawz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawz128rmkz_vpsrawz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZ128rmkz
+    %xmm0 = VPSRAWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsrawz256mik_vpsrawz256rik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawz256mik_vpsrawz256rik_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZ256mik
+    %ymm0 = VPSRAWZ256rik undef %ymm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrawz256rmkz_vpsrawz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawz256rmkz_vpsrawz256rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZ256rmkz
+    %ymm0 = VPSRAWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsrawzmik_vpsrawzrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawzmik_vpsrawzrik_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZmik
+    %zmm0 = VPSRAWZrik undef %zmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrawzrmkz_vpsrawzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawzrmkz_vpsrawzrrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZrmkz
+    %zmm0 = VPSRAWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsrlvwz128rmkz_vpsrlvwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlvwz128rmkz_vpsrlvwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLVWZ128rmkz
+    %xmm0 = VPSRLVWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsrlvwz256rmkz_vpsrlvwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlvwz256rmkz_vpsrlvwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLVWZ256rmkz
+    %ymm0 = VPSRLVWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsrlvwzrmkz_vpsrlvwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlvwzrmkz_vpsrlvwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLVWZrmkz
+    %zmm0 = VPSRLVWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwz128mik_vpsrlwz128rik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwz128mik_vpsrlwz128rik_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZ128mik
+    %xmm0 = VPSRLWZ128rik undef %xmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwz128rmkz_vpsrlwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwz128rmkz_vpsrlwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZ128rmkz
+    %xmm0 = VPSRLWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwz256mik_vpsrlwz256rik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwz256mik_vpsrlwz256rik_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZ256mik
+    %ymm0 = VPSRLWZ256rik undef %ymm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwz256rmkz_vpsrlwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwz256rmkz_vpsrlwz256rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZ256rmkz
+    %ymm0 = VPSRLWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwzmik_vpsrlwzrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwzmik_vpsrlwzrik_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZmik
+    %zmm0 = VPSRLWZrik undef %zmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwzrmkz_vpsrlwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwzrmkz_vpsrlwzrrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZrmkz
+    %zmm0 = VPSRLWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubbz128rmkz_vpsubbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubbz128rmkz_vpsubbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBBZ128rmkz
+    %xmm0 = VPSUBBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubbz256rmkz_vpsubbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubbz256rmkz_vpsubbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBBZ256rmkz
+    %ymm0 = VPSUBBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubbzrmkz_vpsubbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubbzrmkz_vpsubbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBBZrmkz
+    %zmm0 = VPSUBBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubsbz128rmkz_vpsubsbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubsbz128rmkz_vpsubsbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSBZ128rmkz
+    %xmm0 = VPSUBSBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubsbz256rmkz_vpsubsbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubsbz256rmkz_vpsubsbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSBZ256rmkz
+    %ymm0 = VPSUBSBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubsbzrmkz_vpsubsbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubsbzrmkz_vpsubsbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSBZrmkz
+    %zmm0 = VPSUBSBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubswz128rmkz_vpsubswz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubswz128rmkz_vpsubswz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSWZ128rmkz
+    %xmm0 = VPSUBSWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubswz256rmkz_vpsubswz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubswz256rmkz_vpsubswz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSWZ256rmkz
+    %ymm0 = VPSUBSWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubswzrmkz_vpsubswzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubswzrmkz_vpsubswzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSWZrmkz
+    %zmm0 = VPSUBSWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubusbz128rmkz_vpsubusbz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubusbz128rmkz_vpsubusbz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSBZ128rmkz
+    %xmm0 = VPSUBUSBZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubusbz256rmkz_vpsubusbz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubusbz256rmkz_vpsubusbz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSBZ256rmkz
+    %ymm0 = VPSUBUSBZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubusbzrmkz_vpsubusbzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubusbzrmkz_vpsubusbzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSBZrmkz
+    %zmm0 = VPSUBUSBZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubuswz128rmkz_vpsubuswz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubuswz128rmkz_vpsubuswz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSWZ128rmkz
+    %xmm0 = VPSUBUSWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubuswz256rmkz_vpsubuswz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubuswz256rmkz_vpsubuswz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSWZ256rmkz
+    %ymm0 = VPSUBUSWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubuswzrmkz_vpsubuswzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubuswzrmkz_vpsubuswzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSWZrmkz
+    %zmm0 = VPSUBUSWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubwz128rmkz_vpsubwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubwz128rmkz_vpsubwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBWZ128rmkz
+    %xmm0 = VPSUBWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubwz256rmkz_vpsubwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubwz256rmkz_vpsubwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBWZ256rmkz
+    %ymm0 = VPSUBWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpsubwzrmkz_vpsubwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubwzrmkz_vpsubwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBWZrmkz
+    %zmm0 = VPSUBWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vptestmbz128rmk_vptestmbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestmbz128rmk_vptestmbz128rrk_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTMBZ128rmk
+    %k1 = VPTESTMBZ128rrk undef %k2, undef %xmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vptestmbz256rmk_vptestmbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestmbz256rmk_vptestmbz256rrk_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTMBZ256rmk
+    %k1 = VPTESTMBZ256rrk undef %k2, undef %ymm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vptestmbzrmk_vptestmbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestmbzrmk_vptestmbzrrk_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTMBZrmk
+    %k1 = VPTESTMBZrrk undef %k2, undef %zmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vptestmwz128rmk_vptestmwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestmwz128rmk_vptestmwz128rrk_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTMWZ128rmk
+    %k1 = VPTESTMWZ128rrk undef %k2, undef %xmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vptestmwz256rmk_vptestmwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestmwz256rmk_vptestmwz256rrk_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTMWZ256rmk
+    %k1 = VPTESTMWZ256rrk undef %k2, undef %ymm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vptestmwzrmk_vptestmwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestmwzrmk_vptestmwzrrk_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTMWZrmk
+    %k1 = VPTESTMWZrrk undef %k2, undef %zmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vptestnmbz128rmk_vptestnmbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestnmbz128rmk_vptestnmbz128rrk_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTNMBZ128rmk
+    %k1 = VPTESTNMBZ128rrk undef %k2, undef %xmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vptestnmbz256rmk_vptestnmbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestnmbz256rmk_vptestnmbz256rrk_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTNMBZ256rmk
+    %k1 = VPTESTNMBZ256rrk undef %k2, undef %ymm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vptestnmbzrmk_vptestnmbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestnmbzrmk_vptestnmbzrrk_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTNMBZrmk
+    %k1 = VPTESTNMBZrrk undef %k2, undef %zmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vptestnmwz128rmk_vptestnmwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestnmwz128rmk_vptestnmwz128rrk_test
+    %3 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTNMWZ128rmk
+    %k1 = VPTESTNMWZ128rrk undef %k2, undef %xmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vptestnmwz256rmk_vptestnmwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestnmwz256rmk_vptestnmwz256rrk_test
+    %3 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTNMWZ256rmk
+    %k1 = VPTESTNMWZ256rrk undef %k2, undef %ymm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vptestnmwzrmk_vptestnmwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm1', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vptestnmwzrmk_vptestnmwzrrk_test
+    %3 = COPY %zmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPTESTNMWZrmk
+    %k1 = VPTESTNMWZrrk undef %k2, undef %zmm0, %3
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhbwz128rmkz_vpunpckhbwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhbwz128rmkz_vpunpckhbwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHBWZ128rmkz
+    %xmm0 = VPUNPCKHBWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhbwz256rmkz_vpunpckhbwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhbwz256rmkz_vpunpckhbwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHBWZ256rmkz
+    %ymm0 = VPUNPCKHBWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhbwzrmkz_vpunpckhbwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhbwzrmkz_vpunpckhbwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHBWZrmkz
+    %zmm0 = VPUNPCKHBWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhwdz128rmkz_vpunpckhwdz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhwdz128rmkz_vpunpckhwdz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHWDZ128rmkz
+    %xmm0 = VPUNPCKHWDZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhwdz256rmkz_vpunpckhwdz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhwdz256rmkz_vpunpckhwdz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHWDZ256rmkz
+    %ymm0 = VPUNPCKHWDZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhwdzrmkz_vpunpckhwdzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhwdzrmkz_vpunpckhwdzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHWDZrmkz
+    %zmm0 = VPUNPCKHWDZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklbwz128rmkz_vpunpcklbwz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklbwz128rmkz_vpunpcklbwz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLBWZ128rmkz
+    %xmm0 = VPUNPCKLBWZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklbwz256rmkz_vpunpcklbwz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklbwz256rmkz_vpunpcklbwz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLBWZ256rmkz
+    %ymm0 = VPUNPCKLBWZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklbwzrmkz_vpunpcklbwzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklbwzrmkz_vpunpcklbwzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLBWZrmkz
+    %zmm0 = VPUNPCKLBWZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklwdz128rmkz_vpunpcklwdz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklwdz128rmkz_vpunpcklwdz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLWDZ128rmkz
+    %xmm0 = VPUNPCKLWDZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklwdz256rmkz_vpunpcklwdz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklwdz256rmkz_vpunpcklwdz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLWDZ256rmkz
+    %ymm0 = VPUNPCKLWDZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklwdzrmkz_vpunpcklwdzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklwdzrmkz_vpunpcklwdzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLWDZrmkz
+    %zmm0 = VPUNPCKLWDZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vrangepdz128rmikz_vrangepdz128rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepdz128rmikz_vrangepdz128rrikz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPDZ128rmikz
+    %xmm0 = VRANGEPDZ128rrikz undef %k1, undef %xmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepdz256rmikz_vrangepdz256rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepdz256rmikz_vrangepdz256rrikz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPDZ256rmikz
+    %ymm0 = VRANGEPDZ256rrikz undef %k1, undef %ymm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepdzrmbikz_vrangepdzrribkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepdzrmbikz_vrangepdzrribkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPDZrmbikz
+    %zmm0 = VRANGEPDZrribkz undef %k1, undef %zmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepdzrmikz_vrangepdzrrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepdzrmikz_vrangepdzrrikz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPDZrmikz
+    %zmm0 = VRANGEPDZrrikz undef %k1, undef %zmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepsz128rmikz_vrangepsz128rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepsz128rmikz_vrangepsz128rrikz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPSZ128rmikz
+    %xmm0 = VRANGEPSZ128rrikz undef %k1, undef %xmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepsz256rmikz_vrangepsz256rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepsz256rmikz_vrangepsz256rrikz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPSZ256rmikz
+    %ymm0 = VRANGEPSZ256rrikz undef %k1, undef %ymm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepszrmbikz_vrangepszrribkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepszrmbikz_vrangepszrribkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPSZrmbikz
+    %zmm0 = VRANGEPSZrribkz undef %k1, undef %zmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepszrmikz_vrangepszrrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepszrmikz_vrangepszrrikz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPSZrmikz
+    %zmm0 = VRANGEPSZrrikz undef %k1, undef %zmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangesdz128rmikz_vrangesdz128rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangesdz128rmikz_vrangesdz128rrikz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGESDZ128rmikz
+    %xmm0 = VRANGESDZ128rrikz undef %k1, undef %xmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangessz128rmikz_vrangessz128rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrangessz128rmikz_vrangessz128rrikz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGESSZ128rmikz
+    %xmm0 = VRANGESSZ128rrikz undef %k1, undef %xmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vrcp28pdmbk_vrcp28pdrbk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28pdmbk_vrcp28pdrbk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28PDmbk
+    %zmm0 = VRCP28PDrbk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vrcp28pdmk_vrcp28pdrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28pdmk_vrcp28pdrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28PDmk
+    %zmm0 = VRCP28PDrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vrcp28psmbk_vrcp28psrbk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28psmbk_vrcp28psrbk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28PSmbk
+    %zmm0 = VRCP28PSrbk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vrcp28psmk_vrcp28psrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28psmk_vrcp28psrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28PSmk
+    %zmm0 = VRCP28PSrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vrcp28sdmkz_vrcp28sdrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28sdmkz_vrcp28sdrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28SDmkz
+    %xmm0 = VRCP28SDrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vrcp28ssmkz_vrcp28ssrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28ssmkz_vrcp28ssrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28SSmkz
+    %xmm0 = VRCP28SSrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vreducepdz128rmik_vreducepdz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepdz128rmik_vreducepdz128rrik_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPDZ128rmik
+    %xmm0 = VREDUCEPDZ128rrik undef %xmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepdz256rmik_vreducepdz256rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepdz256rmik_vreducepdz256rrik_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPDZ256rmik
+    %ymm0 = VREDUCEPDZ256rrik undef %ymm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepdzrmbik_vreducepdzrribk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepdzrmbik_vreducepdzrribk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPDZrmbik
+    %zmm0 = VREDUCEPDZrribk undef %zmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepdzrmik_vreducepdzrrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepdzrmik_vreducepdzrrik_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPDZrmik
+    %zmm0 = VREDUCEPDZrrik undef %zmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepsz128rmik_vreducepsz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepsz128rmik_vreducepsz128rrik_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPSZ128rmik
+    %xmm0 = VREDUCEPSZ128rrik undef %xmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepsz256rmik_vreducepsz256rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepsz256rmik_vreducepsz256rrik_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPSZ256rmik
+    %ymm0 = VREDUCEPSZ256rrik undef %ymm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepszrmbik_vreducepszrribk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepszrmbik_vreducepszrribk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPSZrmbik
+    %zmm0 = VREDUCEPSZrribk undef %zmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducepszrmik_vreducepszrrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vreducepszrmik_vreducepszrrik_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCEPSZrmik
+    %zmm0 = VREDUCEPSZrrik undef %zmm1, undef %k1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducesdz128rmikz_vreducesdz128rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vreducesdz128rmikz_vreducesdz128rrikz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCESDZ128rmikz
+    %xmm0 = VREDUCESDZ128rrikz undef %k1, undef %xmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducessz128rmikz_vreducessz128rrikz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vreducessz128rmikz_vreducessz128rrikz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCESSZ128rmikz
+    %xmm0 = VREDUCESSZ128rrikz undef %k1, undef %xmm1, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28pdmbk_vrsqrt28pdrbk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28pdmbk_vrsqrt28pdrbk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28PDmbk
+    %zmm0 = VRSQRT28PDrbk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28pdmk_vrsqrt28pdrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28pdmk_vrsqrt28pdrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28PDmk
+    %zmm0 = VRSQRT28PDrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28psmbk_vrsqrt28psrbk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28psmbk_vrsqrt28psrbk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28PSmbk
+    %zmm0 = VRSQRT28PSrbk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28psmk_vrsqrt28psrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28psmk_vrsqrt28psrk_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28PSmk
+    %zmm0 = VRSQRT28PSrk undef %zmm1, undef %k1, %3
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28sdmkz_vrsqrt28sdrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28sdmkz_vrsqrt28sdrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28SDmkz
+    %xmm0 = VRSQRT28SDrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28ssmkz_vrsqrt28ssrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28ssmkz_vrsqrt28ssrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28SSmkz
+    %xmm0 = VRSQRT28SSrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vxorpdz128rmkz_vxorpdz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpdz128rmkz_vxorpdz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPDZ128rmkz
+    %xmm0 = VXORPDZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vxorpdz256rmkz_vxorpdz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpdz256rmkz_vxorpdz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPDZ256rmkz
+    %ymm0 = VXORPDZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vxorpdzrmkz_vxorpdzrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpdzrmkz_vxorpdzrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPDZrmkz
+    %zmm0 = VXORPDZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vxorpsz128rmkz_vxorpsz128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128x }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpsz128rmkz_vxorpsz128rrkz_test
+    %3 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPSZ128rmkz
+    %xmm0 = VXORPSZ128rrkz undef %k1, undef %xmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vxorpsz256rmkz_vxorpsz256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256x }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpsz256rmkz_vxorpsz256rrkz_test
+    %3 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPSZ256rmkz
+    %ymm0 = VXORPSZ256rrkz undef %k1, undef %ymm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vxorpszrmkz_vxorpszrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr512 }
+liveins:
+  - { reg: '%zmm2', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpszrmkz_vxorpszrrkz_test
+    %3 = COPY %zmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPSZrmkz
+    %zmm0 = VXORPSZrrkz undef %k1, undef %zmm1, %3
+    RET 0
+...
+---
+name:      stack_fold_vandnpdz128rmk_vandnpdz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpdz128rmk_vandnpdz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPDZ128rmk
+    %xmm0 = VANDNPDZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vandnpdz256rmk_vandnpdz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpdz256rmk_vandnpdz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPDZ256rmk
+    %ymm0 = VANDNPDZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vandnpdzrmk_vandnpdzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpdzrmk_vandnpdzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPDZrmk
+    %zmm0 = VANDNPDZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vandnpsz128rmk_vandnpsz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpsz128rmk_vandnpsz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPSZ128rmk
+    %xmm0 = VANDNPSZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vandnpsz256rmk_vandnpsz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpsz256rmk_vandnpsz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPSZ256rmk
+    %ymm0 = VANDNPSZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vandnpszrmk_vandnpszrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vandnpszrmk_vandnpszrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDNPSZrmk
+    %zmm0 = VANDNPSZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vandpdz128rmk_vandpdz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vandpdz128rmk_vandpdz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPDZ128rmk
+    %xmm0 = VANDPDZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vandpdz256rmk_vandpdz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vandpdz256rmk_vandpdz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPDZ256rmk
+    %ymm0 = VANDPDZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vandpdzrmk_vandpdzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vandpdzrmk_vandpdzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPDZrmk
+    %zmm0 = VANDPDZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vandpsz128rmk_vandpsz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vandpsz128rmk_vandpsz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPSZ128rmk
+    %xmm0 = VANDPSZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vandpsz256rmk_vandpsz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vandpsz256rmk_vandpsz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPSZ256rmk
+    %ymm0 = VANDPSZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vandpszrmk_vandpszrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vandpszrmk_vandpszrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VANDPSZrmk
+    %zmm0 = VANDPSZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vdbpsadbwz128rmik_vdbpsadbwz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vdbpsadbwz128rmik_vdbpsadbwz128rrik_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VDBPSADBWZ128rmik
+    %xmm0 = VDBPSADBWZ128rrik undef %xmm1, undef %k1, undef %xmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vdbpsadbwz256rmik_vdbpsadbwz256rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vdbpsadbwz256rmik_vdbpsadbwz256rrik_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VDBPSADBWZ256rmik
+    %ymm0 = VDBPSADBWZ256rrik undef %ymm1, undef %k1, undef %ymm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vdbpsadbwzrmik_vdbpsadbwzrrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vdbpsadbwzrmik_vdbpsadbwzrrik_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VDBPSADBWZrmik
+    %zmm0 = VDBPSADBWZrrik undef %zmm1, undef %k1, undef %zmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vinsertf32x8zrmk_vinsertf32x8zrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vinsertf32x8zrmk_vinsertf32x8zrrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTF32x8Zrmk
+    %zmm0 = VINSERTF32x8Zrrk undef %zmm1, undef %k1, undef %zmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vinsertf64x2z256rmk_vinsertf64x2z256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vinsertf64x2z256rmk_vinsertf64x2z256rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTF64x2Z256rmk
+    %ymm0 = VINSERTF64x2Z256rrk undef %ymm1, undef %k1, undef %ymm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vinsertf64x2zrmk_vinsertf64x2zrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vinsertf64x2zrmk_vinsertf64x2zrrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTF64x2Zrmk
+    %zmm0 = VINSERTF64x2Zrrk undef %zmm1, undef %k1, undef %zmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vinserti32x8zrmk_vinserti32x8zrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vinserti32x8zrmk_vinserti32x8zrrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTI32x8Zrmk
+    %zmm0 = VINSERTI32x8Zrrk undef %zmm1, undef %k1, undef %zmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vinserti64x2z256rmk_vinserti64x2z256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vinserti64x2z256rmk_vinserti64x2z256rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTI64x2Z256rmk
+    %ymm0 = VINSERTI64x2Z256rrk undef %ymm1, undef %k1, undef %ymm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vinserti64x2zrmk_vinserti64x2zrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vinserti64x2zrmk_vinserti64x2zrrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VINSERTI64x2Zrmk
+    %zmm0 = VINSERTI64x2Zrrk undef %zmm1, undef %k1, undef %zmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vorpdz128rmk_vorpdz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vorpdz128rmk_vorpdz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPDZ128rmk
+    %xmm0 = VORPDZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vorpdz256rmk_vorpdz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vorpdz256rmk_vorpdz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPDZ256rmk
+    %ymm0 = VORPDZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vorpdzrmk_vorpdzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vorpdzrmk_vorpdzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPDZrmk
+    %zmm0 = VORPDZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vorpsz128rmk_vorpsz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vorpsz128rmk_vorpsz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPSZ128rmk
+    %xmm0 = VORPSZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vorpsz256rmk_vorpsz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vorpsz256rmk_vorpsz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPSZ256rmk
+    %ymm0 = VORPSZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vorpszrmk_vorpszrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vorpszrmk_vorpszrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VORPSZrmk
+    %zmm0 = VORPSZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpackssdwz128rmk_vpackssdwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpackssdwz128rmk_vpackssdwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSDWZ128rmk
+    %xmm0 = VPACKSSDWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpackssdwz256rmk_vpackssdwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpackssdwz256rmk_vpackssdwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSDWZ256rmk
+    %ymm0 = VPACKSSDWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpackssdwzrmk_vpackssdwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpackssdwzrmk_vpackssdwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSDWZrmk
+    %zmm0 = VPACKSSDWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpacksswbz128rmk_vpacksswbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpacksswbz128rmk_vpacksswbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSWBZ128rmk
+    %xmm0 = VPACKSSWBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpacksswbz256rmk_vpacksswbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpacksswbz256rmk_vpacksswbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSWBZ256rmk
+    %ymm0 = VPACKSSWBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpacksswbzrmk_vpacksswbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpacksswbzrmk_vpacksswbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKSSWBZrmk
+    %zmm0 = VPACKSSWBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpackusdwz128rmk_vpackusdwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpackusdwz128rmk_vpackusdwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSDWZ128rmk
+    %xmm0 = VPACKUSDWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpackusdwz256rmk_vpackusdwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpackusdwz256rmk_vpackusdwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSDWZ256rmk
+    %ymm0 = VPACKUSDWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpackusdwzrmk_vpackusdwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpackusdwzrmk_vpackusdwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSDWZrmk
+    %zmm0 = VPACKUSDWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpackuswbz128rmk_vpackuswbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpackuswbz128rmk_vpackuswbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSWBZ128rmk
+    %xmm0 = VPACKUSWBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpackuswbz256rmk_vpackuswbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpackuswbz256rmk_vpackuswbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSWBZ256rmk
+    %ymm0 = VPACKUSWBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpackuswbzrmk_vpackuswbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpackuswbzrmk_vpackuswbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPACKUSWBZrmk
+    %zmm0 = VPACKUSWBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddbz128rmk_vpaddbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddbz128rmk_vpaddbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDBZ128rmk
+    %xmm0 = VPADDBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddbz256rmk_vpaddbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddbz256rmk_vpaddbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDBZ256rmk
+    %ymm0 = VPADDBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddbzrmk_vpaddbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddbzrmk_vpaddbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDBZrmk
+    %zmm0 = VPADDBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddsbz128rmk_vpaddsbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddsbz128rmk_vpaddsbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSBZ128rmk
+    %xmm0 = VPADDSBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddsbz256rmk_vpaddsbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddsbz256rmk_vpaddsbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSBZ256rmk
+    %ymm0 = VPADDSBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddsbzrmk_vpaddsbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddsbzrmk_vpaddsbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSBZrmk
+    %zmm0 = VPADDSBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddswz128rmk_vpaddswz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddswz128rmk_vpaddswz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSWZ128rmk
+    %xmm0 = VPADDSWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddswz256rmk_vpaddswz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddswz256rmk_vpaddswz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSWZ256rmk
+    %ymm0 = VPADDSWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddswzrmk_vpaddswzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddswzrmk_vpaddswzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDSWZrmk
+    %zmm0 = VPADDSWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddusbz128rmk_vpaddusbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddusbz128rmk_vpaddusbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSBZ128rmk
+    %xmm0 = VPADDUSBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddusbz256rmk_vpaddusbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddusbz256rmk_vpaddusbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSBZ256rmk
+    %ymm0 = VPADDUSBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddusbzrmk_vpaddusbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddusbzrmk_vpaddusbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSBZrmk
+    %zmm0 = VPADDUSBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpadduswz128rmk_vpadduswz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpadduswz128rmk_vpadduswz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSWZ128rmk
+    %xmm0 = VPADDUSWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpadduswz256rmk_vpadduswz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpadduswz256rmk_vpadduswz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSWZ256rmk
+    %ymm0 = VPADDUSWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpadduswzrmk_vpadduswzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpadduswzrmk_vpadduswzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDUSWZrmk
+    %zmm0 = VPADDUSWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddwz128rmk_vpaddwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddwz128rmk_vpaddwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDWZ128rmk
+    %xmm0 = VPADDWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddwz256rmk_vpaddwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddwz256rmk_vpaddwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDWZ256rmk
+    %ymm0 = VPADDWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpaddwzrmk_vpaddwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpaddwzrmk_vpaddwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPADDWZrmk
+    %zmm0 = VPADDWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpalignrz128rmik_vpalignrz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpalignrz128rmik_vpalignrz128rrik_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPALIGNRZ128rmik
+    %xmm0 = VPALIGNRZ128rrik undef %xmm1, undef %k1, undef %xmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vpalignrz256rmik_vpalignrz256rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpalignrz256rmik_vpalignrz256rrik_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPALIGNRZ256rmik
+    %ymm0 = VPALIGNRZ256rrik undef %ymm1, undef %k1, undef %ymm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vpalignrzrmik_vpalignrzrrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpalignrzrmik_vpalignrzrrik_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPALIGNRZrmik
+    %zmm0 = VPALIGNRZrrik undef %zmm1, undef %k1, undef %zmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vpavgbz128rmk_vpavgbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgbz128rmk_vpavgbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGBZ128rmk
+    %xmm0 = VPAVGBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpavgbz256rmk_vpavgbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgbz256rmk_vpavgbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGBZ256rmk
+    %ymm0 = VPAVGBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpavgbzrmk_vpavgbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgbzrmk_vpavgbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGBZrmk
+    %zmm0 = VPAVGBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpavgwz128rmk_vpavgwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgwz128rmk_vpavgwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGWZ128rmk
+    %xmm0 = VPAVGWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpavgwz256rmk_vpavgwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgwz256rmk_vpavgwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGWZ256rmk
+    %ymm0 = VPAVGWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpavgwzrmk_vpavgwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpavgwzrmk_vpavgwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPAVGWZrmk
+    %zmm0 = VPAVGWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermbz128rmk_vpermbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermbz128rmk_vpermbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMBZ128rmk
+    %xmm0 = VPERMBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermbz256rmk_vpermbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermbz256rmk_vpermbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMBZ256rmk
+    %ymm0 = VPERMBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermbzrmk_vpermbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermbzrmk_vpermbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMBZrmk
+    %zmm0 = VPERMBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermi2b128rmk_vpermi2b128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2b128rmk_vpermi2b128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2B128rmk
+    %xmm0 = VPERMI2B128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermi2b128rmkz_vpermi2b128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2b128rmkz_vpermi2b128rrkz_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2B128rmkz
+    %xmm0 = VPERMI2B128rrkz undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermi2b256rmk_vpermi2b256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2b256rmk_vpermi2b256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2B256rmk
+    %ymm0 = VPERMI2B256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermi2b256rmkz_vpermi2b256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2b256rmkz_vpermi2b256rrkz_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2B256rmkz
+    %ymm0 = VPERMI2B256rrkz undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermi2brmk_vpermi2brrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2brmk_vpermi2brrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2Brmk
+    %zmm0 = VPERMI2Brrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermi2brmkz_vpermi2brrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2brmkz_vpermi2brrkz_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2Brmkz
+    %zmm0 = VPERMI2Brrkz undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermi2w128rmk_vpermi2w128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2w128rmk_vpermi2w128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2W128rmk
+    %xmm0 = VPERMI2W128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermi2w128rmkz_vpermi2w128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2w128rmkz_vpermi2w128rrkz_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2W128rmkz
+    %xmm0 = VPERMI2W128rrkz undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermi2w256rmk_vpermi2w256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2w256rmk_vpermi2w256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2W256rmk
+    %ymm0 = VPERMI2W256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermi2w256rmkz_vpermi2w256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2w256rmkz_vpermi2w256rrkz_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2W256rmkz
+    %ymm0 = VPERMI2W256rrkz undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermi2wrmk_vpermi2wrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2wrmk_vpermi2wrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2Wrmk
+    %zmm0 = VPERMI2Wrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermi2wrmkz_vpermi2wrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermi2wrmkz_vpermi2wrrkz_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMI2Wrmkz
+    %zmm0 = VPERMI2Wrrkz undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermt2b128rmk_vpermt2b128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2b128rmk_vpermt2b128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2B128rmk
+    %xmm0 = VPERMT2B128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermt2b128rmkz_vpermt2b128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2b128rmkz_vpermt2b128rrkz_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2B128rmkz
+    %xmm0 = VPERMT2B128rrkz undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermt2b256rmk_vpermt2b256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2b256rmk_vpermt2b256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2B256rmk
+    %ymm0 = VPERMT2B256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermt2b256rmkz_vpermt2b256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2b256rmkz_vpermt2b256rrkz_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2B256rmkz
+    %ymm0 = VPERMT2B256rrkz undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermt2brmk_vpermt2brrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2brmk_vpermt2brrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2Brmk
+    %zmm0 = VPERMT2Brrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermt2brmkz_vpermt2brrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2brmkz_vpermt2brrkz_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2Brmkz
+    %zmm0 = VPERMT2Brrkz undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermt2w128rmk_vpermt2w128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2w128rmk_vpermt2w128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2W128rmk
+    %xmm0 = VPERMT2W128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermt2w128rmkz_vpermt2w128rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2w128rmkz_vpermt2w128rrkz_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2W128rmkz
+    %xmm0 = VPERMT2W128rrkz undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermt2w256rmk_vpermt2w256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2w256rmk_vpermt2w256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2W256rmk
+    %ymm0 = VPERMT2W256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermt2w256rmkz_vpermt2w256rrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2w256rmkz_vpermt2w256rrkz_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2W256rmkz
+    %ymm0 = VPERMT2W256rrkz undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermt2wrmk_vpermt2wrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2wrmk_vpermt2wrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2Wrmk
+    %zmm0 = VPERMT2Wrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermt2wrmkz_vpermt2wrrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermt2wrmkz_vpermt2wrrkz_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMT2Wrmkz
+    %zmm0 = VPERMT2Wrrkz undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermwz128rmk_vpermwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermwz128rmk_vpermwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMWZ128rmk
+    %xmm0 = VPERMWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermwz256rmk_vpermwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermwz256rmk_vpermwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMWZ256rmk
+    %ymm0 = VPERMWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpermwzrmk_vpermwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermwzrmk_vpermwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMWZrmk
+    %zmm0 = VPERMWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52huqz128mk_vpmadd52huqz128rk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52huqz128mk_vpmadd52huqz128rk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52HUQZ128mk
+    %xmm0 = VPMADD52HUQZ128rk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52huqz128mkz_vpmadd52huqz128rkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52huqz128mkz_vpmadd52huqz128rkz_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52HUQZ128mkz
+    %xmm0 = VPMADD52HUQZ128rkz undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52huqz256mk_vpmadd52huqz256rk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52huqz256mk_vpmadd52huqz256rk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52HUQZ256mk
+    %ymm0 = VPMADD52HUQZ256rk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52huqz256mkz_vpmadd52huqz256rkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52huqz256mkz_vpmadd52huqz256rkz_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52HUQZ256mkz
+    %ymm0 = VPMADD52HUQZ256rkz undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52huqzmk_vpmadd52huqzrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52huqzmk_vpmadd52huqzrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52HUQZmk
+    %zmm0 = VPMADD52HUQZrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52huqzmkz_vpmadd52huqzrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52huqzmkz_vpmadd52huqzrkz_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52HUQZmkz
+    %zmm0 = VPMADD52HUQZrkz undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52luqz128mk_vpmadd52luqz128rk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52luqz128mk_vpmadd52luqz128rk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52LUQZ128mk
+    %xmm0 = VPMADD52LUQZ128rk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52luqz128mkz_vpmadd52luqz128rkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52luqz128mkz_vpmadd52luqz128rkz_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52LUQZ128mkz
+    %xmm0 = VPMADD52LUQZ128rkz undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52luqz256mk_vpmadd52luqz256rk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52luqz256mk_vpmadd52luqz256rk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52LUQZ256mk
+    %ymm0 = VPMADD52LUQZ256rk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52luqz256mkz_vpmadd52luqz256rkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52luqz256mkz_vpmadd52luqz256rkz_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52LUQZ256mkz
+    %ymm0 = VPMADD52LUQZ256rkz undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52luqzmk_vpmadd52luqzrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52luqzmk_vpmadd52luqzrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52LUQZmk
+    %zmm0 = VPMADD52LUQZrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmadd52luqzmkz_vpmadd52luqzrkz_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadd52luqzmkz_vpmadd52luqzrkz_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADD52LUQZmkz
+    %zmm0 = VPMADD52LUQZrkz undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaddubswz128rmk_vpmaddubswz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddubswz128rmk_vpmaddubswz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDUBSWZ128rmk
+    %xmm0 = VPMADDUBSWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaddubswz256rmk_vpmaddubswz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddubswz256rmk_vpmaddubswz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDUBSWZ256rmk
+    %ymm0 = VPMADDUBSWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaddubswzrmk_vpmaddubswzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddubswzrmk_vpmaddubswzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDUBSWZrmk
+    %zmm0 = VPMADDUBSWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaddwdz128rmk_vpmaddwdz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddwdz128rmk_vpmaddwdz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDWDZ128rmk
+    %xmm0 = VPMADDWDZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaddwdz256rmk_vpmaddwdz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddwdz256rmk_vpmaddwdz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDWDZ256rmk
+    %ymm0 = VPMADDWDZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaddwdzrmk_vpmaddwdzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaddwdzrmk_vpmaddwdzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADDWDZrmk
+    %zmm0 = VPMADDWDZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaxsbz128rmk_vpmaxsbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxsbz128rmk_vpmaxsbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSBZ128rmk
+    %xmm0 = VPMAXSBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaxsbz256rmk_vpmaxsbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxsbz256rmk_vpmaxsbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSBZ256rmk
+    %ymm0 = VPMAXSBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaxsbzrmk_vpmaxsbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxsbzrmk_vpmaxsbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSBZrmk
+    %zmm0 = VPMAXSBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaxswz128rmk_vpmaxswz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxswz128rmk_vpmaxswz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSWZ128rmk
+    %xmm0 = VPMAXSWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaxswz256rmk_vpmaxswz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxswz256rmk_vpmaxswz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSWZ256rmk
+    %ymm0 = VPMAXSWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaxswzrmk_vpmaxswzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxswzrmk_vpmaxswzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXSWZrmk
+    %zmm0 = VPMAXSWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaxubz128rmk_vpmaxubz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxubz128rmk_vpmaxubz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUBZ128rmk
+    %xmm0 = VPMAXUBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaxubz256rmk_vpmaxubz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxubz256rmk_vpmaxubz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUBZ256rmk
+    %ymm0 = VPMAXUBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaxubzrmk_vpmaxubzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxubzrmk_vpmaxubzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUBZrmk
+    %zmm0 = VPMAXUBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaxuwz128rmk_vpmaxuwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxuwz128rmk_vpmaxuwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUWZ128rmk
+    %xmm0 = VPMAXUWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaxuwz256rmk_vpmaxuwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxuwz256rmk_vpmaxuwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUWZ256rmk
+    %ymm0 = VPMAXUWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmaxuwzrmk_vpmaxuwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmaxuwzrmk_vpmaxuwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMAXUWZrmk
+    %zmm0 = VPMAXUWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpminsbz128rmk_vpminsbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpminsbz128rmk_vpminsbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSBZ128rmk
+    %xmm0 = VPMINSBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpminsbz256rmk_vpminsbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpminsbz256rmk_vpminsbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSBZ256rmk
+    %ymm0 = VPMINSBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpminsbzrmk_vpminsbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpminsbzrmk_vpminsbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSBZrmk
+    %zmm0 = VPMINSBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpminswz128rmk_vpminswz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpminswz128rmk_vpminswz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSWZ128rmk
+    %xmm0 = VPMINSWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpminswz256rmk_vpminswz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpminswz256rmk_vpminswz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSWZ256rmk
+    %ymm0 = VPMINSWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpminswzrmk_vpminswzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpminswzrmk_vpminswzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINSWZrmk
+    %zmm0 = VPMINSWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpminubz128rmk_vpminubz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpminubz128rmk_vpminubz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUBZ128rmk
+    %xmm0 = VPMINUBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpminubz256rmk_vpminubz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpminubz256rmk_vpminubz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUBZ256rmk
+    %ymm0 = VPMINUBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpminubzrmk_vpminubzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpminubzrmk_vpminubzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUBZrmk
+    %zmm0 = VPMINUBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpminuwz128rmk_vpminuwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpminuwz128rmk_vpminuwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUWZ128rmk
+    %xmm0 = VPMINUWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpminuwz256rmk_vpminuwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpminuwz256rmk_vpminuwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUWZ256rmk
+    %ymm0 = VPMINUWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpminuwzrmk_vpminuwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpminuwzrmk_vpminuwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMINUWZrmk
+    %zmm0 = VPMINUWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmulhrswz128rmk_vpmulhrswz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhrswz128rmk_vpmulhrswz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHRSWZ128rmk
+    %xmm0 = VPMULHRSWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmulhrswz256rmk_vpmulhrswz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhrswz256rmk_vpmulhrswz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHRSWZ256rmk
+    %ymm0 = VPMULHRSWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmulhrswzrmk_vpmulhrswzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhrswzrmk_vpmulhrswzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHRSWZrmk
+    %zmm0 = VPMULHRSWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmulhuwz128rmk_vpmulhuwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhuwz128rmk_vpmulhuwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHUWZ128rmk
+    %xmm0 = VPMULHUWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmulhuwz256rmk_vpmulhuwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhuwz256rmk_vpmulhuwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHUWZ256rmk
+    %ymm0 = VPMULHUWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmulhuwzrmk_vpmulhuwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhuwzrmk_vpmulhuwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHUWZrmk
+    %zmm0 = VPMULHUWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmulhwz128rmk_vpmulhwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhwz128rmk_vpmulhwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHWZ128rmk
+    %xmm0 = VPMULHWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmulhwz256rmk_vpmulhwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhwz256rmk_vpmulhwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHWZ256rmk
+    %ymm0 = VPMULHWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmulhwzrmk_vpmulhwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmulhwzrmk_vpmulhwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULHWZrmk
+    %zmm0 = VPMULHWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmullqz128rmk_vpmullqz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullqz128rmk_vpmullqz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLQZ128rmk
+    %xmm0 = VPMULLQZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmullqz256rmk_vpmullqz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullqz256rmk_vpmullqz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLQZ256rmk
+    %ymm0 = VPMULLQZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmullqzrmk_vpmullqzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullqzrmk_vpmullqzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLQZrmk
+    %zmm0 = VPMULLQZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmullwz128rmk_vpmullwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullwz128rmk_vpmullwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLWZ128rmk
+    %xmm0 = VPMULLWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmullwz256rmk_vpmullwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullwz256rmk_vpmullwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLWZ256rmk
+    %ymm0 = VPMULLWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmullwzrmk_vpmullwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmullwzrmk_vpmullwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULLWZrmk
+    %zmm0 = VPMULLWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmultishiftqbz128rmk_vpmultishiftqbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmultishiftqbz128rmk_vpmultishiftqbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULTISHIFTQBZ128rmk
+    %xmm0 = VPMULTISHIFTQBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmultishiftqbz256rmk_vpmultishiftqbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmultishiftqbz256rmk_vpmultishiftqbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULTISHIFTQBZ256rmk
+    %ymm0 = VPMULTISHIFTQBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpmultishiftqbzrmk_vpmultishiftqbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpmultishiftqbzrmk_vpmultishiftqbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMULTISHIFTQBZrmk
+    %zmm0 = VPMULTISHIFTQBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpshufbz128rmk_vpshufbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufbz128rmk_vpshufbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFBZ128rmk
+    %xmm0 = VPSHUFBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpshufbz256rmk_vpshufbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufbz256rmk_vpshufbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFBZ256rmk
+    %ymm0 = VPSHUFBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpshufbzrmk_vpshufbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpshufbzrmk_vpshufbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHUFBZrmk
+    %zmm0 = VPSHUFBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsllvwz128rmk_vpsllvwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllvwz128rmk_vpsllvwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLVWZ128rmk
+    %xmm0 = VPSLLVWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsllvwz256rmk_vpsllvwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllvwz256rmk_vpsllvwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLVWZ256rmk
+    %ymm0 = VPSLLVWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsllvwzrmk_vpsllvwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllvwzrmk_vpsllvwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLVWZrmk
+    %zmm0 = VPSLLVWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsllwz128rmk_vpsllwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwz128rmk_vpsllwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZ128rmk
+    %xmm0 = VPSLLWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsllwz256rmk_vpsllwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwz256rmk_vpsllwz256rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZ256rmk
+    %ymm0 = VPSLLWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsllwzrmk_vpsllwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsllwzrmk_vpsllwzrrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSLLWZrmk
+    %zmm0 = VPSLLWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsravwz128rmk_vpsravwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsravwz128rmk_vpsravwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAVWZ128rmk
+    %xmm0 = VPSRAVWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsravwz256rmk_vpsravwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsravwz256rmk_vpsravwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAVWZ256rmk
+    %ymm0 = VPSRAVWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsravwzrmk_vpsravwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsravwzrmk_vpsravwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAVWZrmk
+    %zmm0 = VPSRAVWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsrawz128rmk_vpsrawz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawz128rmk_vpsrawz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZ128rmk
+    %xmm0 = VPSRAWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsrawz256rmk_vpsrawz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawz256rmk_vpsrawz256rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZ256rmk
+    %ymm0 = VPSRAWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsrawzrmk_vpsrawzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrawzrmk_vpsrawzrrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRAWZrmk
+    %zmm0 = VPSRAWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsrlvwz128rmk_vpsrlvwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlvwz128rmk_vpsrlvwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLVWZ128rmk
+    %xmm0 = VPSRLVWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsrlvwz256rmk_vpsrlvwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlvwz256rmk_vpsrlvwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLVWZ256rmk
+    %ymm0 = VPSRLVWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsrlvwzrmk_vpsrlvwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlvwzrmk_vpsrlvwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLVWZrmk
+    %zmm0 = VPSRLVWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwz128rmk_vpsrlwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwz128rmk_vpsrlwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZ128rmk
+    %xmm0 = VPSRLWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwz256rmk_vpsrlwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwz256rmk_vpsrlwz256rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZ256rmk
+    %ymm0 = VPSRLWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsrlwzrmk_vpsrlwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsrlwzrmk_vpsrlwzrrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSRLWZrmk
+    %zmm0 = VPSRLWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubbz128rmk_vpsubbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubbz128rmk_vpsubbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBBZ128rmk
+    %xmm0 = VPSUBBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubbz256rmk_vpsubbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubbz256rmk_vpsubbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBBZ256rmk
+    %ymm0 = VPSUBBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubbzrmk_vpsubbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubbzrmk_vpsubbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBBZrmk
+    %zmm0 = VPSUBBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubsbz128rmk_vpsubsbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubsbz128rmk_vpsubsbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSBZ128rmk
+    %xmm0 = VPSUBSBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubsbz256rmk_vpsubsbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubsbz256rmk_vpsubsbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSBZ256rmk
+    %ymm0 = VPSUBSBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubsbzrmk_vpsubsbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubsbzrmk_vpsubsbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSBZrmk
+    %zmm0 = VPSUBSBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubswz128rmk_vpsubswz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubswz128rmk_vpsubswz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSWZ128rmk
+    %xmm0 = VPSUBSWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubswz256rmk_vpsubswz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubswz256rmk_vpsubswz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSWZ256rmk
+    %ymm0 = VPSUBSWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubswzrmk_vpsubswzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubswzrmk_vpsubswzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBSWZrmk
+    %zmm0 = VPSUBSWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubusbz128rmk_vpsubusbz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubusbz128rmk_vpsubusbz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSBZ128rmk
+    %xmm0 = VPSUBUSBZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubusbz256rmk_vpsubusbz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubusbz256rmk_vpsubusbz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSBZ256rmk
+    %ymm0 = VPSUBUSBZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubusbzrmk_vpsubusbzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubusbzrmk_vpsubusbzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSBZrmk
+    %zmm0 = VPSUBUSBZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubuswz128rmk_vpsubuswz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubuswz128rmk_vpsubuswz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSWZ128rmk
+    %xmm0 = VPSUBUSWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubuswz256rmk_vpsubuswz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubuswz256rmk_vpsubuswz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSWZ256rmk
+    %ymm0 = VPSUBUSWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubuswzrmk_vpsubuswzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubuswzrmk_vpsubuswzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBUSWZrmk
+    %zmm0 = VPSUBUSWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubwz128rmk_vpsubwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubwz128rmk_vpsubwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBWZ128rmk
+    %xmm0 = VPSUBWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubwz256rmk_vpsubwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubwz256rmk_vpsubwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBWZ256rmk
+    %ymm0 = VPSUBWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpsubwzrmk_vpsubwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpsubwzrmk_vpsubwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSUBWZrmk
+    %zmm0 = VPSUBWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhbwz128rmk_vpunpckhbwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhbwz128rmk_vpunpckhbwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHBWZ128rmk
+    %xmm0 = VPUNPCKHBWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhbwz256rmk_vpunpckhbwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhbwz256rmk_vpunpckhbwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHBWZ256rmk
+    %ymm0 = VPUNPCKHBWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhbwzrmk_vpunpckhbwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhbwzrmk_vpunpckhbwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHBWZrmk
+    %zmm0 = VPUNPCKHBWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhwdz128rmk_vpunpckhwdz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhwdz128rmk_vpunpckhwdz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHWDZ128rmk
+    %xmm0 = VPUNPCKHWDZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhwdz256rmk_vpunpckhwdz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhwdz256rmk_vpunpckhwdz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHWDZ256rmk
+    %ymm0 = VPUNPCKHWDZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpunpckhwdzrmk_vpunpckhwdzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpckhwdzrmk_vpunpckhwdzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKHWDZrmk
+    %zmm0 = VPUNPCKHWDZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklbwz128rmk_vpunpcklbwz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklbwz128rmk_vpunpcklbwz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLBWZ128rmk
+    %xmm0 = VPUNPCKLBWZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklbwz256rmk_vpunpcklbwz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklbwz256rmk_vpunpcklbwz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLBWZ256rmk
+    %ymm0 = VPUNPCKLBWZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklbwzrmk_vpunpcklbwzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklbwzrmk_vpunpcklbwzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLBWZrmk
+    %zmm0 = VPUNPCKLBWZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklwdz128rmk_vpunpcklwdz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklwdz128rmk_vpunpcklwdz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLWDZ128rmk
+    %xmm0 = VPUNPCKLWDZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklwdz256rmk_vpunpcklwdz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklwdz256rmk_vpunpcklwdz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLWDZ256rmk
+    %ymm0 = VPUNPCKLWDZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vpunpcklwdzrmk_vpunpcklwdzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpunpcklwdzrmk_vpunpcklwdzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPUNPCKLWDZrmk
+    %zmm0 = VPUNPCKLWDZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vrangepdz128rmik_vrangepdz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepdz128rmik_vrangepdz128rrik_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPDZ128rmik
+    %xmm0 = VRANGEPDZ128rrik undef %xmm1, undef %k1, undef %xmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepdz256rmik_vrangepdz256rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepdz256rmik_vrangepdz256rrik_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPDZ256rmik
+    %ymm0 = VRANGEPDZ256rrik undef %ymm1, undef %k1, undef %ymm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepdzrmbik_vrangepdzrribk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepdzrmbik_vrangepdzrribk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPDZrmbik
+    %zmm0 = VRANGEPDZrribk undef %zmm1, undef %k1, undef %zmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepdzrmik_vrangepdzrrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepdzrmik_vrangepdzrrik_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPDZrmik
+    %zmm0 = VRANGEPDZrrik undef %zmm1, undef %k1, undef %zmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepsz128rmik_vrangepsz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepsz128rmik_vrangepsz128rrik_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPSZ128rmik
+    %xmm0 = VRANGEPSZ128rrik undef %xmm1, undef %k1, undef %xmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepsz256rmik_vrangepsz256rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepsz256rmik_vrangepsz256rrik_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPSZ256rmik
+    %ymm0 = VRANGEPSZ256rrik undef %ymm1, undef %k1, undef %ymm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepszrmbik_vrangepszrribk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepszrmbik_vrangepszrribk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPSZrmbik
+    %zmm0 = VRANGEPSZrribk undef %zmm1, undef %k1, undef %zmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangepszrmik_vrangepszrrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrangepszrmik_vrangepszrrik_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGEPSZrmik
+    %zmm0 = VRANGEPSZrrik undef %zmm1, undef %k1, undef %zmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangesdz128rmik_vrangesdz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrangesdz128rmik_vrangesdz128rrik_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGESDZ128rmik
+    %xmm0 = VRANGESDZ128rrik undef %xmm1, undef %k1, undef %xmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vrangessz128rmik_vrangessz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrangessz128rmik_vrangessz128rrik_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRANGESSZ128rmik
+    %xmm0 = VRANGESSZ128rrik undef %xmm1, undef %k1, undef %xmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vrcp28sdmk_vrcp28sdrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28sdmk_vrcp28sdrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28SDmk
+    %xmm0 = VRCP28SDrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vrcp28ssmk_vrcp28ssrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrcp28ssmk_vrcp28ssrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCP28SSmk
+    %xmm0 = VRCP28SSrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vreducesdz128rmik_vreducesdz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vreducesdz128rmik_vreducesdz128rrik_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCESDZ128rmik
+    %xmm0 = VREDUCESDZ128rrik undef %xmm1, undef %k1, undef %xmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vreducessz128rmik_vreducessz128rrik_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vreducessz128rmik_vreducessz128rrik_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VREDUCESSZ128rmik
+    %xmm0 = VREDUCESSZ128rrik undef %xmm1, undef %k1, undef %xmm2, %4, 0
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28sdmk_vrsqrt28sdrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28sdmk_vrsqrt28sdrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28SDmk
+    %xmm0 = VRSQRT28SDrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vrsqrt28ssmk_vrsqrt28ssrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrt28ssmk_vrsqrt28ssrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRT28SSmk
+    %xmm0 = VRSQRT28SSrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vxorpdz128rmk_vxorpdz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpdz128rmk_vxorpdz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPDZ128rmk
+    %xmm0 = VXORPDZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vxorpdz256rmk_vxorpdz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpdz256rmk_vxorpdz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPDZ256rmk
+    %ymm0 = VXORPDZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vxorpdzrmk_vxorpdzrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpdzrmk_vxorpdzrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPDZrmk
+    %zmm0 = VXORPDZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vxorpsz128rmk_vxorpsz128rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr128x }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpsz128rmk_vxorpsz128rrk_test
+    %4 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPSZ128rmk
+    %xmm0 = VXORPSZ128rrk undef %xmm1, undef %k1, undef %xmm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vxorpsz256rmk_vxorpsz256rrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr256x }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpsz256rmk_vxorpsz256rrk_test
+    %4 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPSZ256rmk
+    %ymm0 = VXORPSZ256rrk undef %ymm1, undef %k1, undef %ymm2, %4
+    RET 0
+...
+---
+name:      stack_fold_vxorpszrmk_vxorpszrrk_test
+tracksRegLiveness: true
+registers:
+  - { id: 4, class: vr512 }
+liveins:
+  - { reg: '%zmm3', virtual-reg: '%4' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %zmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vxorpszrmk_vxorpszrrk_test
+    %4 = COPY %zmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VXORPSZrmk
+    %zmm0 = VXORPSZrrk undef %zmm1, undef %k1, undef %zmm2, %4
+    RET 0
+...

test/CodeGen/X86/memoryFolding-other.mir

+# RUN: llc -run-pass greedy -stack-alignment=64 -o - %s | FileCheck %s
+# Stack alignment set to 64 to enable folding of aligned mov instructions.
+--- |
+  attributes #0 = { "target-features" = "+3dnow,+adx,+bmi,+bmi2,+cmov,+f16c,+fma,+fma4,+lzcnt,+mmx,+mpx,+popcnt,+sha,+tbm,+xop" }
+  define void @stack_fold_bndmovmr32mr_bndmovmrrr_test() #0 { ret void }
+  define void @stack_fold_mmx_movd64from64rm_mmx_movd64from64rr_test() #0 { ret void }
+  define void @stack_fold_mmx_movd64mr_mmx_movd64rr_test() #0 { ret void }
+  define void @stack_fold_mmx_movq64mr_mmx_movq64rr_test() #0 { ret void }
+  define void @stack_fold_vcvtps2phymr_vcvtps2phyrr_test() #0 { ret void }
+  define void @stack_fold_vcvtps2phmr_vcvtps2phrr_test() #0 { ret void }
+  define void @stack_fold_adox32rm_adox32rr_test() #0 { ret void }
+  define void @stack_fold_adox64rm_adox64rr_test() #0 { ret void }
+  define void @stack_fold_bextr32rm_bextr32rr_test() #0 { ret void }
+  define void @stack_fold_bextr64rm_bextr64rr_test() #0 { ret void }
+  define void @stack_fold_bextri32mi_bextri32ri_test() #0 { ret void }
+  define void @stack_fold_bextri64mi_bextri64ri_test() #0 { ret void }
+  define void @stack_fold_blcfill32rm_blcfill32rr_test() #0 { ret void }
+  define void @stack_fold_blcfill64rm_blcfill64rr_test() #0 { ret void }
+  define void @stack_fold_blci32rm_blci32rr_test() #0 { ret void }
+  define void @stack_fold_blci64rm_blci64rr_test() #0 { ret void }
+  define void @stack_fold_blcic32rm_blcic32rr_test() #0 { ret void }
+  define void @stack_fold_blcic64rm_blcic64rr_test() #0 { ret void }
+  define void @stack_fold_blcmsk32rm_blcmsk32rr_test() #0 { ret void }
+  define void @stack_fold_blcmsk64rm_blcmsk64rr_test() #0 { ret void }
+  define void @stack_fold_blcs32rm_blcs32rr_test() #0 { ret void }
+  define void @stack_fold_blcs64rm_blcs64rr_test() #0 { ret void }
+  define void @stack_fold_blsfill32rm_blsfill32rr_test() #0 { ret void }
+  define void @stack_fold_blsfill64rm_blsfill64rr_test() #0 { ret void }
+  define void @stack_fold_blsi32rm_blsi32rr_test() #0 { ret void }
+  define void @stack_fold_blsi64rm_blsi64rr_test() #0 { ret void }
+  define void @stack_fold_blsic32rm_blsic32rr_test() #0 { ret void }
+  define void @stack_fold_blsic64rm_blsic64rr_test() #0 { ret void }
+  define void @stack_fold_blsmsk32rm_blsmsk32rr_test() #0 { ret void }
+  define void @stack_fold_blsmsk64rm_blsmsk64rr_test() #0 { ret void }
+  define void @stack_fold_blsr32rm_blsr32rr_test() #0 { ret void }
+  define void @stack_fold_blsr64rm_blsr64rr_test() #0 { ret void }
+  define void @stack_fold_bndcl32rm_bndcl32rr_test() #0 { ret void }
+  define void @stack_fold_bndcl64rm_bndcl64rr_test() #0 { ret void }
+  define void @stack_fold_bndcn32rm_bndcn32rr_test() #0 { ret void }
+  define void @stack_fold_bndcn64rm_bndcn64rr_test() #0 { ret void }
+  define void @stack_fold_bndcu32rm_bndcu32rr_test() #0 { ret void }
+  define void @stack_fold_bndcu64rm_bndcu64rr_test() #0 { ret void }
+  define void @stack_fold_bndmovrm32rm_bndmovrmrr_test() #0 { ret void }
+  define void @stack_fold_bzhi32rm_bzhi32rr_test() #0 { ret void }
+  define void @stack_fold_bzhi64rm_bzhi64rr_test() #0 { ret void }
+  define void @stack_fold_lzcnt16rm_lzcnt16rr_test() #0 { ret void }
+  define void @stack_fold_lzcnt32rm_lzcnt32rr_test() #0 { ret void }
+  define void @stack_fold_lzcnt64rm_lzcnt64rr_test() #0 { ret void }
+  define void @stack_fold_mmx_movd64rm_mmx_movd64rr_test() #0 { ret void }
+  define void @stack_fold_mmx_movd64to64rm_mmx_movd64to64rr_test() #0 { ret void }
+  define void @stack_fold_mmx_movq64rm_mmx_movq64rr_test() #0 { ret void }
+  define void @stack_fold_mmx_pshufwmi_mmx_pshufwri_test() #0 { ret void }
+  define void @stack_fold_pf2idrm_pf2idrr_test() #0 { ret void }
+  define void @stack_fold_pf2iwrm_pf2iwrr_test() #0 { ret void }
+  define void @stack_fold_pfrcprm_pfrcprr_test() #0 { ret void }
+  define void @stack_fold_pfrsqrtrm_pfrsqrtrr_test() #0 { ret void }
+  define void @stack_fold_pi2fdrm_pi2fdrr_test() #0 { ret void }
+  define void @stack_fold_pi2fwrm_pi2fwrr_test() #0 { ret void }
+  define void @stack_fold_popcnt16rm_popcnt16rr_test() #0 { ret void }
+  define void @stack_fold_popcnt32rm_popcnt32rr_test() #0 { ret void }
+  define void @stack_fold_popcnt64rm_popcnt64rr_test() #0 { ret void }
+  define void @stack_fold_pswapdrm_pswapdrr_test() #0 { ret void }
+  define void @stack_fold_rorx32mi_rorx32ri_test() #0 { ret void }
+  define void @stack_fold_rorx64mi_rorx64ri_test() #0 { ret void }
+  define void @stack_fold_sarx32rm_sarx32rr_test() #0 { ret void }
+  define void @stack_fold_sarx64rm_sarx64rr_test() #0 { ret void }
+  define void @stack_fold_shlx32rm_shlx32rr_test() #0 { ret void }
+  define void @stack_fold_shlx64rm_shlx64rr_test() #0 { ret void }
+  define void @stack_fold_shrx32rm_shrx32rr_test() #0 { ret void }
+  define void @stack_fold_shrx64rm_shrx64rr_test() #0 { ret void }
+  define void @stack_fold_t1mskc32rm_t1mskc32rr_test() #0 { ret void }
+  define void @stack_fold_t1mskc64rm_t1mskc64rr_test() #0 { ret void }
+  define void @stack_fold_tzcnt16rm_tzcnt16rr_test() #0 { ret void }
+  define void @stack_fold_tzcnt32rm_tzcnt32rr_test() #0 { ret void }
+  define void @stack_fold_tzcnt64rm_tzcnt64rr_test() #0 { ret void }
+  define void @stack_fold_tzmsk32rm_tzmsk32rr_test() #0 { ret void }
+  define void @stack_fold_tzmsk64rm_tzmsk64rr_test() #0 { ret void }
+  define void @stack_fold_vcvtph2psyrm_vcvtph2psyrr_test() #0 { ret void }
+  define void @stack_fold_vcvtph2psrm_vcvtph2psrr_test() #0 { ret void }
+  define void @stack_fold_vfrczpdrm_vfrczpdrr_test() #0 { ret void }
+  define void @stack_fold_vfrczpdrmy_vfrczpdrry_test() #0 { ret void }
+  define void @stack_fold_vfrczpsrm_vfrczpsrr_test() #0 { ret void }
+  define void @stack_fold_vfrczpsrmy_vfrczpsrry_test() #0 { ret void }
+  define void @stack_fold_vfrczsdrm_vfrczsdrr_test() #0 { ret void }
+  define void @stack_fold_vfrczssrm_vfrczssrr_test() #0 { ret void }
+  define void @stack_fold_vphaddbdrm_vphaddbdrr_test() #0 { ret void }
+  define void @stack_fold_vphaddbqrm_vphaddbqrr_test() #0 { ret void }
+  define void @stack_fold_vphaddbwrm_vphaddbwrr_test() #0 { ret void }
+  define void @stack_fold_vphadddqrm_vphadddqrr_test() #0 { ret void }
+  define void @stack_fold_vphaddubdrm_vphaddubdrr_test() #0 { ret void }
+  define void @stack_fold_vphaddubqrm_vphaddubqrr_test() #0 { ret void }
+  define void @stack_fold_vphaddubwrm_vphaddubwrr_test() #0 { ret void }
+  define void @stack_fold_vphaddudqrm_vphaddudqrr_test() #0 { ret void }
+  define void @stack_fold_vphadduwdrm_vphadduwdrr_test() #0 { ret void }
+  define void @stack_fold_vphadduwqrm_vphadduwqrr_test() #0 { ret void }
+  define void @stack_fold_vphaddwdrm_vphaddwdrr_test() #0 { ret void }
+  define void @stack_fold_vphaddwqrm_vphaddwqrr_test() #0 { ret void }
+  define void @stack_fold_vphsubbwrm_vphsubbwrr_test() #0 { ret void }
+  define void @stack_fold_vphsubdqrm_vphsubdqrr_test() #0 { ret void }
+  define void @stack_fold_vphsubwdrm_vphsubwdrr_test() #0 { ret void }
+  define void @stack_fold_vprotbmi_vprotbri_test() #0 { ret void }
+  define void @stack_fold_vprotbmr_vprotbrr_test() #0 { ret void }
+  define void @stack_fold_vprotdmi_vprotdri_test() #0 { ret void }
+  define void @stack_fold_vprotdmr_vprotdrr_test() #0 { ret void }
+  define void @stack_fold_vprotqmi_vprotqri_test() #0 { ret void }
+  define void @stack_fold_vprotqmr_vprotqrr_test() #0 { ret void }
+  define void @stack_fold_vprotwmi_vprotwri_test() #0 { ret void }
+  define void @stack_fold_vprotwmr_vprotwrr_test() #0 { ret void }
+  define void @stack_fold_vpshabmr_vpshabrr_test() #0 { ret void }
+  define void @stack_fold_vpshadmr_vpshadrr_test() #0 { ret void }
+  define void @stack_fold_vpshaqmr_vpshaqrr_test() #0 { ret void }
+  define void @stack_fold_vpshawmr_vpshawrr_test() #0 { ret void }
+  define void @stack_fold_vpshlbmr_vpshlbrr_test() #0 { ret void }
+  define void @stack_fold_vpshldmr_vpshldrr_test() #0 { ret void }
+  define void @stack_fold_vpshlqmr_vpshlqrr_test() #0 { ret void }
+  define void @stack_fold_vpshlwmr_vpshlwrr_test() #0 { ret void }
+  define void @stack_fold_adcx32rm_adcx32rr_test() #0 { ret void }
+  define void @stack_fold_adcx64rm_adcx64rr_test() #0 { ret void }
+  define void @stack_fold_andn32rm_andn32rr_test() #0 { ret void }
+  define void @stack_fold_andn64rm_andn64rr_test() #0 { ret void }
+  define void @stack_fold_cmova16rm_cmova16rr_test() #0 { ret void }
+  define void @stack_fold_cmova32rm_cmova32rr_test() #0 { ret void }
+  define void @stack_fold_cmova64rm_cmova64rr_test() #0 { ret void }
+  define void @stack_fold_cmovae16rm_cmovae16rr_test() #0 { ret void }
+  define void @stack_fold_cmovae32rm_cmovae32rr_test() #0 { ret void }
+  define void @stack_fold_cmovae64rm_cmovae64rr_test() #0 { ret void }
+  define void @stack_fold_cmovb16rm_cmovb16rr_test() #0 { ret void }
+  define void @stack_fold_cmovb32rm_cmovb32rr_test() #0 { ret void }
+  define void @stack_fold_cmovb64rm_cmovb64rr_test() #0 { ret void }
+  define void @stack_fold_cmovbe16rm_cmovbe16rr_test() #0 { ret void }
+  define void @stack_fold_cmovbe32rm_cmovbe32rr_test() #0 { ret void }
+  define void @stack_fold_cmovbe64rm_cmovbe64rr_test() #0 { ret void }
+  define void @stack_fold_cmove16rm_cmove16rr_test() #0 { ret void }
+  define void @stack_fold_cmove32rm_cmove32rr_test() #0 { ret void }
+  define void @stack_fold_cmove64rm_cmove64rr_test() #0 { ret void }
+  define void @stack_fold_cmovg16rm_cmovg16rr_test() #0 { ret void }
+  define void @stack_fold_cmovg32rm_cmovg32rr_test() #0 { ret void }
+  define void @stack_fold_cmovg64rm_cmovg64rr_test() #0 { ret void }
+  define void @stack_fold_cmovge16rm_cmovge16rr_test() #0 { ret void }
+  define void @stack_fold_cmovge32rm_cmovge32rr_test() #0 { ret void }
+  define void @stack_fold_cmovge64rm_cmovge64rr_test() #0 { ret void }
+  define void @stack_fold_cmovl16rm_cmovl16rr_test() #0 { ret void }
+  define void @stack_fold_cmovl32rm_cmovl32rr_test() #0 { ret void }
+  define void @stack_fold_cmovl64rm_cmovl64rr_test() #0 { ret void }
+  define void @stack_fold_cmovle16rm_cmovle16rr_test() #0 { ret void }
+  define void @stack_fold_cmovle32rm_cmovle32rr_test() #0 { ret void }
+  define void @stack_fold_cmovle64rm_cmovle64rr_test() #0 { ret void }
+  define void @stack_fold_cmovne16rm_cmovne16rr_test() #0 { ret void }
+  define void @stack_fold_cmovne32rm_cmovne32rr_test() #0 { ret void }
+  define void @stack_fold_cmovne64rm_cmovne64rr_test() #0 { ret void }
+  define void @stack_fold_cmovno16rm_cmovno16rr_test() #0 { ret void }
+  define void @stack_fold_cmovno32rm_cmovno32rr_test() #0 { ret void }
+  define void @stack_fold_cmovno64rm_cmovno64rr_test() #0 { ret void }
+  define void @stack_fold_cmovnp16rm_cmovnp16rr_test() #0 { ret void }
+  define void @stack_fold_cmovnp32rm_cmovnp32rr_test() #0 { ret void }
+  define void @stack_fold_cmovnp64rm_cmovnp64rr_test() #0 { ret void }
+  define void @stack_fold_cmovns16rm_cmovns16rr_test() #0 { ret void }
+  define void @stack_fold_cmovns32rm_cmovns32rr_test() #0 { ret void }
+  define void @stack_fold_cmovns64rm_cmovns64rr_test() #0 { ret void }
+  define void @stack_fold_cmovo16rm_cmovo16rr_test() #0 { ret void }
+  define void @stack_fold_cmovo32rm_cmovo32rr_test() #0 { ret void }
+  define void @stack_fold_cmovo64rm_cmovo64rr_test() #0 { ret void }
+  define void @stack_fold_cmovp16rm_cmovp16rr_test() #0 { ret void }
+  define void @stack_fold_cmovp32rm_cmovp32rr_test() #0 { ret void }
+  define void @stack_fold_cmovp64rm_cmovp64rr_test() #0 { ret void }
+  define void @stack_fold_cmovs16rm_cmovs16rr_test() #0 { ret void }
+  define void @stack_fold_cmovs32rm_cmovs32rr_test() #0 { ret void }
+  define void @stack_fold_cmovs64rm_cmovs64rr_test() #0 { ret void }
+  define void @stack_fold_mmx_packssdwirm_mmx_packssdwirr_test() #0 { ret void }
+  define void @stack_fold_mmx_packsswbirm_mmx_packsswbirr_test() #0 { ret void }
+  define void @stack_fold_mmx_packuswbirm_mmx_packuswbirr_test() #0 { ret void }
+  define void @stack_fold_mmx_paddbirm_mmx_paddbirr_test() #0 { ret void }
+  define void @stack_fold_mmx_padddirm_mmx_padddirr_test() #0 { ret void }
+  define void @stack_fold_mmx_paddsbirm_mmx_paddsbirr_test() #0 { ret void }
+  define void @stack_fold_mmx_paddswirm_mmx_paddswirr_test() #0 { ret void }
+  define void @stack_fold_mmx_paddusbirm_mmx_paddusbirr_test() #0 { ret void }
+  define void @stack_fold_mmx_padduswirm_mmx_padduswirr_test() #0 { ret void }
+  define void @stack_fold_mmx_paddwirm_mmx_paddwirr_test() #0 { ret void }
+  define void @stack_fold_mmx_pandnirm_mmx_pandnirr_test() #0 { ret void }
+  define void @stack_fold_mmx_pandirm_mmx_pandirr_test() #0 { ret void }
+  define void @stack_fold_mmx_pcmpeqbirm_mmx_pcmpeqbirr_test() #0 { ret void }
+  define void @stack_fold_mmx_pcmpeqdirm_mmx_pcmpeqdirr_test() #0 { ret void }
+  define void @stack_fold_mmx_pcmpeqwirm_mmx_pcmpeqwirr_test() #0 { ret void }
+  define void @stack_fold_mmx_pcmpgtbirm_mmx_pcmpgtbirr_test() #0 { ret void }
+  define void @stack_fold_mmx_pcmpgtdirm_mmx_pcmpgtdirr_test() #0 { ret void }
+  define void @stack_fold_mmx_pcmpgtwirm_mmx_pcmpgtwirr_test() #0 { ret void }
+  define void @stack_fold_mmx_pmaddwdirm_mmx_pmaddwdirr_test() #0 { ret void }
+  define void @stack_fold_mmx_pmulhwirm_mmx_pmulhwirr_test() #0 { ret void }
+  define void @stack_fold_mmx_pmullwirm_mmx_pmullwirr_test() #0 { ret void }
+  define void @stack_fold_mmx_porirm_mmx_porirr_test() #0 { ret void }
+  define void @stack_fold_mmx_pslldrm_mmx_pslldrr_test() #0 { ret void }
+  define void @stack_fold_mmx_psllqrm_mmx_psllqrr_test() #0 { ret void }
+  define void @stack_fold_mmx_psllwrm_mmx_psllwrr_test() #0 { ret void }
+  define void @stack_fold_mmx_psradrm_mmx_psradrr_test() #0 { ret void }
+  define void @stack_fold_mmx_psrawrm_mmx_psrawrr_test() #0 { ret void }
+  define void @stack_fold_mmx_psrldrm_mmx_psrldrr_test() #0 { ret void }
+  define void @stack_fold_mmx_psrlqrm_mmx_psrlqrr_test() #0 { ret void }
+  define void @stack_fold_mmx_psrlwrm_mmx_psrlwrr_test() #0 { ret void }
+  define void @stack_fold_mmx_psubbirm_mmx_psubbirr_test() #0 { ret void }
+  define void @stack_fold_mmx_psubdirm_mmx_psubdirr_test() #0 { ret void }
+  define void @stack_fold_mmx_psubsbirm_mmx_psubsbirr_test() #0 { ret void }
+  define void @stack_fold_mmx_psubswirm_mmx_psubswirr_test() #0 { ret void }
+  define void @stack_fold_mmx_psubusbirm_mmx_psubusbirr_test() #0 { ret void }
+  define void @stack_fold_mmx_psubuswirm_mmx_psubuswirr_test() #0 { ret void }
+  define void @stack_fold_mmx_psubwirm_mmx_psubwirr_test() #0 { ret void }
+  define void @stack_fold_mmx_punpckhbwirm_mmx_punpckhbwirr_test() #0 { ret void }
+  define void @stack_fold_mmx_punpckhdqirm_mmx_punpckhdqirr_test() #0 { ret void }
+  define void @stack_fold_mmx_punpckhwdirm_mmx_punpckhwdirr_test() #0 { ret void }
+  define void @stack_fold_mmx_punpcklbwirm_mmx_punpcklbwirr_test() #0 { ret void }
+  define void @stack_fold_mmx_punpckldqirm_mmx_punpckldqirr_test() #0 { ret void }
+  define void @stack_fold_mmx_punpcklwdirm_mmx_punpcklwdirr_test() #0 { ret void }
+  define void @stack_fold_mmx_pxorirm_mmx_pxorirr_test() #0 { ret void }
+  define void @stack_fold_mulx32rm_mulx32rr_test() #0 { ret void }
+  define void @stack_fold_mulx64rm_mulx64rr_test() #0 { ret void }
+  define void @stack_fold_pavgusbrm_pavgusbrr_test() #0 { ret void }
+  define void @stack_fold_pdep32rm_pdep32rr_test() #0 { ret void }
+  define void @stack_fold_pdep64rm_pdep64rr_test() #0 { ret void }
+  define void @stack_fold_pext32rm_pext32rr_test() #0 { ret void }
+  define void @stack_fold_pext64rm_pext64rr_test() #0 { ret void }
+  define void @stack_fold_pfaccrm_pfaccrr_test() #0 { ret void }
+  define void @stack_fold_pfaddrm_pfaddrr_test() #0 { ret void }
+  define void @stack_fold_pfcmpeqrm_pfcmpeqrr_test() #0 { ret void }
+  define void @stack_fold_pfcmpgerm_pfcmpgerr_test() #0 { ret void }
+  define void @stack_fold_pfcmpgtrm_pfcmpgtrr_test() #0 { ret void }
+  define void @stack_fold_pfmaxrm_pfmaxrr_test() #0 { ret void }
+  define void @stack_fold_pfminrm_pfminrr_test() #0 { ret void }
+  define void @stack_fold_pfmulrm_pfmulrr_test() #0 { ret void }
+  define void @stack_fold_pfnaccrm_pfnaccrr_test() #0 { ret void }
+  define void @stack_fold_pfpnaccrm_pfpnaccrr_test() #0 { ret void }
+  define void @stack_fold_pfrcpit1rm_pfrcpit1rr_test() #0 { ret void }
+  define void @stack_fold_pfrcpit2rm_pfrcpit2rr_test() #0 { ret void }
+  define void @stack_fold_pfrsqit1rm_pfrsqit1rr_test() #0 { ret void }
+  define void @stack_fold_pfsubrrm_pfsubrrr_test() #0 { ret void }
+  define void @stack_fold_pfsubrm_pfsubrr_test() #0 { ret void }
+  define void @stack_fold_pmulhrwrm_pmulhrwrr_test() #0 { ret void }
+  define void @stack_fold_sha1msg1rm_sha1msg1rr_test() #0 { ret void }
+  define void @stack_fold_sha1msg2rm_sha1msg2rr_test() #0 { ret void }
+  define void @stack_fold_sha1nexterm_sha1nexterr_test() #0 { ret void }
+  define void @stack_fold_sha1rnds4rmi_sha1rnds4rri_test() #0 { ret void }
+  define void @stack_fold_sha256msg1rm_sha256msg1rr_test() #0 { ret void }
+  define void @stack_fold_sha256msg2rm_sha256msg2rr_test() #0 { ret void }
+  define void @stack_fold_sha256rnds2rm_sha256rnds2rr_test() #0 { ret void }
+  define void @stack_fold_vfmaddpd4ymr_vfmaddpd4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmaddpd4mr_vfmaddpd4rr_test() #0 { ret void }
+  define void @stack_fold_vfmaddps4ymr_vfmaddps4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmaddps4mr_vfmaddps4rr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsd4mr_vfmaddsd4rr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsd4mr_int_vfmaddsd4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfmaddss4mr_vfmaddss4rr_test() #0 { ret void }
+  define void @stack_fold_vfmaddss4mr_int_vfmaddss4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfmaddsubpd4ymr_vfmaddsubpd4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsubpd4mr_vfmaddsubpd4rr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsubps4ymr_vfmaddsubps4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsubps4mr_vfmaddsubps4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsubaddpd4ymr_vfmsubaddpd4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmsubaddpd4mr_vfmsubaddpd4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsubaddps4ymr_vfmsubaddps4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmsubaddps4mr_vfmsubaddps4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsubpd4ymr_vfmsubpd4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmsubpd4mr_vfmsubpd4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsubps4ymr_vfmsubps4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmsubps4mr_vfmsubps4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsubsd4mr_vfmsubsd4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsubsd4mr_int_vfmsubsd4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfmsubss4mr_vfmsubss4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsubss4mr_int_vfmsubss4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmaddpd4ymr_vfnmaddpd4yrr_test() #0 { ret void }
+  define void @stack_fold_vfnmaddpd4mr_vfnmaddpd4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmaddps4ymr_vfnmaddps4yrr_test() #0 { ret void }
+  define void @stack_fold_vfnmaddps4mr_vfnmaddps4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmaddsd4mr_vfnmaddsd4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmaddsd4mr_int_vfnmaddsd4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmaddss4mr_vfnmaddss4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmaddss4mr_int_vfnmaddss4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmsubpd4ymr_vfnmsubpd4yrr_test() #0 { ret void }
+  define void @stack_fold_vfnmsubpd4mr_vfnmsubpd4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmsubps4ymr_vfnmsubps4yrr_test() #0 { ret void }
+  define void @stack_fold_vfnmsubps4mr_vfnmsubps4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmsubsd4mr_vfnmsubsd4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmsubsd4mr_int_vfnmsubsd4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmsubss4mr_vfnmsubss4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmsubss4mr_int_vfnmsubss4rr_int_test() #0 { ret void }
+  define void @stack_fold_vpcmovyrmr_vpcmovyrrr_test() #0 { ret void }
+  define void @stack_fold_vpcmovrmr_vpcmovrrr_test() #0 { ret void }
+  define void @stack_fold_vpcombmi_vpcombri_test() #0 { ret void }
+  define void @stack_fold_vpcombmi_alt_vpcombri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcomdmi_vpcomdri_test() #0 { ret void }
+  define void @stack_fold_vpcomdmi_alt_vpcomdri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcomqmi_vpcomqri_test() #0 { ret void }
+  define void @stack_fold_vpcomqmi_alt_vpcomqri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcomubmi_vpcomubri_test() #0 { ret void }
+  define void @stack_fold_vpcomubmi_alt_vpcomubri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcomudmi_vpcomudri_test() #0 { ret void }
+  define void @stack_fold_vpcomudmi_alt_vpcomudri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcomuqmi_vpcomuqri_test() #0 { ret void }
+  define void @stack_fold_vpcomuqmi_alt_vpcomuqri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcomuwmi_vpcomuwri_test() #0 { ret void }
+  define void @stack_fold_vpcomuwmi_alt_vpcomuwri_alt_test() #0 { ret void }
+  define void @stack_fold_vpcomwmi_vpcomwri_test() #0 { ret void }
+  define void @stack_fold_vpcomwmi_alt_vpcomwri_alt_test() #0 { ret void }
+  define void @stack_fold_vpermil2pdymr_vpermil2pdyrr_test() #0 { ret void }
+  define void @stack_fold_vpermil2pdmr_vpermil2pdrr_test() #0 { ret void }
+  define void @stack_fold_vpermil2psymr_vpermil2psyrr_test() #0 { ret void }
+  define void @stack_fold_vpermil2psmr_vpermil2psrr_test() #0 { ret void }
+  define void @stack_fold_vpmacsddrm_vpmacsddrr_test() #0 { ret void }
+  define void @stack_fold_vpmacsdqhrm_vpmacsdqhrr_test() #0 { ret void }
+  define void @stack_fold_vpmacsdqlrm_vpmacsdqlrr_test() #0 { ret void }
+  define void @stack_fold_vpmacssddrm_vpmacssddrr_test() #0 { ret void }
+  define void @stack_fold_vpmacssdqhrm_vpmacssdqhrr_test() #0 { ret void }
+  define void @stack_fold_vpmacssdqlrm_vpmacssdqlrr_test() #0 { ret void }
+  define void @stack_fold_vpmacsswdrm_vpmacsswdrr_test() #0 { ret void }
+  define void @stack_fold_vpmacsswwrm_vpmacsswwrr_test() #0 { ret void }
+  define void @stack_fold_vpmacswdrm_vpmacswdrr_test() #0 { ret void }
+  define void @stack_fold_vpmacswwrm_vpmacswwrr_test() #0 { ret void }
+  define void @stack_fold_vpmadcsswdrm_vpmadcsswdrr_test() #0 { ret void }
+  define void @stack_fold_vpmadcswdrm_vpmadcswdrr_test() #0 { ret void }
+  define void @stack_fold_vppermrmr_vppermrrr_test() #0 { ret void }
+  define void @stack_fold_vprotbrm_vprotbrr_test() #0 { ret void }
+  define void @stack_fold_vprotdrm_vprotdrr_test() #0 { ret void }
+  define void @stack_fold_vprotqrm_vprotqrr_test() #0 { ret void }
+  define void @stack_fold_vprotwrm_vprotwrr_test() #0 { ret void }
+  define void @stack_fold_vpshabrm_vpshabrr_test() #0 { ret void }
+  define void @stack_fold_vpshadrm_vpshadrr_test() #0 { ret void }
+  define void @stack_fold_vpshaqrm_vpshaqrr_test() #0 { ret void }
+  define void @stack_fold_vpshawrm_vpshawrr_test() #0 { ret void }
+  define void @stack_fold_vpshlbrm_vpshlbrr_test() #0 { ret void }
+  define void @stack_fold_vpshldrm_vpshldrr_test() #0 { ret void }
+  define void @stack_fold_vpshlqrm_vpshlqrr_test() #0 { ret void }
+  define void @stack_fold_vpshlwrm_vpshlwrr_test() #0 { ret void }
+  define void @stack_fold_vfmadd132pdym_vfmadd132pdyr_test() #0 { ret void }
+  define void @stack_fold_vfmadd132pdm_vfmadd132pdr_test() #0 { ret void }
+  define void @stack_fold_vfmadd132psym_vfmadd132psyr_test() #0 { ret void }
+  define void @stack_fold_vfmadd132psm_vfmadd132psr_test() #0 { ret void }
+  define void @stack_fold_vfmadd132sdm_vfmadd132sdr_test() #0 { ret void }
+  define void @stack_fold_vfmadd132sdm_int_vfmadd132sdr_int_test() #0 { ret void }
+  define void @stack_fold_vfmadd132ssm_vfmadd132ssr_test() #0 { ret void }
+  define void @stack_fold_vfmadd132ssm_int_vfmadd132ssr_int_test() #0 { ret void }
+  define void @stack_fold_vfmadd213pdym_vfmadd213pdyr_test() #0 { ret void }
+  define void @stack_fold_vfmadd213pdm_vfmadd213pdr_test() #0 { ret void }
+  define void @stack_fold_vfmadd213psym_vfmadd213psyr_test() #0 { ret void }
+  define void @stack_fold_vfmadd213psm_vfmadd213psr_test() #0 { ret void }
+  define void @stack_fold_vfmadd213sdm_vfmadd213sdr_test() #0 { ret void }
+  define void @stack_fold_vfmadd213sdm_int_vfmadd213sdr_int_test() #0 { ret void }
+  define void @stack_fold_vfmadd213ssm_vfmadd213ssr_test() #0 { ret void }
+  define void @stack_fold_vfmadd213ssm_int_vfmadd213ssr_int_test() #0 { ret void }
+  define void @stack_fold_vfmadd231pdym_vfmadd231pdyr_test() #0 { ret void }
+  define void @stack_fold_vfmadd231pdm_vfmadd231pdr_test() #0 { ret void }
+  define void @stack_fold_vfmadd231psym_vfmadd231psyr_test() #0 { ret void }
+  define void @stack_fold_vfmadd231psm_vfmadd231psr_test() #0 { ret void }
+  define void @stack_fold_vfmadd231sdm_vfmadd231sdr_test() #0 { ret void }
+  define void @stack_fold_vfmadd231sdm_int_vfmadd231sdr_int_test() #0 { ret void }
+  define void @stack_fold_vfmadd231ssm_vfmadd231ssr_test() #0 { ret void }
+  define void @stack_fold_vfmadd231ssm_int_vfmadd231ssr_int_test() #0 { ret void }
+  define void @stack_fold_vfmaddpd4yrm_vfmaddpd4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmaddpd4rm_vfmaddpd4rr_test() #0 { ret void }
+  define void @stack_fold_vfmaddps4yrm_vfmaddps4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmaddps4rm_vfmaddps4rr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsd4rm_vfmaddsd4rr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsd4rm_int_vfmaddsd4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfmaddss4rm_vfmaddss4rr_test() #0 { ret void }
+  define void @stack_fold_vfmaddss4rm_int_vfmaddss4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfmaddsub132pdym_vfmaddsub132pdyr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsub132pdm_vfmaddsub132pdr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsub132psym_vfmaddsub132psyr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsub132psm_vfmaddsub132psr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsub213pdym_vfmaddsub213pdyr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsub213pdm_vfmaddsub213pdr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsub213psym_vfmaddsub213psyr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsub213psm_vfmaddsub213psr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsub231pdym_vfmaddsub231pdyr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsub231pdm_vfmaddsub231pdr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsub231psym_vfmaddsub231psyr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsub231psm_vfmaddsub231psr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsubpd4yrm_vfmaddsubpd4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsubpd4rm_vfmaddsubpd4rr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsubps4yrm_vfmaddsubps4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmaddsubps4rm_vfmaddsubps4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsub132pdym_vfmsub132pdyr_test() #0 { ret void }
+  define void @stack_fold_vfmsub132pdm_vfmsub132pdr_test() #0 { ret void }
+  define void @stack_fold_vfmsub132psym_vfmsub132psyr_test() #0 { ret void }
+  define void @stack_fold_vfmsub132psm_vfmsub132psr_test() #0 { ret void }
+  define void @stack_fold_vfmsub132sdm_vfmsub132sdr_test() #0 { ret void }
+  define void @stack_fold_vfmsub132sdm_int_vfmsub132sdr_int_test() #0 { ret void }
+  define void @stack_fold_vfmsub132ssm_vfmsub132ssr_test() #0 { ret void }
+  define void @stack_fold_vfmsub132ssm_int_vfmsub132ssr_int_test() #0 { ret void }
+  define void @stack_fold_vfmsub213pdym_vfmsub213pdyr_test() #0 { ret void }
+  define void @stack_fold_vfmsub213pdm_vfmsub213pdr_test() #0 { ret void }
+  define void @stack_fold_vfmsub213psym_vfmsub213psyr_test() #0 { ret void }
+  define void @stack_fold_vfmsub213psm_vfmsub213psr_test() #0 { ret void }
+  define void @stack_fold_vfmsub213sdm_vfmsub213sdr_test() #0 { ret void }
+  define void @stack_fold_vfmsub213sdm_int_vfmsub213sdr_int_test() #0 { ret void }
+  define void @stack_fold_vfmsub213ssm_vfmsub213ssr_test() #0 { ret void }
+  define void @stack_fold_vfmsub213ssm_int_vfmsub213ssr_int_test() #0 { ret void }
+  define void @stack_fold_vfmsub231pdym_vfmsub231pdyr_test() #0 { ret void }
+  define void @stack_fold_vfmsub231pdm_vfmsub231pdr_test() #0 { ret void }
+  define void @stack_fold_vfmsub231psym_vfmsub231psyr_test() #0 { ret void }
+  define void @stack_fold_vfmsub231psm_vfmsub231psr_test() #0 { ret void }
+  define void @stack_fold_vfmsub231sdm_vfmsub231sdr_test() #0 { ret void }
+  define void @stack_fold_vfmsub231sdm_int_vfmsub231sdr_int_test() #0 { ret void }
+  define void @stack_fold_vfmsub231ssm_vfmsub231ssr_test() #0 { ret void }
+  define void @stack_fold_vfmsub231ssm_int_vfmsub231ssr_int_test() #0 { ret void }
+  define void @stack_fold_vfmsubadd132pdym_vfmsubadd132pdyr_test() #0 { ret void }
+  define void @stack_fold_vfmsubadd132pdm_vfmsubadd132pdr_test() #0 { ret void }
+  define void @stack_fold_vfmsubadd132psym_vfmsubadd132psyr_test() #0 { ret void }
+  define void @stack_fold_vfmsubadd132psm_vfmsubadd132psr_test() #0 { ret void }
+  define void @stack_fold_vfmsubadd213pdym_vfmsubadd213pdyr_test() #0 { ret void }
+  define void @stack_fold_vfmsubadd213pdm_vfmsubadd213pdr_test() #0 { ret void }
+  define void @stack_fold_vfmsubadd213psym_vfmsubadd213psyr_test() #0 { ret void }
+  define void @stack_fold_vfmsubadd213psm_vfmsubadd213psr_test() #0 { ret void }
+  define void @stack_fold_vfmsubadd231pdym_vfmsubadd231pdyr_test() #0 { ret void }
+  define void @stack_fold_vfmsubadd231pdm_vfmsubadd231pdr_test() #0 { ret void }
+  define void @stack_fold_vfmsubadd231psym_vfmsubadd231psyr_test() #0 { ret void }
+  define void @stack_fold_vfmsubadd231psm_vfmsubadd231psr_test() #0 { ret void }
+  define void @stack_fold_vfmsubaddpd4yrm_vfmsubaddpd4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmsubaddpd4rm_vfmsubaddpd4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsubaddps4yrm_vfmsubaddps4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmsubaddps4rm_vfmsubaddps4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsubpd4yrm_vfmsubpd4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmsubpd4rm_vfmsubpd4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsubps4yrm_vfmsubps4yrr_test() #0 { ret void }
+  define void @stack_fold_vfmsubps4rm_vfmsubps4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsubsd4rm_vfmsubsd4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsubsd4rm_int_vfmsubsd4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfmsubss4rm_vfmsubss4rr_test() #0 { ret void }
+  define void @stack_fold_vfmsubss4rm_int_vfmsubss4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmadd132pdym_vfnmadd132pdyr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd132pdm_vfnmadd132pdr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd132psym_vfnmadd132psyr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd132psm_vfnmadd132psr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd132sdm_vfnmadd132sdr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd132sdm_int_vfnmadd132sdr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmadd132ssm_vfnmadd132ssr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd132ssm_int_vfnmadd132ssr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmadd213pdym_vfnmadd213pdyr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd213pdm_vfnmadd213pdr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd213psym_vfnmadd213psyr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd213psm_vfnmadd213psr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd213sdm_vfnmadd213sdr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd213sdm_int_vfnmadd213sdr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmadd213ssm_vfnmadd213ssr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd213ssm_int_vfnmadd213ssr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmadd231pdym_vfnmadd231pdyr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd231pdm_vfnmadd231pdr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd231psym_vfnmadd231psyr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd231psm_vfnmadd231psr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd231sdm_vfnmadd231sdr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd231sdm_int_vfnmadd231sdr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmadd231ssm_vfnmadd231ssr_test() #0 { ret void }
+  define void @stack_fold_vfnmadd231ssm_int_vfnmadd231ssr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmaddpd4yrm_vfnmaddpd4yrr_test() #0 { ret void }
+  define void @stack_fold_vfnmaddpd4rm_vfnmaddpd4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmaddps4yrm_vfnmaddps4yrr_test() #0 { ret void }
+  define void @stack_fold_vfnmaddps4rm_vfnmaddps4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmaddsd4rm_vfnmaddsd4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmaddsd4rm_int_vfnmaddsd4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmaddss4rm_vfnmaddss4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmaddss4rm_int_vfnmaddss4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmsub132pdym_vfnmsub132pdyr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub132pdm_vfnmsub132pdr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub132psym_vfnmsub132psyr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub132psm_vfnmsub132psr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub132sdm_vfnmsub132sdr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub132sdm_int_vfnmsub132sdr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmsub132ssm_vfnmsub132ssr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub132ssm_int_vfnmsub132ssr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmsub213pdym_vfnmsub213pdyr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub213pdm_vfnmsub213pdr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub213psym_vfnmsub213psyr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub213psm_vfnmsub213psr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub213sdm_vfnmsub213sdr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub213sdm_int_vfnmsub213sdr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmsub213ssm_vfnmsub213ssr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub213ssm_int_vfnmsub213ssr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmsub231pdym_vfnmsub231pdyr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub231pdm_vfnmsub231pdr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub231psym_vfnmsub231psyr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub231psm_vfnmsub231psr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub231sdm_vfnmsub231sdr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub231sdm_int_vfnmsub231sdr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmsub231ssm_vfnmsub231ssr_test() #0 { ret void }
+  define void @stack_fold_vfnmsub231ssm_int_vfnmsub231ssr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmsubpd4yrm_vfnmsubpd4yrr_test() #0 { ret void }
+  define void @stack_fold_vfnmsubpd4rm_vfnmsubpd4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmsubps4yrm_vfnmsubps4yrr_test() #0 { ret void }
+  define void @stack_fold_vfnmsubps4rm_vfnmsubps4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmsubsd4rm_vfnmsubsd4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmsubsd4rm_int_vfnmsubsd4rr_int_test() #0 { ret void }
+  define void @stack_fold_vfnmsubss4rm_vfnmsubss4rr_test() #0 { ret void }
+  define void @stack_fold_vfnmsubss4rm_int_vfnmsubss4rr_int_test() #0 { ret void }
+  define void @stack_fold_vpcmovyrrm_vpcmovyrrr_test() #0 { ret void }
+  define void @stack_fold_vpcmovrrm_vpcmovrrr_test() #0 { ret void }
+  define void @stack_fold_vpermil2pdyrm_vpermil2pdyrr_test() #0 { ret void }
+  define void @stack_fold_vpermil2pdrm_vpermil2pdrr_test() #0 { ret void }
+  define void @stack_fold_vpermil2psyrm_vpermil2psyrr_test() #0 { ret void }
+  define void @stack_fold_vpermil2psrm_vpermil2psrr_test() #0 { ret void }
+  define void @stack_fold_vppermrrm_vppermrrr_test() #0 { ret void }
+...
+---
+name:      stack_fold_bndmovmr32mr_bndmovmrrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: bndr }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_bndmovmr32mr_bndmovmrrr_test
+    ; CHECK: BNDMOVMR32mr
+    %0 = BNDMOVMRrr undef %bnd1
+    INLINEASM $nop, 1, 12, implicit-def %bnd0, 12, implicit-def %bnd1, 12, implicit-def %bnd2, 12, implicit-def %bnd3
+    BNDMOVMR64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_mmx_movd64from64rm_mmx_movd64from64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_movd64from64rm_mmx_movd64from64rr_test
+    ; CHECK: MMX_MOVD64from64rm
+    %0 = MMX_MOVD64from64rr undef %mm0
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_mmx_movd64mr_mmx_movd64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_movd64mr_mmx_movd64rr_test
+    ; CHECK: MMX_MOVD64mr
+    %0 = MMX_MOVD64rr undef %eax
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    MMX_MOVD64from64rm %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_mmx_movq64mr_mmx_movq64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_movq64mr_mmx_movq64rr_test
+    ; CHECK: MMX_MOVQ64mr
+    %0 = MMX_MOVQ64rr undef %mm1
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    MMX_MOVD64from64rm %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2phymr_vcvtps2phyrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2phymr_vcvtps2phyrr_test
+    ; CHECK: VCVTPS2PHYmr
+    %0 = VCVTPS2PHYrr undef %ymm1, 0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    MOVAPSmr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vcvtps2phmr_vcvtps2phrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: vr128 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 16 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtps2phmr_vcvtps2phrr_test
+    ; CHECK: VCVTPS2PHmr
+    %0 = VCVTPS2PHrr undef %xmm1, 0
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    MOVAPSmr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_adox32rm_adox32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adox32rm_adox32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADOX32rm
+    %eax = ADOX32rr %1, implicit-def %eflags, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_adox64rm_adox64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adox64rm_adox64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADOX64rm
+    %rax = ADOX64rr %1, implicit-def %eflags, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_bextr32rm_bextr32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_bextr32rm_bextr32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BEXTR32rm
+    %eax = BEXTR32rr %1, undef %ecx, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_bextr64rm_bextr64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_bextr64rm_bextr64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BEXTR64rm
+    %rax = BEXTR64rr %1, undef %rcx, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_bextri32mi_bextri32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_bextri32mi_bextri32ri_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BEXTRI32mi
+    %eax = BEXTRI32ri %1, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_bextri64mi_bextri64ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_bextri64mi_bextri64ri_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BEXTRI64mi
+    %rax = BEXTRI64ri %1, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blcfill32rm_blcfill32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_blcfill32rm_blcfill32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLCFILL32rm
+    %eax = BLCFILL32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blcfill64rm_blcfill64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_blcfill64rm_blcfill64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLCFILL64rm
+    %rax = BLCFILL64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blci32rm_blci32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_blci32rm_blci32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLCI32rm
+    %eax = BLCI32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blci64rm_blci64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_blci64rm_blci64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLCI64rm
+    %rax = BLCI64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blcic32rm_blcic32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_blcic32rm_blcic32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLCIC32rm
+    %eax = BLCIC32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blcic64rm_blcic64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_blcic64rm_blcic64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLCIC64rm
+    %rax = BLCIC64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blcmsk32rm_blcmsk32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_blcmsk32rm_blcmsk32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLCMSK32rm
+    %eax = BLCMSK32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blcmsk64rm_blcmsk64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_blcmsk64rm_blcmsk64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLCMSK64rm
+    %rax = BLCMSK64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blcs32rm_blcs32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_blcs32rm_blcs32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLCS32rm
+    %eax = BLCS32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blcs64rm_blcs64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_blcs64rm_blcs64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLCS64rm
+    %rax = BLCS64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blsfill32rm_blsfill32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_blsfill32rm_blsfill32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLSFILL32rm
+    %eax = BLSFILL32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blsfill64rm_blsfill64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_blsfill64rm_blsfill64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLSFILL64rm
+    %rax = BLSFILL64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blsi32rm_blsi32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_blsi32rm_blsi32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLSI32rm
+    %eax = BLSI32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blsi64rm_blsi64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_blsi64rm_blsi64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLSI64rm
+    %rax = BLSI64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blsic32rm_blsic32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_blsic32rm_blsic32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLSIC32rm
+    %eax = BLSIC32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blsic64rm_blsic64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_blsic64rm_blsic64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLSIC64rm
+    %rax = BLSIC64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blsmsk32rm_blsmsk32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_blsmsk32rm_blsmsk32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLSMSK32rm
+    %eax = BLSMSK32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blsmsk64rm_blsmsk64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_blsmsk64rm_blsmsk64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLSMSK64rm
+    %rax = BLSMSK64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blsr32rm_blsr32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_blsr32rm_blsr32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLSR32rm
+    %eax = BLSR32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_blsr64rm_blsr64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_blsr64rm_blsr64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BLSR64rm
+    %rax = BLSR64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_bndcl32rm_bndcl32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_bndcl32rm_bndcl32rr_test
+    %1 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BNDCL32rm
+    BNDCL32rr undef %bnd0, %1
+    RET 0
+...
+---
+name:      stack_fold_bndcl64rm_bndcl64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_bndcl64rm_bndcl64rr_test
+    %1 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BNDCL64rm
+    BNDCL64rr undef %bnd0, %1
+    RET 0
+...
+---
+name:      stack_fold_bndcn32rm_bndcn32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_bndcn32rm_bndcn32rr_test
+    %1 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BNDCN32rm
+    BNDCN32rr undef %bnd0, %1
+    RET 0
+...
+---
+name:      stack_fold_bndcn64rm_bndcn64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_bndcn64rm_bndcn64rr_test
+    %1 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BNDCN64rm
+    BNDCN64rr undef %bnd0, %1
+    RET 0
+...
+---
+name:      stack_fold_bndcu32rm_bndcu32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_bndcu32rm_bndcu32rr_test
+    %1 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BNDCU32rm
+    BNDCU32rr undef %bnd0, %1
+    RET 0
+...
+---
+name:      stack_fold_bndcu64rm_bndcu64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_bndcu64rm_bndcu64rr_test
+    %1 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BNDCU64rm
+    BNDCU64rr undef %bnd0, %1
+    RET 0
+...
+---
+name:      stack_fold_bndmovrm32rm_bndmovrmrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: bndr }
+liveins:
+  - { reg: '%bnd1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bnd1
+
+    ; CHECK-LABEL: name:      stack_fold_bndmovrm32rm_bndmovrmrr_test
+    %1 = COPY %bnd1
+    INLINEASM $nop, 1, 12, implicit-def %bnd0, 12, implicit-def %bnd1, 12, implicit-def %bnd2, 12, implicit-def %bnd3
+    ; CHECK: BNDMOVRM32rm
+    %bnd0 = BNDMOVRMrr %1
+    RET 0
+...
+---
+name:      stack_fold_bzhi32rm_bzhi32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_bzhi32rm_bzhi32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BZHI32rm
+    %eax = BZHI32rr %1, undef %ecx, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_bzhi64rm_bzhi64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_bzhi64rm_bzhi64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BZHI64rm
+    %rax = BZHI64rr %1, undef %rcx, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_lzcnt16rm_lzcnt16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_lzcnt16rm_lzcnt16rr_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: LZCNT16rm
+    %ax = LZCNT16rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_lzcnt32rm_lzcnt32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_lzcnt32rm_lzcnt32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: LZCNT32rm
+    %eax = LZCNT32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_lzcnt64rm_lzcnt64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_lzcnt64rm_lzcnt64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: LZCNT64rm
+    %rax = LZCNT64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_mmx_movd64rm_mmx_movd64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_movd64rm_mmx_movd64rr_test
+    %1 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MMX_MOVD64rm
+    %mm0 = MMX_MOVD64rr %1
+    RET 0
+...
+---
+name:      stack_fold_mmx_movd64to64rm_mmx_movd64to64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_movd64to64rm_mmx_movd64to64rr_test
+    %1 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MMX_MOVD64to64rm
+    %mm0 = MMX_MOVD64to64rr %1
+    RET 0
+...
+---
+name:      stack_fold_mmx_movq64rm_mmx_movq64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr64 }
+liveins:
+  - { reg: '%mm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm1
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_movq64rm_mmx_movq64rr_test
+    %1 = COPY %mm1
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_MOVQ64rm
+    %mm0 = MMX_MOVQ64rr %1
+    RET 0
+...
+---
+name:      stack_fold_mmx_pshufwmi_mmx_pshufwri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr64 }
+liveins:
+  - { reg: '%mm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm1
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pshufwmi_mmx_pshufwri_test
+    %1 = COPY %mm1
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSHUFWmi
+    %mm0 = MMX_PSHUFWri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_pf2idrm_pf2idrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr64 }
+liveins:
+  - { reg: '%mm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm1
+
+    ; CHECK-LABEL: name:      stack_fold_pf2idrm_pf2idrr_test
+    %1 = COPY %mm1
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PF2IDrm
+    %mm0 = PF2IDrr %1
+    RET 0
+...
+---
+name:      stack_fold_pf2iwrm_pf2iwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr64 }
+liveins:
+  - { reg: '%mm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm1
+
+    ; CHECK-LABEL: name:      stack_fold_pf2iwrm_pf2iwrr_test
+    %1 = COPY %mm1
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PF2IWrm
+    %mm0 = PF2IWrr %1
+    RET 0
+...
+---
+name:      stack_fold_pfrcprm_pfrcprr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr64 }
+liveins:
+  - { reg: '%mm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm1
+
+    ; CHECK-LABEL: name:      stack_fold_pfrcprm_pfrcprr_test
+    %1 = COPY %mm1
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFRCPrm
+    %mm0 = PFRCPrr %1
+    RET 0
+...
+---
+name:      stack_fold_pfrsqrtrm_pfrsqrtrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr64 }
+liveins:
+  - { reg: '%mm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm1
+
+    ; CHECK-LABEL: name:      stack_fold_pfrsqrtrm_pfrsqrtrr_test
+    %1 = COPY %mm1
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFRSQRTrm
+    %mm0 = PFRSQRTrr %1
+    RET 0
+...
+---
+name:      stack_fold_pi2fdrm_pi2fdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr64 }
+liveins:
+  - { reg: '%mm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm1
+
+    ; CHECK-LABEL: name:      stack_fold_pi2fdrm_pi2fdrr_test
+    %1 = COPY %mm1
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PI2FDrm
+    %mm0 = PI2FDrr %1
+    RET 0
+...
+---
+name:      stack_fold_pi2fwrm_pi2fwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr64 }
+liveins:
+  - { reg: '%mm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm1
+
+    ; CHECK-LABEL: name:      stack_fold_pi2fwrm_pi2fwrr_test
+    %1 = COPY %mm1
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PI2FWrm
+    %mm0 = PI2FWrr %1
+    RET 0
+...
+---
+name:      stack_fold_popcnt16rm_popcnt16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_popcnt16rm_popcnt16rr_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: POPCNT16rm
+    %ax = POPCNT16rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_popcnt32rm_popcnt32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_popcnt32rm_popcnt32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: POPCNT32rm
+    %eax = POPCNT32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_popcnt64rm_popcnt64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_popcnt64rm_popcnt64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: POPCNT64rm
+    %rax = POPCNT64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_pswapdrm_pswapdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr64 }
+liveins:
+  - { reg: '%mm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm1
+
+    ; CHECK-LABEL: name:      stack_fold_pswapdrm_pswapdrr_test
+    %1 = COPY %mm1
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PSWAPDrm
+    %mm0 = PSWAPDrr %1
+    RET 0
+...
+---
+name:      stack_fold_rorx32mi_rorx32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_rorx32mi_rorx32ri_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RORX32mi
+    %eax = RORX32ri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_rorx64mi_rorx64ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_rorx64mi_rorx64ri_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RORX64mi
+    %rax = RORX64ri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_sarx32rm_sarx32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_sarx32rm_sarx32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SARX32rm
+    %eax = SARX32rr %1, undef %ecx
+    RET 0
+...
+---
+name:      stack_fold_sarx64rm_sarx64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_sarx64rm_sarx64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SARX64rm
+    %rax = SARX64rr %1, undef %rcx
+    RET 0
+...
+---
+name:      stack_fold_shlx32rm_shlx32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_shlx32rm_shlx32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHLX32rm
+    %eax = SHLX32rr %1, undef %ecx
+    RET 0
+...
+---
+name:      stack_fold_shlx64rm_shlx64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_shlx64rm_shlx64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHLX64rm
+    %rax = SHLX64rr %1, undef %rcx
+    RET 0
+...
+---
+name:      stack_fold_shrx32rm_shrx32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_shrx32rm_shrx32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHRX32rm
+    %eax = SHRX32rr %1, undef %ecx
+    RET 0
+...
+---
+name:      stack_fold_shrx64rm_shrx64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_shrx64rm_shrx64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHRX64rm
+    %rax = SHRX64rr %1, undef %rcx
+    RET 0
+...
+---
+name:      stack_fold_t1mskc32rm_t1mskc32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_t1mskc32rm_t1mskc32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: T1MSKC32rm
+    %eax = T1MSKC32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_t1mskc64rm_t1mskc64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_t1mskc64rm_t1mskc64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: T1MSKC64rm
+    %rax = T1MSKC64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_tzcnt16rm_tzcnt16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_tzcnt16rm_tzcnt16rr_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: TZCNT16rm
+    %ax = TZCNT16rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_tzcnt32rm_tzcnt32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_tzcnt32rm_tzcnt32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: TZCNT32rm
+    %eax = TZCNT32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_tzcnt64rm_tzcnt64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_tzcnt64rm_tzcnt64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: TZCNT64rm
+    %rax = TZCNT64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_tzmsk32rm_tzmsk32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_tzmsk32rm_tzmsk32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: TZMSK32rm
+    %eax = TZMSK32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_tzmsk64rm_tzmsk64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_tzmsk64rm_tzmsk64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: TZMSK64rm
+    %rax = TZMSK64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_vcvtph2psyrm_vcvtph2psyrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtph2psyrm_vcvtph2psyrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPH2PSYrm
+    %ymm0 = VCVTPH2PSYrr %1
+    RET 0
+...
+---
+name:      stack_fold_vcvtph2psrm_vcvtph2psrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vcvtph2psrm_vcvtph2psrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VCVTPH2PSrm
+    %xmm0 = VCVTPH2PSrr %1
+    RET 0
+...
+---
+name:      stack_fold_vfrczpdrm_vfrczpdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vfrczpdrm_vfrczpdrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFRCZPDrm
+    %xmm0 = VFRCZPDrr %1
+    RET 0
+...
+---
+name:      stack_fold_vfrczpdrmy_vfrczpdrry_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256 }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vfrczpdrmy_vfrczpdrry_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFRCZPDrmY
+    %ymm0 = VFRCZPDrrY %1
+    RET 0
+...
+---
+name:      stack_fold_vfrczpsrm_vfrczpsrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vfrczpsrm_vfrczpsrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFRCZPSrm
+    %xmm0 = VFRCZPSrr %1
+    RET 0
+...
+---
+name:      stack_fold_vfrczpsrmy_vfrczpsrry_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr256 }
+liveins:
+  - { reg: '%ymm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm1
+
+    ; CHECK-LABEL: name:      stack_fold_vfrczpsrmy_vfrczpsrry_test
+    %1 = COPY %ymm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFRCZPSrmY
+    %ymm0 = VFRCZPSrrY %1
+    RET 0
+...
+---
+name:      stack_fold_vfrczsdrm_vfrczsdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vfrczsdrm_vfrczsdrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFRCZSDrm
+    %xmm0 = VFRCZSDrr %1
+    RET 0
+...
+---
+name:      stack_fold_vfrczssrm_vfrczssrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vfrczssrm_vfrczssrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFRCZSSrm
+    %xmm0 = VFRCZSSrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphaddbdrm_vphaddbdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphaddbdrm_vphaddbdrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHADDBDrm
+    %xmm0 = VPHADDBDrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphaddbqrm_vphaddbqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphaddbqrm_vphaddbqrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHADDBQrm
+    %xmm0 = VPHADDBQrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphaddbwrm_vphaddbwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphaddbwrm_vphaddbwrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHADDBWrm
+    %xmm0 = VPHADDBWrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphadddqrm_vphadddqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphadddqrm_vphadddqrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHADDDQrm
+    %xmm0 = VPHADDDQrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphaddubdrm_vphaddubdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphaddubdrm_vphaddubdrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHADDUBDrm
+    %xmm0 = VPHADDUBDrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphaddubqrm_vphaddubqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphaddubqrm_vphaddubqrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHADDUBQrm
+    %xmm0 = VPHADDUBQrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphaddubwrm_vphaddubwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphaddubwrm_vphaddubwrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHADDUBWrm
+    %xmm0 = VPHADDUBWrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphaddudqrm_vphaddudqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphaddudqrm_vphaddudqrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHADDUDQrm
+    %xmm0 = VPHADDUDQrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphadduwdrm_vphadduwdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphadduwdrm_vphadduwdrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHADDUWDrm
+    %xmm0 = VPHADDUWDrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphadduwqrm_vphadduwqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphadduwqrm_vphadduwqrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHADDUWQrm
+    %xmm0 = VPHADDUWQrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphaddwdrm_vphaddwdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphaddwdrm_vphaddwdrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHADDWDrm
+    %xmm0 = VPHADDWDrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphaddwqrm_vphaddwqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphaddwqrm_vphaddwqrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHADDWQrm
+    %xmm0 = VPHADDWQrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphsubbwrm_vphsubbwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphsubbwrm_vphsubbwrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHSUBBWrm
+    %xmm0 = VPHSUBBWrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphsubdqrm_vphsubdqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphsubdqrm_vphsubdqrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHSUBDQrm
+    %xmm0 = VPHSUBDQrr %1
+    RET 0
+...
+---
+name:      stack_fold_vphsubwdrm_vphsubwdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vphsubwdrm_vphsubwdrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPHSUBWDrm
+    %xmm0 = VPHSUBWDrr %1
+    RET 0
+...
+---
+name:      stack_fold_vprotbmi_vprotbri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vprotbmi_vprotbri_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPROTBmi
+    %xmm0 = VPROTBri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vprotbmr_vprotbrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vprotbmr_vprotbrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPROTBmr
+    %xmm0 = VPROTBrr %1, undef %xmm2
+    RET 0
+...
+---
+name:      stack_fold_vprotdmi_vprotdri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vprotdmi_vprotdri_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPROTDmi
+    %xmm0 = VPROTDri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vprotdmr_vprotdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vprotdmr_vprotdrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPROTDmr
+    %xmm0 = VPROTDrr %1, undef %xmm2
+    RET 0
+...
+---
+name:      stack_fold_vprotqmi_vprotqri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vprotqmi_vprotqri_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPROTQmi
+    %xmm0 = VPROTQri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vprotqmr_vprotqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vprotqmr_vprotqrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPROTQmr
+    %xmm0 = VPROTQrr %1, undef %xmm2
+    RET 0
+...
+---
+name:      stack_fold_vprotwmi_vprotwri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vprotwmi_vprotwri_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPROTWmi
+    %xmm0 = VPROTWri %1, 0
+    RET 0
+...
+---
+name:      stack_fold_vprotwmr_vprotwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vprotwmr_vprotwrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPROTWmr
+    %xmm0 = VPROTWrr %1, undef %xmm2
+    RET 0
+...
+---
+name:      stack_fold_vpshabmr_vpshabrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshabmr_vpshabrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHABmr
+    %xmm0 = VPSHABrr %1, undef %xmm2
+    RET 0
+...
+---
+name:      stack_fold_vpshadmr_vpshadrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshadmr_vpshadrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHADmr
+    %xmm0 = VPSHADrr %1, undef %xmm2
+    RET 0
+...
+---
+name:      stack_fold_vpshaqmr_vpshaqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshaqmr_vpshaqrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHAQmr
+    %xmm0 = VPSHAQrr %1, undef %xmm2
+    RET 0
+...
+---
+name:      stack_fold_vpshawmr_vpshawrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshawmr_vpshawrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHAWmr
+    %xmm0 = VPSHAWrr %1, undef %xmm2
+    RET 0
+...
+---
+name:      stack_fold_vpshlbmr_vpshlbrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshlbmr_vpshlbrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHLBmr
+    %xmm0 = VPSHLBrr %1, undef %xmm2
+    RET 0
+...
+---
+name:      stack_fold_vpshldmr_vpshldrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshldmr_vpshldrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHLDmr
+    %xmm0 = VPSHLDrr %1, undef %xmm2
+    RET 0
+...
+---
+name:      stack_fold_vpshlqmr_vpshlqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshlqmr_vpshlqrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHLQmr
+    %xmm0 = VPSHLQrr %1, undef %xmm2
+    RET 0
+...
+---
+name:      stack_fold_vpshlwmr_vpshlwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: vr128 }
+liveins:
+  - { reg: '%xmm1', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm1
+
+    ; CHECK-LABEL: name:      stack_fold_vpshlwmr_vpshlwrr_test
+    %1 = COPY %xmm1
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHLWmr
+    %xmm0 = VPSHLWrr %1, undef %xmm2
+    RET 0
+...
+---
+name:      stack_fold_adcx32rm_adcx32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adcx32rm_adcx32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADCX32rm
+    %eax = ADCX32rr undef %ebx, %2, implicit-def %eflags, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_adcx64rm_adcx64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adcx64rm_adcx64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADCX64rm
+    %rax = ADCX64rr undef %rbx, %2, implicit-def %eflags, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_andn32rm_andn32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_andn32rm_andn32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ANDN32rm
+    %eax = ANDN32rr undef %ebx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_andn64rm_andn64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_andn64rm_andn64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ANDN64rm
+    %rax = ANDN64rr undef %rbx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmova16rm_cmova16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmova16rm_cmova16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVA16rm
+    %ax = CMOVA16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmova32rm_cmova32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmova32rm_cmova32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVA32rm
+    %eax = CMOVA32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmova64rm_cmova64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmova64rm_cmova64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVA64rm
+    %rax = CMOVA64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovae16rm_cmovae16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovae16rm_cmovae16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVAE16rm
+    %ax = CMOVAE16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovae32rm_cmovae32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovae32rm_cmovae32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVAE32rm
+    %eax = CMOVAE32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovae64rm_cmovae64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovae64rm_cmovae64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVAE64rm
+    %rax = CMOVAE64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovb16rm_cmovb16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovb16rm_cmovb16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVB16rm
+    %ax = CMOVB16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovb32rm_cmovb32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovb32rm_cmovb32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVB32rm
+    %eax = CMOVB32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovb64rm_cmovb64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovb64rm_cmovb64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVB64rm
+    %rax = CMOVB64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovbe16rm_cmovbe16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovbe16rm_cmovbe16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVBE16rm
+    %ax = CMOVBE16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovbe32rm_cmovbe32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovbe32rm_cmovbe32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVBE32rm
+    %eax = CMOVBE32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovbe64rm_cmovbe64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovbe64rm_cmovbe64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVBE64rm
+    %rax = CMOVBE64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmove16rm_cmove16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmove16rm_cmove16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVE16rm
+    %ax = CMOVE16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmove32rm_cmove32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmove32rm_cmove32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVE32rm
+    %eax = CMOVE32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmove64rm_cmove64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmove64rm_cmove64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVE64rm
+    %rax = CMOVE64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovg16rm_cmovg16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovg16rm_cmovg16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVG16rm
+    %ax = CMOVG16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovg32rm_cmovg32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovg32rm_cmovg32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVG32rm
+    %eax = CMOVG32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovg64rm_cmovg64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovg64rm_cmovg64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVG64rm
+    %rax = CMOVG64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovge16rm_cmovge16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovge16rm_cmovge16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVGE16rm
+    %ax = CMOVGE16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovge32rm_cmovge32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovge32rm_cmovge32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVGE32rm
+    %eax = CMOVGE32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovge64rm_cmovge64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovge64rm_cmovge64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVGE64rm
+    %rax = CMOVGE64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovl16rm_cmovl16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovl16rm_cmovl16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVL16rm
+    %ax = CMOVL16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovl32rm_cmovl32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovl32rm_cmovl32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVL32rm
+    %eax = CMOVL32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovl64rm_cmovl64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovl64rm_cmovl64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVL64rm
+    %rax = CMOVL64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovle16rm_cmovle16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovle16rm_cmovle16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVLE16rm
+    %ax = CMOVLE16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovle32rm_cmovle32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovle32rm_cmovle32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVLE32rm
+    %eax = CMOVLE32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovle64rm_cmovle64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovle64rm_cmovle64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVLE64rm
+    %rax = CMOVLE64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovne16rm_cmovne16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovne16rm_cmovne16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVNE16rm
+    %ax = CMOVNE16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovne32rm_cmovne32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovne32rm_cmovne32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVNE32rm
+    %eax = CMOVNE32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovne64rm_cmovne64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovne64rm_cmovne64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVNE64rm
+    %rax = CMOVNE64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovno16rm_cmovno16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovno16rm_cmovno16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVNO16rm
+    %ax = CMOVNO16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovno32rm_cmovno32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovno32rm_cmovno32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVNO32rm
+    %eax = CMOVNO32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovno64rm_cmovno64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovno64rm_cmovno64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVNO64rm
+    %rax = CMOVNO64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovnp16rm_cmovnp16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovnp16rm_cmovnp16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVNP16rm
+    %ax = CMOVNP16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovnp32rm_cmovnp32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovnp32rm_cmovnp32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVNP32rm
+    %eax = CMOVNP32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovnp64rm_cmovnp64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovnp64rm_cmovnp64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVNP64rm
+    %rax = CMOVNP64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovns16rm_cmovns16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovns16rm_cmovns16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVNS16rm
+    %ax = CMOVNS16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovns32rm_cmovns32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovns32rm_cmovns32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVNS32rm
+    %eax = CMOVNS32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovns64rm_cmovns64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovns64rm_cmovns64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVNS64rm
+    %rax = CMOVNS64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovo16rm_cmovo16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovo16rm_cmovo16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVO16rm
+    %ax = CMOVO16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovo32rm_cmovo32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovo32rm_cmovo32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVO32rm
+    %eax = CMOVO32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovo64rm_cmovo64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovo64rm_cmovo64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVO64rm
+    %rax = CMOVO64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovp16rm_cmovp16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovp16rm_cmovp16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVP16rm
+    %ax = CMOVP16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovp32rm_cmovp32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovp32rm_cmovp32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVP32rm
+    %eax = CMOVP32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovp64rm_cmovp64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovp64rm_cmovp64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVP64rm
+    %rax = CMOVP64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovs16rm_cmovs16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovs16rm_cmovs16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVS16rm
+    %ax = CMOVS16rr undef %bx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovs32rm_cmovs32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovs32rm_cmovs32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVS32rm
+    %eax = CMOVS32rr undef %ebx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmovs64rm_cmovs64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_cmovs64rm_cmovs64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMOVS64rm
+    %rax = CMOVS64rr undef %rbx, %2, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_mmx_packssdwirm_mmx_packssdwirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_packssdwirm_mmx_packssdwirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PACKSSDWirm
+    %mm0 = MMX_PACKSSDWirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_packsswbirm_mmx_packsswbirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_packsswbirm_mmx_packsswbirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PACKSSWBirm
+    %mm0 = MMX_PACKSSWBirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_packuswbirm_mmx_packuswbirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_packuswbirm_mmx_packuswbirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PACKUSWBirm
+    %mm0 = MMX_PACKUSWBirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_paddbirm_mmx_paddbirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_paddbirm_mmx_paddbirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PADDBirm
+    %mm0 = MMX_PADDBirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_padddirm_mmx_padddirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_padddirm_mmx_padddirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PADDDirm
+    %mm0 = MMX_PADDDirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_paddsbirm_mmx_paddsbirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_paddsbirm_mmx_paddsbirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PADDSBirm
+    %mm0 = MMX_PADDSBirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_paddswirm_mmx_paddswirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_paddswirm_mmx_paddswirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PADDSWirm
+    %mm0 = MMX_PADDSWirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_paddusbirm_mmx_paddusbirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_paddusbirm_mmx_paddusbirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PADDUSBirm
+    %mm0 = MMX_PADDUSBirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_padduswirm_mmx_padduswirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_padduswirm_mmx_padduswirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PADDUSWirm
+    %mm0 = MMX_PADDUSWirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_paddwirm_mmx_paddwirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_paddwirm_mmx_paddwirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PADDWirm
+    %mm0 = MMX_PADDWirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_pandnirm_mmx_pandnirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pandnirm_mmx_pandnirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PANDNirm
+    %mm0 = MMX_PANDNirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_pandirm_mmx_pandirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pandirm_mmx_pandirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PANDirm
+    %mm0 = MMX_PANDirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_pcmpeqbirm_mmx_pcmpeqbirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pcmpeqbirm_mmx_pcmpeqbirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PCMPEQBirm
+    %mm0 = MMX_PCMPEQBirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_pcmpeqdirm_mmx_pcmpeqdirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pcmpeqdirm_mmx_pcmpeqdirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PCMPEQDirm
+    %mm0 = MMX_PCMPEQDirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_pcmpeqwirm_mmx_pcmpeqwirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pcmpeqwirm_mmx_pcmpeqwirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PCMPEQWirm
+    %mm0 = MMX_PCMPEQWirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_pcmpgtbirm_mmx_pcmpgtbirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pcmpgtbirm_mmx_pcmpgtbirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PCMPGTBirm
+    %mm0 = MMX_PCMPGTBirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_pcmpgtdirm_mmx_pcmpgtdirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pcmpgtdirm_mmx_pcmpgtdirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PCMPGTDirm
+    %mm0 = MMX_PCMPGTDirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_pcmpgtwirm_mmx_pcmpgtwirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pcmpgtwirm_mmx_pcmpgtwirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PCMPGTWirm
+    %mm0 = MMX_PCMPGTWirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_pmaddwdirm_mmx_pmaddwdirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pmaddwdirm_mmx_pmaddwdirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PMADDWDirm
+    %mm0 = MMX_PMADDWDirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_pmulhwirm_mmx_pmulhwirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pmulhwirm_mmx_pmulhwirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PMULHWirm
+    %mm0 = MMX_PMULHWirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_pmullwirm_mmx_pmullwirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pmullwirm_mmx_pmullwirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PMULLWirm
+    %mm0 = MMX_PMULLWirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_porirm_mmx_porirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_porirm_mmx_porirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PORirm
+    %mm0 = MMX_PORirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_pslldrm_mmx_pslldrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pslldrm_mmx_pslldrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSLLDrm
+    %mm0 = MMX_PSLLDrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psllqrm_mmx_psllqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psllqrm_mmx_psllqrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSLLQrm
+    %mm0 = MMX_PSLLQrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psllwrm_mmx_psllwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psllwrm_mmx_psllwrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSLLWrm
+    %mm0 = MMX_PSLLWrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psradrm_mmx_psradrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psradrm_mmx_psradrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSRADrm
+    %mm0 = MMX_PSRADrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psrawrm_mmx_psrawrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psrawrm_mmx_psrawrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSRAWrm
+    %mm0 = MMX_PSRAWrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psrldrm_mmx_psrldrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psrldrm_mmx_psrldrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSRLDrm
+    %mm0 = MMX_PSRLDrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psrlqrm_mmx_psrlqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psrlqrm_mmx_psrlqrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSRLQrm
+    %mm0 = MMX_PSRLQrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psrlwrm_mmx_psrlwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psrlwrm_mmx_psrlwrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSRLWrm
+    %mm0 = MMX_PSRLWrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psubbirm_mmx_psubbirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psubbirm_mmx_psubbirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSUBBirm
+    %mm0 = MMX_PSUBBirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psubdirm_mmx_psubdirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psubdirm_mmx_psubdirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSUBDirm
+    %mm0 = MMX_PSUBDirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psubsbirm_mmx_psubsbirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psubsbirm_mmx_psubsbirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSUBSBirm
+    %mm0 = MMX_PSUBSBirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psubswirm_mmx_psubswirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psubswirm_mmx_psubswirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSUBSWirm
+    %mm0 = MMX_PSUBSWirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psubusbirm_mmx_psubusbirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psubusbirm_mmx_psubusbirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSUBUSBirm
+    %mm0 = MMX_PSUBUSBirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psubuswirm_mmx_psubuswirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psubuswirm_mmx_psubuswirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSUBUSWirm
+    %mm0 = MMX_PSUBUSWirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_psubwirm_mmx_psubwirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_psubwirm_mmx_psubwirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PSUBWirm
+    %mm0 = MMX_PSUBWirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_punpckhbwirm_mmx_punpckhbwirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_punpckhbwirm_mmx_punpckhbwirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PUNPCKHBWirm
+    %mm0 = MMX_PUNPCKHBWirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_punpckhdqirm_mmx_punpckhdqirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_punpckhdqirm_mmx_punpckhdqirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PUNPCKHDQirm
+    %mm0 = MMX_PUNPCKHDQirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_punpckhwdirm_mmx_punpckhwdirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_punpckhwdirm_mmx_punpckhwdirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PUNPCKHWDirm
+    %mm0 = MMX_PUNPCKHWDirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_punpcklbwirm_mmx_punpcklbwirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_punpcklbwirm_mmx_punpcklbwirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PUNPCKLBWirm
+    %mm0 = MMX_PUNPCKLBWirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_punpckldqirm_mmx_punpckldqirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_punpckldqirm_mmx_punpckldqirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PUNPCKLDQirm
+    %mm0 = MMX_PUNPCKLDQirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_punpcklwdirm_mmx_punpcklwdirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_punpcklwdirm_mmx_punpcklwdirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PUNPCKLWDirm
+    %mm0 = MMX_PUNPCKLWDirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mmx_pxorirm_mmx_pxorirr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_mmx_pxorirm_mmx_pxorirr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: MMX_PXORirm
+    %mm0 = MMX_PXORirr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_mulx32rm_mulx32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_mulx32rm_mulx32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MULX32rm
+    %eax, %ebx = MULX32rr %2, implicit undef %edx
+    RET 0
+...
+---
+name:      stack_fold_mulx64rm_mulx64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_mulx64rm_mulx64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MULX64rm
+    %rax, %rbx = MULX64rr %2, implicit undef %rdx
+    RET 0
+...
+---
+name:      stack_fold_pavgusbrm_pavgusbrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pavgusbrm_pavgusbrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PAVGUSBrm
+    %mm0 = PAVGUSBrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pdep32rm_pdep32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_pdep32rm_pdep32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: PDEP32rm
+    %eax = PDEP32rr undef %ebx, %2
+    RET 0
+...
+---
+name:      stack_fold_pdep64rm_pdep64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_pdep64rm_pdep64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: PDEP64rm
+    %rax = PDEP64rr undef %rbx, %2
+    RET 0
+...
+---
+name:      stack_fold_pext32rm_pext32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_pext32rm_pext32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: PEXT32rm
+    %eax = PEXT32rr undef %ebx, %2
+    RET 0
+...
+---
+name:      stack_fold_pext64rm_pext64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_pext64rm_pext64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: PEXT64rm
+    %rax = PEXT64rr undef %rbx, %2
+    RET 0
+...
+---
+name:      stack_fold_pfaccrm_pfaccrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfaccrm_pfaccrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFACCrm
+    %mm0 = PFACCrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfaddrm_pfaddrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfaddrm_pfaddrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFADDrm
+    %mm0 = PFADDrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfcmpeqrm_pfcmpeqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfcmpeqrm_pfcmpeqrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFCMPEQrm
+    %mm0 = PFCMPEQrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfcmpgerm_pfcmpgerr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfcmpgerm_pfcmpgerr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFCMPGErm
+    %mm0 = PFCMPGErr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfcmpgtrm_pfcmpgtrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfcmpgtrm_pfcmpgtrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFCMPGTrm
+    %mm0 = PFCMPGTrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfmaxrm_pfmaxrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfmaxrm_pfmaxrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFMAXrm
+    %mm0 = PFMAXrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfminrm_pfminrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfminrm_pfminrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFMINrm
+    %mm0 = PFMINrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfmulrm_pfmulrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfmulrm_pfmulrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFMULrm
+    %mm0 = PFMULrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfnaccrm_pfnaccrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfnaccrm_pfnaccrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFNACCrm
+    %mm0 = PFNACCrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfpnaccrm_pfpnaccrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfpnaccrm_pfpnaccrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFPNACCrm
+    %mm0 = PFPNACCrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfrcpit1rm_pfrcpit1rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfrcpit1rm_pfrcpit1rr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFRCPIT1rm
+    %mm0 = PFRCPIT1rr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfrcpit2rm_pfrcpit2rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfrcpit2rm_pfrcpit2rr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFRCPIT2rm
+    %mm0 = PFRCPIT2rr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfrsqit1rm_pfrsqit1rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfrsqit1rm_pfrsqit1rr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFRSQIT1rm
+    %mm0 = PFRSQIT1rr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfsubrrm_pfsubrrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfsubrrm_pfsubrrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFSUBRrm
+    %mm0 = PFSUBRrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pfsubrm_pfsubrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pfsubrm_pfsubrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PFSUBrm
+    %mm0 = PFSUBrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_pmulhrwrm_pmulhrwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr64 }
+liveins:
+  - { reg: '%mm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %mm2
+
+    ; CHECK-LABEL: name:      stack_fold_pmulhrwrm_pmulhrwrr_test
+    %2 = COPY %mm2
+    INLINEASM $nop, 1, 12, implicit-def %mm0, 12, implicit-def %mm1, 12, implicit-def %mm2, 12, implicit-def %mm3, 12, implicit-def %mm4, 12, implicit-def %mm5, 12, implicit-def %mm6, 12, implicit-def %mm7
+    ; CHECK: PMULHRWrm
+    %mm0 = PMULHRWrr undef %mm1, %2
+    RET 0
+...
+---
+name:      stack_fold_sha1msg1rm_sha1msg1rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_sha1msg1rm_sha1msg1rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: SHA1MSG1rm
+    %xmm0 = SHA1MSG1rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_sha1msg2rm_sha1msg2rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_sha1msg2rm_sha1msg2rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: SHA1MSG2rm
+    %xmm0 = SHA1MSG2rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_sha1nexterm_sha1nexterr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_sha1nexterm_sha1nexterr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: SHA1NEXTErm
+    %xmm0 = SHA1NEXTErr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_sha1rnds4rmi_sha1rnds4rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_sha1rnds4rmi_sha1rnds4rri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: SHA1RNDS4rmi
+    %xmm0 = SHA1RNDS4rri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_sha256msg1rm_sha256msg1rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_sha256msg1rm_sha256msg1rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: SHA256MSG1rm
+    %xmm0 = SHA256MSG1rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_sha256msg2rm_sha256msg2rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_sha256msg2rm_sha256msg2rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: SHA256MSG2rm
+    %xmm0 = SHA256MSG2rr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_sha256rnds2rm_sha256rnds2rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_sha256rnds2rm_sha256rnds2rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: SHA256RNDS2rm
+    %xmm0 = SHA256RNDS2rr undef %xmm1, %2, implicit undef %xmm0
+    RET 0
+...
+---
+name:      stack_fold_vfmaddpd4ymr_vfmaddpd4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddpd4ymr_vfmaddpd4yrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDPD4Ymr
+    %ymm0 = VFMADDPD4Yrr undef %ymm1, %2, undef %ymm3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddpd4mr_vfmaddpd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddpd4mr_vfmaddpd4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDPD4mr
+    %xmm0 = VFMADDPD4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddps4ymr_vfmaddps4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddps4ymr_vfmaddps4yrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDPS4Ymr
+    %ymm0 = VFMADDPS4Yrr undef %ymm1, %2, undef %ymm3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddps4mr_vfmaddps4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddps4mr_vfmaddps4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDPS4mr
+    %xmm0 = VFMADDPS4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsd4mr_vfmaddsd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: fr64 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsd4mr_vfmaddsd4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSD4mr
+    %xmm0 = VFMADDSD4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsd4mr_int_vfmaddsd4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsd4mr_int_vfmaddsd4rr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSD4mr_Int
+    %xmm0 = VFMADDSD4rr_Int undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddss4mr_vfmaddss4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: fr32 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddss4mr_vfmaddss4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSS4mr
+    %xmm0 = VFMADDSS4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddss4mr_int_vfmaddss4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddss4mr_int_vfmaddss4rr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSS4mr_Int
+    %xmm0 = VFMADDSS4rr_Int undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsubpd4ymr_vfmaddsubpd4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsubpd4ymr_vfmaddsubpd4yrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUBPD4Ymr
+    %ymm0 = VFMADDSUBPD4Yrr undef %ymm1, %2, undef %ymm3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsubpd4mr_vfmaddsubpd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsubpd4mr_vfmaddsubpd4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUBPD4mr
+    %xmm0 = VFMADDSUBPD4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsubps4ymr_vfmaddsubps4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsubps4ymr_vfmaddsubps4yrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUBPS4Ymr
+    %ymm0 = VFMADDSUBPS4Yrr undef %ymm1, %2, undef %ymm3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsubps4mr_vfmaddsubps4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsubps4mr_vfmaddsubps4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUBPS4mr
+    %xmm0 = VFMADDSUBPS4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubaddpd4ymr_vfmsubaddpd4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubaddpd4ymr_vfmsubaddpd4yrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADDPD4Ymr
+    %ymm0 = VFMSUBADDPD4Yrr undef %ymm1, %2, undef %ymm3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubaddpd4mr_vfmsubaddpd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubaddpd4mr_vfmsubaddpd4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADDPD4mr
+    %xmm0 = VFMSUBADDPD4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubaddps4ymr_vfmsubaddps4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubaddps4ymr_vfmsubaddps4yrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADDPS4Ymr
+    %ymm0 = VFMSUBADDPS4Yrr undef %ymm1, %2, undef %ymm3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubaddps4mr_vfmsubaddps4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubaddps4mr_vfmsubaddps4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADDPS4mr
+    %xmm0 = VFMSUBADDPS4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubpd4ymr_vfmsubpd4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubpd4ymr_vfmsubpd4yrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBPD4Ymr
+    %ymm0 = VFMSUBPD4Yrr undef %ymm1, %2, undef %ymm3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubpd4mr_vfmsubpd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubpd4mr_vfmsubpd4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBPD4mr
+    %xmm0 = VFMSUBPD4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubps4ymr_vfmsubps4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubps4ymr_vfmsubps4yrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBPS4Ymr
+    %ymm0 = VFMSUBPS4Yrr undef %ymm1, %2, undef %ymm3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubps4mr_vfmsubps4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubps4mr_vfmsubps4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBPS4mr
+    %xmm0 = VFMSUBPS4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubsd4mr_vfmsubsd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: fr64 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubsd4mr_vfmsubsd4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBSD4mr
+    %xmm0 = VFMSUBSD4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubsd4mr_int_vfmsubsd4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubsd4mr_int_vfmsubsd4rr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBSD4mr_Int
+    %xmm0 = VFMSUBSD4rr_Int undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubss4mr_vfmsubss4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: fr32 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubss4mr_vfmsubss4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBSS4mr
+    %xmm0 = VFMSUBSS4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubss4mr_int_vfmsubss4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubss4mr_int_vfmsubss4rr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBSS4mr_Int
+    %xmm0 = VFMSUBSS4rr_Int undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddpd4ymr_vfnmaddpd4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddpd4ymr_vfnmaddpd4yrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDPD4Ymr
+    %ymm0 = VFNMADDPD4Yrr undef %ymm1, %2, undef %ymm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddpd4mr_vfnmaddpd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddpd4mr_vfnmaddpd4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDPD4mr
+    %xmm0 = VFNMADDPD4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddps4ymr_vfnmaddps4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddps4ymr_vfnmaddps4yrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDPS4Ymr
+    %ymm0 = VFNMADDPS4Yrr undef %ymm1, %2, undef %ymm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddps4mr_vfnmaddps4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddps4mr_vfnmaddps4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDPS4mr
+    %xmm0 = VFNMADDPS4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddsd4mr_vfnmaddsd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: fr64 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddsd4mr_vfnmaddsd4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDSD4mr
+    %xmm0 = VFNMADDSD4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddsd4mr_int_vfnmaddsd4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddsd4mr_int_vfnmaddsd4rr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDSD4mr_Int
+    %xmm0 = VFNMADDSD4rr_Int undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddss4mr_vfnmaddss4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: fr32 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddss4mr_vfnmaddss4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDSS4mr
+    %xmm0 = VFNMADDSS4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddss4mr_int_vfnmaddss4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddss4mr_int_vfnmaddss4rr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDSS4mr_Int
+    %xmm0 = VFNMADDSS4rr_Int undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubpd4ymr_vfnmsubpd4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubpd4ymr_vfnmsubpd4yrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBPD4Ymr
+    %ymm0 = VFNMSUBPD4Yrr undef %ymm1, %2, undef %ymm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubpd4mr_vfnmsubpd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubpd4mr_vfnmsubpd4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBPD4mr
+    %xmm0 = VFNMSUBPD4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubps4ymr_vfnmsubps4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubps4ymr_vfnmsubps4yrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBPS4Ymr
+    %ymm0 = VFNMSUBPS4Yrr undef %ymm1, %2, undef %ymm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubps4mr_vfnmsubps4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubps4mr_vfnmsubps4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBPS4mr
+    %xmm0 = VFNMSUBPS4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubsd4mr_vfnmsubsd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: fr64 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubsd4mr_vfnmsubsd4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBSD4mr
+    %xmm0 = VFNMSUBSD4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubsd4mr_int_vfnmsubsd4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubsd4mr_int_vfnmsubsd4rr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBSD4mr_Int
+    %xmm0 = VFNMSUBSD4rr_Int undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubss4mr_vfnmsubss4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: fr32 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubss4mr_vfnmsubss4rr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBSS4mr
+    %xmm0 = VFNMSUBSS4rr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubss4mr_int_vfnmsubss4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubss4mr_int_vfnmsubss4rr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBSS4mr_Int
+    %xmm0 = VFNMSUBSS4rr_Int undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vpcmovyrmr_vpcmovyrrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmovyrmr_vpcmovyrrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMOVYrmr
+    %ymm0 = VPCMOVYrrr undef %ymm1, %2, undef %ymm3
+    RET 0
+...
+---
+name:      stack_fold_vpcmovrmr_vpcmovrrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmovrmr_vpcmovrrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMOVrmr
+    %xmm0 = VPCMOVrrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vpcombmi_vpcombri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcombmi_vpcombri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMBmi
+    %xmm0 = VPCOMBri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcombmi_alt_vpcombri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcombmi_alt_vpcombri_alt_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMBmi_alt
+    %xmm0 = VPCOMBri_alt undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomdmi_vpcomdri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomdmi_vpcomdri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMDmi
+    %xmm0 = VPCOMDri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomdmi_alt_vpcomdri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomdmi_alt_vpcomdri_alt_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMDmi_alt
+    %xmm0 = VPCOMDri_alt undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomqmi_vpcomqri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomqmi_vpcomqri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMQmi
+    %xmm0 = VPCOMQri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomqmi_alt_vpcomqri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomqmi_alt_vpcomqri_alt_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMQmi_alt
+    %xmm0 = VPCOMQri_alt undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomubmi_vpcomubri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomubmi_vpcomubri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMUBmi
+    %xmm0 = VPCOMUBri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomubmi_alt_vpcomubri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomubmi_alt_vpcomubri_alt_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMUBmi_alt
+    %xmm0 = VPCOMUBri_alt undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomudmi_vpcomudri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomudmi_vpcomudri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMUDmi
+    %xmm0 = VPCOMUDri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomudmi_alt_vpcomudri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomudmi_alt_vpcomudri_alt_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMUDmi_alt
+    %xmm0 = VPCOMUDri_alt undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomuqmi_vpcomuqri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomuqmi_vpcomuqri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMUQmi
+    %xmm0 = VPCOMUQri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomuqmi_alt_vpcomuqri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomuqmi_alt_vpcomuqri_alt_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMUQmi_alt
+    %xmm0 = VPCOMUQri_alt undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomuwmi_vpcomuwri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomuwmi_vpcomuwri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMUWmi
+    %xmm0 = VPCOMUWri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomuwmi_alt_vpcomuwri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomuwmi_alt_vpcomuwri_alt_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMUWmi_alt
+    %xmm0 = VPCOMUWri_alt undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomwmi_vpcomwri_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomwmi_vpcomwri_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMWmi
+    %xmm0 = VPCOMWri undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpcomwmi_alt_vpcomwri_alt_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpcomwmi_alt_vpcomwri_alt_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCOMWmi_alt
+    %xmm0 = VPCOMWri_alt undef %xmm1, %2, 0
+    RET 0
+...
+---
+name:      stack_fold_vpermil2pdymr_vpermil2pdyrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermil2pdymr_vpermil2pdyrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMIL2PDYmr
+    %ymm0 = VPERMIL2PDYrr undef %ymm1, %2, undef %ymm3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpermil2pdmr_vpermil2pdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermil2pdmr_vpermil2pdrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMIL2PDmr
+    %xmm0 = VPERMIL2PDrr undef %xmm1, %2, undef %xmm3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpermil2psymr_vpermil2psyrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr256 }
+liveins:
+  - { reg: '%ymm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermil2psymr_vpermil2psyrr_test
+    %2 = COPY %ymm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMIL2PSYmr
+    %ymm0 = VPERMIL2PSYrr undef %ymm1, %2, undef %ymm3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpermil2psmr_vpermil2psrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpermil2psmr_vpermil2psrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMIL2PSmr
+    %xmm0 = VPERMIL2PSrr undef %xmm1, %2, undef %xmm3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpmacsddrm_vpmacsddrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmacsddrm_vpmacsddrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMACSDDrm
+    %xmm0 = VPMACSDDrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vpmacsdqhrm_vpmacsdqhrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmacsdqhrm_vpmacsdqhrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMACSDQHrm
+    %xmm0 = VPMACSDQHrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vpmacsdqlrm_vpmacsdqlrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmacsdqlrm_vpmacsdqlrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMACSDQLrm
+    %xmm0 = VPMACSDQLrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vpmacssddrm_vpmacssddrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmacssddrm_vpmacssddrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMACSSDDrm
+    %xmm0 = VPMACSSDDrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vpmacssdqhrm_vpmacssdqhrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmacssdqhrm_vpmacssdqhrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMACSSDQHrm
+    %xmm0 = VPMACSSDQHrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vpmacssdqlrm_vpmacssdqlrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmacssdqlrm_vpmacssdqlrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMACSSDQLrm
+    %xmm0 = VPMACSSDQLrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vpmacsswdrm_vpmacsswdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmacsswdrm_vpmacsswdrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMACSSWDrm
+    %xmm0 = VPMACSSWDrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vpmacsswwrm_vpmacsswwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmacsswwrm_vpmacsswwrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMACSSWWrm
+    %xmm0 = VPMACSSWWrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vpmacswdrm_vpmacswdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmacswdrm_vpmacswdrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMACSWDrm
+    %xmm0 = VPMACSWDrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vpmacswwrm_vpmacswwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmacswwrm_vpmacswwrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMACSWWrm
+    %xmm0 = VPMACSWWrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vpmadcsswdrm_vpmadcsswdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadcsswdrm_vpmadcsswdrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADCSSWDrm
+    %xmm0 = VPMADCSSWDrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vpmadcswdrm_vpmadcswdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpmadcswdrm_vpmadcswdrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPMADCSWDrm
+    %xmm0 = VPMADCSWDrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vppermrmr_vppermrrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vppermrmr_vppermrrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPPERMrmr
+    %xmm0 = VPPERMrrr undef %xmm1, %2, undef %xmm3
+    RET 0
+...
+---
+name:      stack_fold_vprotbrm_vprotbrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vprotbrm_vprotbrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPROTBrm
+    %xmm0 = VPROTBrr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vprotdrm_vprotdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vprotdrm_vprotdrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPROTDrm
+    %xmm0 = VPROTDrr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vprotqrm_vprotqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vprotqrm_vprotqrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPROTQrm
+    %xmm0 = VPROTQrr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vprotwrm_vprotwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vprotwrm_vprotwrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPROTWrm
+    %xmm0 = VPROTWrr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpshabrm_vpshabrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshabrm_vpshabrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHABrm
+    %xmm0 = VPSHABrr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpshadrm_vpshadrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshadrm_vpshadrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHADrm
+    %xmm0 = VPSHADrr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpshaqrm_vpshaqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshaqrm_vpshaqrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHAQrm
+    %xmm0 = VPSHAQrr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpshawrm_vpshawrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshawrm_vpshawrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHAWrm
+    %xmm0 = VPSHAWrr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpshlbrm_vpshlbrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshlbrm_vpshlbrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHLBrm
+    %xmm0 = VPSHLBrr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpshldrm_vpshldrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshldrm_vpshldrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHLDrm
+    %xmm0 = VPSHLDrr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpshlqrm_vpshlqrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshlqrm_vpshlqrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHLQrm
+    %xmm0 = VPSHLQrr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vpshlwrm_vpshlwrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vpshlwrm_vpshlwrr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPSHLWrm
+    %xmm0 = VPSHLWrr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vfmadd132pdym_vfmadd132pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd132pdym_vfmadd132pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD132PDYm
+    %ymm0 = VFMADD132PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd132pdm_vfmadd132pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd132pdm_vfmadd132pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD132PDm
+    %xmm0 = VFMADD132PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd132psym_vfmadd132psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd132psym_vfmadd132psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD132PSYm
+    %ymm0 = VFMADD132PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd132psm_vfmadd132psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd132psm_vfmadd132psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD132PSm
+    %xmm0 = VFMADD132PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd132sdm_vfmadd132sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd132sdm_vfmadd132sdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD132SDm
+    %xmm0 = VFMADD132SDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd132sdm_int_vfmadd132sdr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd132sdm_int_vfmadd132sdr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD132SDm_Int
+    %xmm0 = VFMADD132SDr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd132ssm_vfmadd132ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd132ssm_vfmadd132ssr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD132SSm
+    %xmm0 = VFMADD132SSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd132ssm_int_vfmadd132ssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd132ssm_int_vfmadd132ssr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD132SSm_Int
+    %xmm0 = VFMADD132SSr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd213pdym_vfmadd213pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd213pdym_vfmadd213pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD213PDYm
+    %ymm0 = VFMADD213PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd213pdm_vfmadd213pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd213pdm_vfmadd213pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD213PDm
+    %xmm0 = VFMADD213PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd213psym_vfmadd213psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd213psym_vfmadd213psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD213PSYm
+    %ymm0 = VFMADD213PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd213psm_vfmadd213psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd213psm_vfmadd213psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD213PSm
+    %xmm0 = VFMADD213PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd213sdm_vfmadd213sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd213sdm_vfmadd213sdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD213SDm
+    %xmm0 = VFMADD213SDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd213sdm_int_vfmadd213sdr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd213sdm_int_vfmadd213sdr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD213SDm_Int
+    %xmm0 = VFMADD213SDr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd213ssm_vfmadd213ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd213ssm_vfmadd213ssr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD213SSm
+    %xmm0 = VFMADD213SSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd213ssm_int_vfmadd213ssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd213ssm_int_vfmadd213ssr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD213SSm_Int
+    %xmm0 = VFMADD213SSr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd231pdym_vfmadd231pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd231pdym_vfmadd231pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD231PDYm
+    %ymm0 = VFMADD231PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd231pdm_vfmadd231pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd231pdm_vfmadd231pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD231PDm
+    %xmm0 = VFMADD231PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd231psym_vfmadd231psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd231psym_vfmadd231psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD231PSYm
+    %ymm0 = VFMADD231PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd231psm_vfmadd231psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd231psm_vfmadd231psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD231PSm
+    %xmm0 = VFMADD231PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd231sdm_vfmadd231sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd231sdm_vfmadd231sdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD231SDm
+    %xmm0 = VFMADD231SDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd231sdm_int_vfmadd231sdr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd231sdm_int_vfmadd231sdr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD231SDm_Int
+    %xmm0 = VFMADD231SDr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd231ssm_vfmadd231ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd231ssm_vfmadd231ssr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD231SSm
+    %xmm0 = VFMADD231SSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmadd231ssm_int_vfmadd231ssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmadd231ssm_int_vfmadd231ssr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADD231SSm_Int
+    %xmm0 = VFMADD231SSr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddpd4yrm_vfmaddpd4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddpd4yrm_vfmaddpd4yrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDPD4Yrm
+    %ymm0 = VFMADDPD4Yrr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddpd4rm_vfmaddpd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddpd4rm_vfmaddpd4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDPD4rm
+    %xmm0 = VFMADDPD4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddps4yrm_vfmaddps4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddps4yrm_vfmaddps4yrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDPS4Yrm
+    %ymm0 = VFMADDPS4Yrr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddps4rm_vfmaddps4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddps4rm_vfmaddps4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDPS4rm
+    %xmm0 = VFMADDPS4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsd4rm_vfmaddsd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsd4rm_vfmaddsd4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSD4rm
+    %xmm0 = VFMADDSD4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsd4rm_int_vfmaddsd4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsd4rm_int_vfmaddsd4rr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSD4rm_Int
+    %xmm0 = VFMADDSD4rr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddss4rm_vfmaddss4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddss4rm_vfmaddss4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSS4rm
+    %xmm0 = VFMADDSS4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddss4rm_int_vfmaddss4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddss4rm_int_vfmaddss4rr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSS4rm_Int
+    %xmm0 = VFMADDSS4rr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsub132pdym_vfmaddsub132pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsub132pdym_vfmaddsub132pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUB132PDYm
+    %ymm0 = VFMADDSUB132PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsub132pdm_vfmaddsub132pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsub132pdm_vfmaddsub132pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUB132PDm
+    %xmm0 = VFMADDSUB132PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsub132psym_vfmaddsub132psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsub132psym_vfmaddsub132psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUB132PSYm
+    %ymm0 = VFMADDSUB132PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsub132psm_vfmaddsub132psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsub132psm_vfmaddsub132psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUB132PSm
+    %xmm0 = VFMADDSUB132PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsub213pdym_vfmaddsub213pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsub213pdym_vfmaddsub213pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUB213PDYm
+    %ymm0 = VFMADDSUB213PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsub213pdm_vfmaddsub213pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsub213pdm_vfmaddsub213pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUB213PDm
+    %xmm0 = VFMADDSUB213PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsub213psym_vfmaddsub213psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsub213psym_vfmaddsub213psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUB213PSYm
+    %ymm0 = VFMADDSUB213PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsub213psm_vfmaddsub213psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsub213psm_vfmaddsub213psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUB213PSm
+    %xmm0 = VFMADDSUB213PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsub231pdym_vfmaddsub231pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsub231pdym_vfmaddsub231pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUB231PDYm
+    %ymm0 = VFMADDSUB231PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsub231pdm_vfmaddsub231pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsub231pdm_vfmaddsub231pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUB231PDm
+    %xmm0 = VFMADDSUB231PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsub231psym_vfmaddsub231psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsub231psym_vfmaddsub231psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUB231PSYm
+    %ymm0 = VFMADDSUB231PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsub231psm_vfmaddsub231psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsub231psm_vfmaddsub231psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUB231PSm
+    %xmm0 = VFMADDSUB231PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsubpd4yrm_vfmaddsubpd4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsubpd4yrm_vfmaddsubpd4yrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUBPD4Yrm
+    %ymm0 = VFMADDSUBPD4Yrr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsubpd4rm_vfmaddsubpd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsubpd4rm_vfmaddsubpd4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUBPD4rm
+    %xmm0 = VFMADDSUBPD4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsubps4yrm_vfmaddsubps4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsubps4yrm_vfmaddsubps4yrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUBPS4Yrm
+    %ymm0 = VFMADDSUBPS4Yrr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmaddsubps4rm_vfmaddsubps4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmaddsubps4rm_vfmaddsubps4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMADDSUBPS4rm
+    %xmm0 = VFMADDSUBPS4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub132pdym_vfmsub132pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub132pdym_vfmsub132pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB132PDYm
+    %ymm0 = VFMSUB132PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub132pdm_vfmsub132pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub132pdm_vfmsub132pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB132PDm
+    %xmm0 = VFMSUB132PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub132psym_vfmsub132psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub132psym_vfmsub132psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB132PSYm
+    %ymm0 = VFMSUB132PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub132psm_vfmsub132psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub132psm_vfmsub132psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB132PSm
+    %xmm0 = VFMSUB132PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub132sdm_vfmsub132sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub132sdm_vfmsub132sdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB132SDm
+    %xmm0 = VFMSUB132SDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub132sdm_int_vfmsub132sdr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub132sdm_int_vfmsub132sdr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB132SDm_Int
+    %xmm0 = VFMSUB132SDr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub132ssm_vfmsub132ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub132ssm_vfmsub132ssr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB132SSm
+    %xmm0 = VFMSUB132SSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub132ssm_int_vfmsub132ssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub132ssm_int_vfmsub132ssr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB132SSm_Int
+    %xmm0 = VFMSUB132SSr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub213pdym_vfmsub213pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub213pdym_vfmsub213pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB213PDYm
+    %ymm0 = VFMSUB213PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub213pdm_vfmsub213pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub213pdm_vfmsub213pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB213PDm
+    %xmm0 = VFMSUB213PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub213psym_vfmsub213psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub213psym_vfmsub213psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB213PSYm
+    %ymm0 = VFMSUB213PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub213psm_vfmsub213psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub213psm_vfmsub213psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB213PSm
+    %xmm0 = VFMSUB213PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub213sdm_vfmsub213sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub213sdm_vfmsub213sdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB213SDm
+    %xmm0 = VFMSUB213SDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub213sdm_int_vfmsub213sdr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub213sdm_int_vfmsub213sdr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB213SDm_Int
+    %xmm0 = VFMSUB213SDr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub213ssm_vfmsub213ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub213ssm_vfmsub213ssr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB213SSm
+    %xmm0 = VFMSUB213SSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub213ssm_int_vfmsub213ssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub213ssm_int_vfmsub213ssr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB213SSm_Int
+    %xmm0 = VFMSUB213SSr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub231pdym_vfmsub231pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub231pdym_vfmsub231pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB231PDYm
+    %ymm0 = VFMSUB231PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub231pdm_vfmsub231pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub231pdm_vfmsub231pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB231PDm
+    %xmm0 = VFMSUB231PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub231psym_vfmsub231psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub231psym_vfmsub231psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB231PSYm
+    %ymm0 = VFMSUB231PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub231psm_vfmsub231psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub231psm_vfmsub231psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB231PSm
+    %xmm0 = VFMSUB231PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub231sdm_vfmsub231sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub231sdm_vfmsub231sdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB231SDm
+    %xmm0 = VFMSUB231SDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub231sdm_int_vfmsub231sdr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub231sdm_int_vfmsub231sdr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB231SDm_Int
+    %xmm0 = VFMSUB231SDr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub231ssm_vfmsub231ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub231ssm_vfmsub231ssr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB231SSm
+    %xmm0 = VFMSUB231SSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsub231ssm_int_vfmsub231ssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsub231ssm_int_vfmsub231ssr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUB231SSm_Int
+    %xmm0 = VFMSUB231SSr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubadd132pdym_vfmsubadd132pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubadd132pdym_vfmsubadd132pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADD132PDYm
+    %ymm0 = VFMSUBADD132PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubadd132pdm_vfmsubadd132pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubadd132pdm_vfmsubadd132pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADD132PDm
+    %xmm0 = VFMSUBADD132PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubadd132psym_vfmsubadd132psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubadd132psym_vfmsubadd132psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADD132PSYm
+    %ymm0 = VFMSUBADD132PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubadd132psm_vfmsubadd132psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubadd132psm_vfmsubadd132psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADD132PSm
+    %xmm0 = VFMSUBADD132PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubadd213pdym_vfmsubadd213pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubadd213pdym_vfmsubadd213pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADD213PDYm
+    %ymm0 = VFMSUBADD213PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubadd213pdm_vfmsubadd213pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubadd213pdm_vfmsubadd213pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADD213PDm
+    %xmm0 = VFMSUBADD213PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubadd213psym_vfmsubadd213psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubadd213psym_vfmsubadd213psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADD213PSYm
+    %ymm0 = VFMSUBADD213PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubadd213psm_vfmsubadd213psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubadd213psm_vfmsubadd213psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADD213PSm
+    %xmm0 = VFMSUBADD213PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubadd231pdym_vfmsubadd231pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubadd231pdym_vfmsubadd231pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADD231PDYm
+    %ymm0 = VFMSUBADD231PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubadd231pdm_vfmsubadd231pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubadd231pdm_vfmsubadd231pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADD231PDm
+    %xmm0 = VFMSUBADD231PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubadd231psym_vfmsubadd231psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubadd231psym_vfmsubadd231psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADD231PSYm
+    %ymm0 = VFMSUBADD231PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubadd231psm_vfmsubadd231psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubadd231psm_vfmsubadd231psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADD231PSm
+    %xmm0 = VFMSUBADD231PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubaddpd4yrm_vfmsubaddpd4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubaddpd4yrm_vfmsubaddpd4yrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADDPD4Yrm
+    %ymm0 = VFMSUBADDPD4Yrr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubaddpd4rm_vfmsubaddpd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubaddpd4rm_vfmsubaddpd4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADDPD4rm
+    %xmm0 = VFMSUBADDPD4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubaddps4yrm_vfmsubaddps4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubaddps4yrm_vfmsubaddps4yrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADDPS4Yrm
+    %ymm0 = VFMSUBADDPS4Yrr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubaddps4rm_vfmsubaddps4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubaddps4rm_vfmsubaddps4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBADDPS4rm
+    %xmm0 = VFMSUBADDPS4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubpd4yrm_vfmsubpd4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubpd4yrm_vfmsubpd4yrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBPD4Yrm
+    %ymm0 = VFMSUBPD4Yrr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubpd4rm_vfmsubpd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubpd4rm_vfmsubpd4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBPD4rm
+    %xmm0 = VFMSUBPD4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubps4yrm_vfmsubps4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubps4yrm_vfmsubps4yrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBPS4Yrm
+    %ymm0 = VFMSUBPS4Yrr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubps4rm_vfmsubps4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubps4rm_vfmsubps4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBPS4rm
+    %xmm0 = VFMSUBPS4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubsd4rm_vfmsubsd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubsd4rm_vfmsubsd4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBSD4rm
+    %xmm0 = VFMSUBSD4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubsd4rm_int_vfmsubsd4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubsd4rm_int_vfmsubsd4rr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBSD4rm_Int
+    %xmm0 = VFMSUBSD4rr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubss4rm_vfmsubss4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubss4rm_vfmsubss4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBSS4rm
+    %xmm0 = VFMSUBSS4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfmsubss4rm_int_vfmsubss4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfmsubss4rm_int_vfmsubss4rr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFMSUBSS4rm_Int
+    %xmm0 = VFMSUBSS4rr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd132pdym_vfnmadd132pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd132pdym_vfnmadd132pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD132PDYm
+    %ymm0 = VFNMADD132PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd132pdm_vfnmadd132pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd132pdm_vfnmadd132pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD132PDm
+    %xmm0 = VFNMADD132PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd132psym_vfnmadd132psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd132psym_vfnmadd132psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD132PSYm
+    %ymm0 = VFNMADD132PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd132psm_vfnmadd132psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd132psm_vfnmadd132psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD132PSm
+    %xmm0 = VFNMADD132PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd132sdm_vfnmadd132sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd132sdm_vfnmadd132sdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD132SDm
+    %xmm0 = VFNMADD132SDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd132sdm_int_vfnmadd132sdr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd132sdm_int_vfnmadd132sdr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD132SDm_Int
+    %xmm0 = VFNMADD132SDr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd132ssm_vfnmadd132ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd132ssm_vfnmadd132ssr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD132SSm
+    %xmm0 = VFNMADD132SSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd132ssm_int_vfnmadd132ssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd132ssm_int_vfnmadd132ssr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD132SSm_Int
+    %xmm0 = VFNMADD132SSr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd213pdym_vfnmadd213pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd213pdym_vfnmadd213pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD213PDYm
+    %ymm0 = VFNMADD213PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd213pdm_vfnmadd213pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd213pdm_vfnmadd213pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD213PDm
+    %xmm0 = VFNMADD213PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd213psym_vfnmadd213psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd213psym_vfnmadd213psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD213PSYm
+    %ymm0 = VFNMADD213PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd213psm_vfnmadd213psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd213psm_vfnmadd213psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD213PSm
+    %xmm0 = VFNMADD213PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd213sdm_vfnmadd213sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd213sdm_vfnmadd213sdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD213SDm
+    %xmm0 = VFNMADD213SDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd213sdm_int_vfnmadd213sdr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd213sdm_int_vfnmadd213sdr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD213SDm_Int
+    %xmm0 = VFNMADD213SDr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd213ssm_vfnmadd213ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd213ssm_vfnmadd213ssr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD213SSm
+    %xmm0 = VFNMADD213SSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd213ssm_int_vfnmadd213ssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd213ssm_int_vfnmadd213ssr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD213SSm_Int
+    %xmm0 = VFNMADD213SSr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd231pdym_vfnmadd231pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd231pdym_vfnmadd231pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD231PDYm
+    %ymm0 = VFNMADD231PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd231pdm_vfnmadd231pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd231pdm_vfnmadd231pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD231PDm
+    %xmm0 = VFNMADD231PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd231psym_vfnmadd231psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd231psym_vfnmadd231psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD231PSYm
+    %ymm0 = VFNMADD231PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd231psm_vfnmadd231psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd231psm_vfnmadd231psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD231PSm
+    %xmm0 = VFNMADD231PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd231sdm_vfnmadd231sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd231sdm_vfnmadd231sdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD231SDm
+    %xmm0 = VFNMADD231SDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd231sdm_int_vfnmadd231sdr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd231sdm_int_vfnmadd231sdr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD231SDm_Int
+    %xmm0 = VFNMADD231SDr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd231ssm_vfnmadd231ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd231ssm_vfnmadd231ssr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD231SSm
+    %xmm0 = VFNMADD231SSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmadd231ssm_int_vfnmadd231ssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmadd231ssm_int_vfnmadd231ssr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADD231SSm_Int
+    %xmm0 = VFNMADD231SSr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddpd4yrm_vfnmaddpd4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddpd4yrm_vfnmaddpd4yrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDPD4Yrm
+    %ymm0 = VFNMADDPD4Yrr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddpd4rm_vfnmaddpd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddpd4rm_vfnmaddpd4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDPD4rm
+    %xmm0 = VFNMADDPD4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddps4yrm_vfnmaddps4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddps4yrm_vfnmaddps4yrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDPS4Yrm
+    %ymm0 = VFNMADDPS4Yrr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddps4rm_vfnmaddps4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddps4rm_vfnmaddps4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDPS4rm
+    %xmm0 = VFNMADDPS4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddsd4rm_vfnmaddsd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddsd4rm_vfnmaddsd4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDSD4rm
+    %xmm0 = VFNMADDSD4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddsd4rm_int_vfnmaddsd4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddsd4rm_int_vfnmaddsd4rr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDSD4rm_Int
+    %xmm0 = VFNMADDSD4rr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddss4rm_vfnmaddss4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddss4rm_vfnmaddss4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDSS4rm
+    %xmm0 = VFNMADDSS4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmaddss4rm_int_vfnmaddss4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmaddss4rm_int_vfnmaddss4rr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMADDSS4rm_Int
+    %xmm0 = VFNMADDSS4rr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub132pdym_vfnmsub132pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub132pdym_vfnmsub132pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB132PDYm
+    %ymm0 = VFNMSUB132PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub132pdm_vfnmsub132pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub132pdm_vfnmsub132pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB132PDm
+    %xmm0 = VFNMSUB132PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub132psym_vfnmsub132psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub132psym_vfnmsub132psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB132PSYm
+    %ymm0 = VFNMSUB132PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub132psm_vfnmsub132psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub132psm_vfnmsub132psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB132PSm
+    %xmm0 = VFNMSUB132PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub132sdm_vfnmsub132sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub132sdm_vfnmsub132sdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB132SDm
+    %xmm0 = VFNMSUB132SDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub132sdm_int_vfnmsub132sdr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub132sdm_int_vfnmsub132sdr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB132SDm_Int
+    %xmm0 = VFNMSUB132SDr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub132ssm_vfnmsub132ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub132ssm_vfnmsub132ssr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB132SSm
+    %xmm0 = VFNMSUB132SSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub132ssm_int_vfnmsub132ssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub132ssm_int_vfnmsub132ssr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB132SSm_Int
+    %xmm0 = VFNMSUB132SSr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub213pdym_vfnmsub213pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub213pdym_vfnmsub213pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB213PDYm
+    %ymm0 = VFNMSUB213PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub213pdm_vfnmsub213pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub213pdm_vfnmsub213pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB213PDm
+    %xmm0 = VFNMSUB213PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub213psym_vfnmsub213psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub213psym_vfnmsub213psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB213PSYm
+    %ymm0 = VFNMSUB213PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub213psm_vfnmsub213psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub213psm_vfnmsub213psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB213PSm
+    %xmm0 = VFNMSUB213PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub213sdm_vfnmsub213sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub213sdm_vfnmsub213sdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB213SDm
+    %xmm0 = VFNMSUB213SDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub213sdm_int_vfnmsub213sdr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub213sdm_int_vfnmsub213sdr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB213SDm_Int
+    %xmm0 = VFNMSUB213SDr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub213ssm_vfnmsub213ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub213ssm_vfnmsub213ssr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB213SSm
+    %xmm0 = VFNMSUB213SSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub213ssm_int_vfnmsub213ssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub213ssm_int_vfnmsub213ssr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB213SSm_Int
+    %xmm0 = VFNMSUB213SSr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub231pdym_vfnmsub231pdyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub231pdym_vfnmsub231pdyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB231PDYm
+    %ymm0 = VFNMSUB231PDYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub231pdm_vfnmsub231pdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub231pdm_vfnmsub231pdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB231PDm
+    %xmm0 = VFNMSUB231PDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub231psym_vfnmsub231psyr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub231psym_vfnmsub231psyr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB231PSYm
+    %ymm0 = VFNMSUB231PSYr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub231psm_vfnmsub231psr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub231psm_vfnmsub231psr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB231PSm
+    %xmm0 = VFNMSUB231PSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub231sdm_vfnmsub231sdr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub231sdm_vfnmsub231sdr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB231SDm
+    %xmm0 = VFNMSUB231SDr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub231sdm_int_vfnmsub231sdr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub231sdm_int_vfnmsub231sdr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB231SDm_Int
+    %xmm0 = VFNMSUB231SDr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub231ssm_vfnmsub231ssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub231ssm_vfnmsub231ssr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB231SSm
+    %xmm0 = VFNMSUB231SSr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsub231ssm_int_vfnmsub231ssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsub231ssm_int_vfnmsub231ssr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUB231SSm_Int
+    %xmm0 = VFNMSUB231SSr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubpd4yrm_vfnmsubpd4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubpd4yrm_vfnmsubpd4yrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBPD4Yrm
+    %ymm0 = VFNMSUBPD4Yrr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubpd4rm_vfnmsubpd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubpd4rm_vfnmsubpd4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBPD4rm
+    %xmm0 = VFNMSUBPD4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubps4yrm_vfnmsubps4yrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubps4yrm_vfnmsubps4yrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBPS4Yrm
+    %ymm0 = VFNMSUBPS4Yrr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubps4rm_vfnmsubps4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubps4rm_vfnmsubps4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBPS4rm
+    %xmm0 = VFNMSUBPS4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubsd4rm_vfnmsubsd4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr64 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubsd4rm_vfnmsubsd4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBSD4rm
+    %xmm0 = VFNMSUBSD4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubsd4rm_int_vfnmsubsd4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubsd4rm_int_vfnmsubsd4rr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBSD4rm_Int
+    %xmm0 = VFNMSUBSD4rr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubss4rm_vfnmsubss4rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: fr32 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubss4rm_vfnmsubss4rr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBSS4rm
+    %xmm0 = VFNMSUBSS4rr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vfnmsubss4rm_int_vfnmsubss4rr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vfnmsubss4rm_int_vfnmsubss4rr_int_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VFNMSUBSS4rm_Int
+    %xmm0 = VFNMSUBSS4rr_Int undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmovyrrm_vpcmovyrrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmovyrrm_vpcmovyrrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMOVYrrm
+    %ymm0 = VPCMOVYrrr undef %ymm1, undef %ymm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpcmovrrm_vpcmovrrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpcmovrrm_vpcmovrrr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPCMOVrrm
+    %xmm0 = VPCMOVrrr undef %xmm1, undef %xmm2, %3
+    RET 0
+...
+---
+name:      stack_fold_vpermil2pdyrm_vpermil2pdyrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermil2pdyrm_vpermil2pdyrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMIL2PDYrm
+    %ymm0 = VPERMIL2PDYrr undef %ymm1, undef %ymm2, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpermil2pdrm_vpermil2pdrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermil2pdrm_vpermil2pdrr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMIL2PDrm
+    %xmm0 = VPERMIL2PDrr undef %xmm1, undef %xmm2, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpermil2psyrm_vpermil2psyrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr256 }
+liveins:
+  - { reg: '%ymm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ymm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermil2psyrm_vpermil2psyrr_test
+    %3 = COPY %ymm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMIL2PSYrm
+    %ymm0 = VPERMIL2PSYrr undef %ymm1, undef %ymm2, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vpermil2psrm_vpermil2psrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vpermil2psrm_vpermil2psrr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPERMIL2PSrm
+    %xmm0 = VPERMIL2PSrr undef %xmm1, undef %xmm2, %3, 0
+    RET 0
+...
+---
+name:      stack_fold_vppermrrm_vppermrrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 3, class: vr128 }
+liveins:
+  - { reg: '%xmm3', virtual-reg: '%3' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm3
+
+    ; CHECK-LABEL: name:      stack_fold_vppermrrm_vppermrrr_test
+    %3 = COPY %xmm3
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VPPERMrrm
+    %xmm0 = VPPERMrrr undef %xmm1, undef %xmm2, %3
+    RET 0
+...

test/CodeGen/X86/memoryFolding-x86.mir

+# RUN: llc -run-pass greedy -stack-alignment=64 -o - %s | FileCheck %s
+# Stack alignment set to 64 to enable folding of aligned mov instructions.
+--- |
+  attributes #0 = { "target-features" = "+avx512f,+avx512bw,+avx512dq,+avx512vbmi" }
+  attributes #1 = { optsize "target-features" = "+avx512f,+avx512bw,+avx512dq,+avx512vbmi" }
+  define void @stack_fold_adc16mi_adc16ri_test() #0 { ret void }
+  define void @stack_fold_adc16mi8_adc16ri8_test() #0 { ret void }
+  define void @stack_fold_adc16mr_adc16rr_test() #0 { ret void }
+  define void @stack_fold_adc32mi_adc32ri_test() #0 { ret void }
+  define void @stack_fold_adc32mi8_adc32ri8_test() #0 { ret void }
+  define void @stack_fold_adc32mr_adc32rr_test() #0 { ret void }
+  define void @stack_fold_adc64mi32_adc64ri32_test() #0 { ret void }
+  define void @stack_fold_adc64mi8_adc64ri8_test() #0 { ret void }
+  define void @stack_fold_adc64mr_adc64rr_test() #0 { ret void }
+  define void @stack_fold_adc8mi_adc8ri_test() #0 { ret void }
+  define void @stack_fold_adc8mi8_adc8ri8_test() #0 { ret void }
+  define void @stack_fold_adc8mr_adc8rr_test() #0 { ret void }
+  define void @stack_fold_add16mi_add16ri_test() #0 { ret void }
+  define void @stack_fold_add16mi8_add16ri8_test() #0 { ret void }
+  define void @stack_fold_add16mr_add16rr_test() #0 { ret void }
+  define void @stack_fold_add32mi_add32ri_test() #0 { ret void }
+  define void @stack_fold_add32mi8_add32ri8_test() #0 { ret void }
+  define void @stack_fold_add32mr_add32rr_test() #0 { ret void }
+  define void @stack_fold_add64mi32_add64ri32_test() #0 { ret void }
+  define void @stack_fold_add64mi8_add64ri8_test() #0 { ret void }
+  define void @stack_fold_add64mr_add64rr_test() #0 { ret void }
+  define void @stack_fold_add8mi_add8ri_test() #0 { ret void }
+  define void @stack_fold_add8mi8_add8ri8_test() #0 { ret void }
+  define void @stack_fold_add8mr_add8rr_test() #0 { ret void }
+  define void @stack_fold_and16mi_and16ri_test() #0 { ret void }
+  define void @stack_fold_and16mi8_and16ri8_test() #0 { ret void }
+  define void @stack_fold_and16mr_and16rr_test() #0 { ret void }
+  define void @stack_fold_and32mi_and32ri_test() #0 { ret void }
+  define void @stack_fold_and32mi8_and32ri8_test() #0 { ret void }
+  define void @stack_fold_and32mr_and32rr_test() #0 { ret void }
+  define void @stack_fold_and64mi32_and64ri32_test() #0 { ret void }
+  define void @stack_fold_and64mi8_and64ri8_test() #0 { ret void }
+  define void @stack_fold_and64mr_and64rr_test() #0 { ret void }
+  define void @stack_fold_and8mi_and8ri_test() #0 { ret void }
+  define void @stack_fold_and8mi8_and8ri8_test() #0 { ret void }
+  define void @stack_fold_and8mr_and8rr_test() #0 { ret void }
+  define void @stack_fold_dec16m_dec16r_test() #0 { ret void }
+  define void @stack_fold_dec32m_dec32r_test() #0 { ret void }
+  define void @stack_fold_dec64m_dec64r_test() #0 { ret void }
+  define void @stack_fold_dec8m_dec8r_test() #0 { ret void }
+  define void @stack_fold_inc16m_inc16r_test() #0 { ret void }
+  define void @stack_fold_inc32m_inc32r_test() #0 { ret void }
+  define void @stack_fold_inc64m_inc64r_test() #0 { ret void }
+  define void @stack_fold_inc8m_inc8r_test() #0 { ret void }
+  define void @stack_fold_neg16m_neg16r_test() #0 { ret void }
+  define void @stack_fold_neg32m_neg32r_test() #0 { ret void }
+  define void @stack_fold_neg64m_neg64r_test() #0 { ret void }
+  define void @stack_fold_neg8m_neg8r_test() #0 { ret void }
+  define void @stack_fold_not16m_not16r_test() #0 { ret void }
+  define void @stack_fold_not32m_not32r_test() #0 { ret void }
+  define void @stack_fold_not64m_not64r_test() #0 { ret void }
+  define void @stack_fold_not8m_not8r_test() #0 { ret void }
+  define void @stack_fold_or16mi_or16ri_test() #0 { ret void }
+  define void @stack_fold_or16mi8_or16ri8_test() #0 { ret void }
+  define void @stack_fold_or16mr_or16rr_test() #0 { ret void }
+  define void @stack_fold_or32mi_or32ri_test() #0 { ret void }
+  define void @stack_fold_or32mi8_or32ri8_test() #0 { ret void }
+  define void @stack_fold_or32mr_or32rr_test() #0 { ret void }
+  define void @stack_fold_or64mi32_or64ri32_test() #0 { ret void }
+  define void @stack_fold_or64mi8_or64ri8_test() #0 { ret void }
+  define void @stack_fold_or64mr_or64rr_test() #0 { ret void }
+  define void @stack_fold_or8mi_or8ri_test() #0 { ret void }
+  define void @stack_fold_or8mi8_or8ri8_test() #0 { ret void }
+  define void @stack_fold_or8mr_or8rr_test() #0 { ret void }
+  define void @stack_fold_rcl16m1_rcl16r1_test() #0 { ret void }
+  define void @stack_fold_rcl16mcl_rcl16rcl_test() #0 { ret void }
+  define void @stack_fold_rcl16mi_rcl16ri_test() #0 { ret void }
+  define void @stack_fold_rcl32m1_rcl32r1_test() #0 { ret void }
+  define void @stack_fold_rcl32mcl_rcl32rcl_test() #0 { ret void }
+  define void @stack_fold_rcl32mi_rcl32ri_test() #0 { ret void }
+  define void @stack_fold_rcl64m1_rcl64r1_test() #0 { ret void }
+  define void @stack_fold_rcl64mcl_rcl64rcl_test() #0 { ret void }
+  define void @stack_fold_rcl64mi_rcl64ri_test() #0 { ret void }
+  define void @stack_fold_rcl8m1_rcl8r1_test() #0 { ret void }
+  define void @stack_fold_rcl8mcl_rcl8rcl_test() #0 { ret void }
+  define void @stack_fold_rcl8mi_rcl8ri_test() #0 { ret void }
+  define void @stack_fold_rcr16m1_rcr16r1_test() #0 { ret void }
+  define void @stack_fold_rcr16mcl_rcr16rcl_test() #0 { ret void }
+  define void @stack_fold_rcr16mi_rcr16ri_test() #0 { ret void }
+  define void @stack_fold_rcr32m1_rcr32r1_test() #0 { ret void }
+  define void @stack_fold_rcr32mcl_rcr32rcl_test() #0 { ret void }
+  define void @stack_fold_rcr32mi_rcr32ri_test() #0 { ret void }
+  define void @stack_fold_rcr64m1_rcr64r1_test() #0 { ret void }
+  define void @stack_fold_rcr64mcl_rcr64rcl_test() #0 { ret void }
+  define void @stack_fold_rcr64mi_rcr64ri_test() #0 { ret void }
+  define void @stack_fold_rcr8m1_rcr8r1_test() #0 { ret void }
+  define void @stack_fold_rcr8mcl_rcr8rcl_test() #0 { ret void }
+  define void @stack_fold_rcr8mi_rcr8ri_test() #0 { ret void }
+  define void @stack_fold_rol16m1_rol16r1_test() #0 { ret void }
+  define void @stack_fold_rol16mcl_rol16rcl_test() #0 { ret void }
+  define void @stack_fold_rol16mi_rol16ri_test() #0 { ret void }
+  define void @stack_fold_rol32m1_rol32r1_test() #0 { ret void }
+  define void @stack_fold_rol32mcl_rol32rcl_test() #0 { ret void }
+  define void @stack_fold_rol32mi_rol32ri_test() #0 { ret void }
+  define void @stack_fold_rol64m1_rol64r1_test() #0 { ret void }
+  define void @stack_fold_rol64mcl_rol64rcl_test() #0 { ret void }
+  define void @stack_fold_rol64mi_rol64ri_test() #0 { ret void }
+  define void @stack_fold_rol8m1_rol8r1_test() #0 { ret void }
+  define void @stack_fold_rol8mcl_rol8rcl_test() #0 { ret void }
+  define void @stack_fold_rol8mi_rol8ri_test() #0 { ret void }
+  define void @stack_fold_ror16m1_ror16r1_test() #0 { ret void }
+  define void @stack_fold_ror16mcl_ror16rcl_test() #0 { ret void }
+  define void @stack_fold_ror16mi_ror16ri_test() #0 { ret void }
+  define void @stack_fold_ror32m1_ror32r1_test() #0 { ret void }
+  define void @stack_fold_ror32mcl_ror32rcl_test() #0 { ret void }
+  define void @stack_fold_ror32mi_ror32ri_test() #0 { ret void }
+  define void @stack_fold_ror64m1_ror64r1_test() #0 { ret void }
+  define void @stack_fold_ror64mcl_ror64rcl_test() #0 { ret void }
+  define void @stack_fold_ror64mi_ror64ri_test() #0 { ret void }
+  define void @stack_fold_ror8m1_ror8r1_test() #0 { ret void }
+  define void @stack_fold_ror8mcl_ror8rcl_test() #0 { ret void }
+  define void @stack_fold_ror8mi_ror8ri_test() #0 { ret void }
+  define void @stack_fold_sar16m1_sar16r1_test() #0 { ret void }
+  define void @stack_fold_sar16mcl_sar16rcl_test() #0 { ret void }
+  define void @stack_fold_sar16mi_sar16ri_test() #0 { ret void }
+  define void @stack_fold_sar32m1_sar32r1_test() #0 { ret void }
+  define void @stack_fold_sar32mcl_sar32rcl_test() #0 { ret void }
+  define void @stack_fold_sar32mi_sar32ri_test() #0 { ret void }
+  define void @stack_fold_sar64m1_sar64r1_test() #0 { ret void }
+  define void @stack_fold_sar64mcl_sar64rcl_test() #0 { ret void }
+  define void @stack_fold_sar64mi_sar64ri_test() #0 { ret void }
+  define void @stack_fold_sar8m1_sar8r1_test() #0 { ret void }
+  define void @stack_fold_sar8mcl_sar8rcl_test() #0 { ret void }
+  define void @stack_fold_sar8mi_sar8ri_test() #0 { ret void }
+  define void @stack_fold_sbb16mi_sbb16ri_test() #0 { ret void }
+  define void @stack_fold_sbb16mi8_sbb16ri8_test() #0 { ret void }
+  define void @stack_fold_sbb16mr_sbb16rr_test() #0 { ret void }
+  define void @stack_fold_sbb32mi_sbb32ri_test() #0 { ret void }
+  define void @stack_fold_sbb32mi8_sbb32ri8_test() #0 { ret void }
+  define void @stack_fold_sbb32mr_sbb32rr_test() #0 { ret void }
+  define void @stack_fold_sbb64mi32_sbb64ri32_test() #0 { ret void }
+  define void @stack_fold_sbb64mi8_sbb64ri8_test() #0 { ret void }
+  define void @stack_fold_sbb64mr_sbb64rr_test() #0 { ret void }
+  define void @stack_fold_sbb8mi_sbb8ri_test() #0 { ret void }
+  define void @stack_fold_sbb8mi8_sbb8ri8_test() #0 { ret void }
+  define void @stack_fold_sbb8mr_sbb8rr_test() #0 { ret void }
+  define void @stack_fold_shl16m1_shl16r1_test() #0 { ret void }
+  define void @stack_fold_shl16mcl_shl16rcl_test() #0 { ret void }
+  define void @stack_fold_shl16mi_shl16ri_test() #0 { ret void }
+  define void @stack_fold_shl32m1_shl32r1_test() #0 { ret void }
+  define void @stack_fold_shl32mcl_shl32rcl_test() #0 { ret void }
+  define void @stack_fold_shl32mi_shl32ri_test() #0 { ret void }
+  define void @stack_fold_shl64m1_shl64r1_test() #0 { ret void }
+  define void @stack_fold_shl64mcl_shl64rcl_test() #0 { ret void }
+  define void @stack_fold_shl64mi_shl64ri_test() #0 { ret void }
+  define void @stack_fold_shl8m1_shl8r1_test() #0 { ret void }
+  define void @stack_fold_shl8mcl_shl8rcl_test() #0 { ret void }
+  define void @stack_fold_shl8mi_shl8ri_test() #0 { ret void }
+  define void @stack_fold_shld16mrcl_shld16rrcl_test() #0 { ret void }
+  define void @stack_fold_shld16mri8_shld16rri8_test() #0 { ret void }
+  define void @stack_fold_shld32mrcl_shld32rrcl_test() #0 { ret void }
+  define void @stack_fold_shld32mri8_shld32rri8_test() #0 { ret void }
+  define void @stack_fold_shld64mrcl_shld64rrcl_test() #0 { ret void }
+  define void @stack_fold_shld64mri8_shld64rri8_test() #0 { ret void }
+  define void @stack_fold_shr16m1_shr16r1_test() #0 { ret void }
+  define void @stack_fold_shr16mcl_shr16rcl_test() #0 { ret void }
+  define void @stack_fold_shr16mi_shr16ri_test() #0 { ret void }
+  define void @stack_fold_shr32m1_shr32r1_test() #0 { ret void }
+  define void @stack_fold_shr32mcl_shr32rcl_test() #0 { ret void }
+  define void @stack_fold_shr32mi_shr32ri_test() #0 { ret void }
+  define void @stack_fold_shr64m1_shr64r1_test() #0 { ret void }
+  define void @stack_fold_shr64mcl_shr64rcl_test() #0 { ret void }
+  define void @stack_fold_shr64mi_shr64ri_test() #0 { ret void }
+  define void @stack_fold_shr8m1_shr8r1_test() #0 { ret void }
+  define void @stack_fold_shr8mcl_shr8rcl_test() #0 { ret void }
+  define void @stack_fold_shr8mi_shr8ri_test() #0 { ret void }
+  define void @stack_fold_shrd16mrcl_shrd16rrcl_test() #0 { ret void }
+  define void @stack_fold_shrd16mri8_shrd16rri8_test() #0 { ret void }
+  define void @stack_fold_shrd32mrcl_shrd32rrcl_test() #0 { ret void }
+  define void @stack_fold_shrd32mri8_shrd32rri8_test() #0 { ret void }
+  define void @stack_fold_shrd64mrcl_shrd64rrcl_test() #0 { ret void }
+  define void @stack_fold_shrd64mri8_shrd64rri8_test() #0 { ret void }
+  define void @stack_fold_sub16mi_sub16ri_test() #0 { ret void }
+  define void @stack_fold_sub16mi8_sub16ri8_test() #0 { ret void }
+  define void @stack_fold_sub16mr_sub16rr_test() #0 { ret void }
+  define void @stack_fold_sub32mi_sub32ri_test() #0 { ret void }
+  define void @stack_fold_sub32mi8_sub32ri8_test() #0 { ret void }
+  define void @stack_fold_sub32mr_sub32rr_test() #0 { ret void }
+  define void @stack_fold_sub64mi32_sub64ri32_test() #0 { ret void }
+  define void @stack_fold_sub64mi8_sub64ri8_test() #0 { ret void }
+  define void @stack_fold_sub64mr_sub64rr_test() #0 { ret void }
+  define void @stack_fold_sub8mi_sub8ri_test() #0 { ret void }
+  define void @stack_fold_sub8mi8_sub8ri8_test() #0 { ret void }
+  define void @stack_fold_sub8mr_sub8rr_test() #0 { ret void }
+  define void @stack_fold_xor16mi_xor16ri_test() #0 { ret void }
+  define void @stack_fold_xor16mi8_xor16ri8_test() #0 { ret void }
+  define void @stack_fold_xor16mr_xor16rr_test() #0 { ret void }
+  define void @stack_fold_xor32mi_xor32ri_test() #0 { ret void }
+  define void @stack_fold_xor32mi8_xor32ri8_test() #0 { ret void }
+  define void @stack_fold_xor32mr_xor32rr_test() #0 { ret void }
+  define void @stack_fold_xor64mi32_xor64ri32_test() #0 { ret void }
+  define void @stack_fold_xor64mi8_xor64ri8_test() #0 { ret void }
+  define void @stack_fold_xor64mr_xor64rr_test() #0 { ret void }
+  define void @stack_fold_xor8mi_xor8ri_test() #0 { ret void }
+  define void @stack_fold_xor8mi8_xor8ri8_test() #0 { ret void }
+  define void @stack_fold_xor8mr_xor8rr_test() #0 { ret void }
+  define void @stack_fold_add16mi_add16ri_db_test() #0 { ret void }
+  define void @stack_fold_add16mi8_add16ri8_db_test() #0 { ret void }
+  define void @stack_fold_add16mr_add16rr_db_test() #0 { ret void }
+  define void @stack_fold_add32mi_add32ri_db_test() #0 { ret void }
+  define void @stack_fold_add32mi8_add32ri8_db_test() #0 { ret void }
+  define void @stack_fold_add32mr_add32rr_db_test() #0 { ret void }
+  define void @stack_fold_add64mi32_add64ri32_db_test() #0 { ret void }
+  define void @stack_fold_add64mi8_add64ri8_db_test() #0 { ret void }
+  define void @stack_fold_add64mr_add64rr_db_test() #0 { ret void }
+  define void @stack_fold_arpl16mr_arpl16rr_test() #0 { ret void }
+  define void @stack_fold_call16m_call16r_test() #0 { ret void }
+  define void @stack_fold_call32m_call32r_test() #0 { ret void }
+  define void @stack_fold_call64m_call64r_test() #0 { ret void }
+  define void @stack_fold_cmp16mi_cmp16ri_test() #0 { ret void }
+  define void @stack_fold_cmp16mi8_cmp16ri8_test() #0 { ret void }
+  define void @stack_fold_cmp16mr_cmp16rr_test() #0 { ret void }
+  define void @stack_fold_cmp32mi_cmp32ri_test() #0 { ret void }
+  define void @stack_fold_cmp32mi8_cmp32ri8_test() #0 { ret void }
+  define void @stack_fold_cmp32mr_cmp32rr_test() #0 { ret void }
+  define void @stack_fold_cmp64mi32_cmp64ri32_test() #0 { ret void }
+  define void @stack_fold_cmp64mi8_cmp64ri8_test() #0 { ret void }
+  define void @stack_fold_cmp64mr_cmp64rr_test() #0 { ret void }
+  define void @stack_fold_cmp8mi_cmp8ri_test() #0 { ret void }
+  define void @stack_fold_cmp8mi8_cmp8ri8_test() #0 { ret void }
+  define void @stack_fold_cmp8mr_cmp8rr_test() #0 { ret void }
+  define void @stack_fold_cmpxchg16rm_cmpxchg16rr_test() #0 { ret void }
+  define void @stack_fold_cmpxchg32rm_cmpxchg32rr_test() #0 { ret void }
+  define void @stack_fold_cmpxchg64rm_cmpxchg64rr_test() #0 { ret void }
+  define void @stack_fold_cmpxchg8rm_cmpxchg8rr_test() #0 { ret void }
+  define void @stack_fold_div16m_div16r_test() #0 { ret void }
+  define void @stack_fold_div32m_div32r_test() #0 { ret void }
+  define void @stack_fold_div64m_div64r_test() #0 { ret void }
+  define void @stack_fold_div8m_div8r_test() #0 { ret void }
+  define void @stack_fold_idiv16m_idiv16r_test() #0 { ret void }
+  define void @stack_fold_idiv32m_idiv32r_test() #0 { ret void }
+  define void @stack_fold_idiv64m_idiv64r_test() #0 { ret void }
+  define void @stack_fold_idiv8m_idiv8r_test() #0 { ret void }
+  define void @stack_fold_imul16m_imul16r_test() #0 { ret void }
+  define void @stack_fold_imul32m_imul32r_test() #0 { ret void }
+  define void @stack_fold_imul64m_imul64r_test() #0 { ret void }
+  define void @stack_fold_imul8m_imul8r_test() #0 { ret void }
+  define void @stack_fold_jmp16m_jmp16r_test() #0 { ret void }
+  define void @stack_fold_jmp32m_jmp32r_test() #0 { ret void }
+  define void @stack_fold_jmp64m_jmp64r_test() #0 { ret void }
+  define void @stack_fold_lldt16m_lldt16r_test() #0 { ret void }
+  define void @stack_fold_lmsw16m_lmsw16r_test() #0 { ret void }
+  define void @stack_fold_ltrm_ltrr_test() #0 { ret void }
+  define void @stack_fold_mov16mr_mov16rr_test() #0 { ret void }
+  define void @stack_fold_mov16ms_mov16rs_test() #0 { ret void }
+  define void @stack_fold_mov32mr_mov32rr_test() #0 { ret void }
+  define void @stack_fold_mov32ms_mov32rs_test() #0 { ret void }
+  define void @stack_fold_mov64mr_mov64rr_test() #0 { ret void }
+  define void @stack_fold_mov64ms_mov64rs_test() #0 { ret void }
+  define void @stack_fold_mov8mr_mov8rr_test() #0 { ret void }
+  define void @stack_fold_mov8mr_norex_mov8rr_norex_test() #0 { ret void }
+  define void @stack_fold_mul16m_mul16r_test() #0 { ret void }
+  define void @stack_fold_mul32m_mul32r_test() #0 { ret void }
+  define void @stack_fold_mul64m_mul64r_test() #0 { ret void }
+  define void @stack_fold_mul8m_mul8r_test() #0 { ret void }
+  define void @stack_fold_pop16rmm_pop16rmr_test() #0 { ret void }
+  define void @stack_fold_pop32rmm_pop32rmr_test() #0 { ret void }
+  define void @stack_fold_pop64rmm_pop64rmr_test() #0 { ret void }
+  define void @stack_fold_push16rmm_push16rmr_test() #0 { ret void }
+  define void @stack_fold_push32rmm_push32rmr_test() #0 { ret void }
+  define void @stack_fold_push64rmm_push64rmr_test() #0 { ret void }
+  define void @stack_fold_setaem_setaer_test() #0 { ret void }
+  define void @stack_fold_setam_setar_test() #0 { ret void }
+  define void @stack_fold_setbem_setber_test() #0 { ret void }
+  define void @stack_fold_setbm_setbr_test() #0 { ret void }
+  define void @stack_fold_setem_seter_test() #0 { ret void }
+  define void @stack_fold_setgem_setger_test() #0 { ret void }
+  define void @stack_fold_setgm_setgr_test() #0 { ret void }
+  define void @stack_fold_setlem_setler_test() #0 { ret void }
+  define void @stack_fold_setlm_setlr_test() #0 { ret void }
+  define void @stack_fold_setnem_setner_test() #0 { ret void }
+  define void @stack_fold_setnom_setnor_test() #0 { ret void }
+  define void @stack_fold_setnpm_setnpr_test() #0 { ret void }
+  define void @stack_fold_setnsm_setnsr_test() #0 { ret void }
+  define void @stack_fold_setom_setor_test() #0 { ret void }
+  define void @stack_fold_setpm_setpr_test() #0 { ret void }
+  define void @stack_fold_setsm_setsr_test() #0 { ret void }
+  define void @stack_fold_sldt64m_sldt64r_test() #0 { ret void }
+  define void @stack_fold_tailjmpm_tailjmpr_test() #0 { ret void }
+  define void @stack_fold_tailjmpm64_tailjmpr64_test() #0 { ret void }
+  define void @stack_fold_tailjmpm64_rex_tailjmpr64_rex_test() #0 { ret void }
+  define void @stack_fold_test16mi_test16ri_test() #0 { ret void }
+  define void @stack_fold_test32mi_test32ri_test() #0 { ret void }
+  define void @stack_fold_test64mi32_test64ri32_test() #0 { ret void }
+  define void @stack_fold_test8mi_test8ri_test() #0 { ret void }
+  define void @stack_fold_verrm_verrr_test() #0 { ret void }
+  define void @stack_fold_verwm_verwr_test() #0 { ret void }
+  define void @stack_fold_vmread32mr_vmread32rr_test() #0 { ret void }
+  define void @stack_fold_vmread64mr_vmread64rr_test() #0 { ret void }
+  define void @stack_fold_xadd16rm_xadd16rr_test() #0 { ret void }
+  define void @stack_fold_xadd32rm_xadd32rr_test() #0 { ret void }
+  define void @stack_fold_xadd64rm_xadd64rr_test() #0 { ret void }
+  define void @stack_fold_xadd8rm_xadd8rr_test() #0 { ret void }
+  define void @stack_fold_push16rmm_push16r_test() #0 { ret void }
+  define void @stack_fold_push32rmm_push32r_test() #0 { ret void }
+  define void @stack_fold_push64rmm_push64r_test() #0 { ret void }
+  define void @stack_fold_bsf16rm_bsf16rr_test() #0 { ret void }
+  define void @stack_fold_bsf32rm_bsf32rr_test() #0 { ret void }
+  define void @stack_fold_bsf64rm_bsf64rr_test() #0 { ret void }
+  define void @stack_fold_bsr16rm_bsr16rr_test() #0 { ret void }
+  define void @stack_fold_bsr32rm_bsr32rr_test() #0 { ret void }
+  define void @stack_fold_bsr64rm_bsr64rr_test() #0 { ret void }
+  define void @stack_fold_cmp16rm_cmp16rr_test() #0 { ret void }
+  define void @stack_fold_cmp32rm_cmp32rr_test() #0 { ret void }
+  define void @stack_fold_cmp64rm_cmp64rr_test() #0 { ret void }
+  define void @stack_fold_cmp8rm_cmp8rr_test() #0 { ret void }
+  define void @stack_fold_imul16rmi_imul16rri_test() #0 { ret void }
+  define void @stack_fold_imul16rmi8_imul16rri8_test() #0 { ret void }
+  define void @stack_fold_imul32rmi_imul32rri_test() #0 { ret void }
+  define void @stack_fold_imul32rmi8_imul32rri8_test() #0 { ret void }
+  define void @stack_fold_imul64rmi32_imul64rri32_test() #0 { ret void }
+  define void @stack_fold_imul64rmi8_imul64rri8_test() #0 { ret void }
+  define void @stack_fold_lar16rm_lar16rr_test() #0 { ret void }
+  define void @stack_fold_lar32rm_lar32rr_test() #0 { ret void }
+  define void @stack_fold_lar64rm_lar64rr_test() #0 { ret void }
+  define void @stack_fold_lsl16rm_lsl16rr_test() #0 { ret void }
+  define void @stack_fold_lsl32rm_lsl32rr_test() #0 { ret void }
+  define void @stack_fold_lsl64rm_lsl64rr_test() #0 { ret void }
+  define void @stack_fold_mov16rm_mov16rr_test() #0 { ret void }
+  define void @stack_fold_mov16sm_mov16sr_test() #0 { ret void }
+  define void @stack_fold_mov32rm_mov32rr_test() #0 { ret void }
+  define void @stack_fold_mov32sm_mov32sr_test() #0 { ret void }
+  define void @stack_fold_mov64rm_mov64rr_test() #0 { ret void }
+  define void @stack_fold_mov64sm_mov64sr_test() #0 { ret void }
+  define void @stack_fold_mov8rm_mov8rr_test() #0 { ret void }
+  define void @stack_fold_movsx16rm8_movsx16rr8_test() #0 { ret void }
+  define void @stack_fold_movsx32_norexrm8_movsx32_norexrr8_test() #0 { ret void }
+  define void @stack_fold_movsx32rm16_movsx32rr16_test() #0 { ret void }
+  define void @stack_fold_movsx32rm8_movsx32rr8_test() #0 { ret void }
+  define void @stack_fold_movsx64rm16_movsx64rr16_test() #0 { ret void }
+  define void @stack_fold_movsx64rm32_movsx64rr32_test() #0 { ret void }
+  define void @stack_fold_movsx64rm8_movsx64rr8_test() #0 { ret void }
+  define void @stack_fold_movzx16rm8_movzx16rr8_test() #0 { ret void }
+  define void @stack_fold_movzx32_norexrm8_movzx32_norexrr8_test() #0 { ret void }
+  define void @stack_fold_movzx32rm16_movzx32rr16_test() #0 { ret void }
+  define void @stack_fold_movzx32rm8_movzx32rr8_test() #0 { ret void }
+  define void @stack_fold_movzx64rm16_movzx64rr16_test() #0 { ret void }
+  define void @stack_fold_movzx64rm8_movzx64rr8_test() #0 { ret void }
+  define void @stack_fold_vmwrite32rm_vmwrite32rr_test() #0 { ret void }
+  define void @stack_fold_vmwrite64rm_vmwrite64rr_test() #0 { ret void }
+  define void @stack_fold_adc16rm_adc16rr_test() #0 { ret void }
+  define void @stack_fold_adc32rm_adc32rr_test() #0 { ret void }
+  define void @stack_fold_adc64rm_adc64rr_test() #0 { ret void }
+  define void @stack_fold_adc8rm_adc8rr_test() #0 { ret void }
+  define void @stack_fold_add16rm_add16rr_test() #0 { ret void }
+  define void @stack_fold_add32rm_add32rr_test() #0 { ret void }
+  define void @stack_fold_add64rm_add64rr_test() #0 { ret void }
+  define void @stack_fold_add8rm_add8rr_test() #0 { ret void }
+  define void @stack_fold_and16rm_and16rr_test() #0 { ret void }
+  define void @stack_fold_and32rm_and32rr_test() #0 { ret void }
+  define void @stack_fold_and64rm_and64rr_test() #0 { ret void }
+  define void @stack_fold_and8rm_and8rr_test() #0 { ret void }
+  define void @stack_fold_imul16rm_imul16rr_test() #0 { ret void }
+  define void @stack_fold_imul32rm_imul32rr_test() #0 { ret void }
+  define void @stack_fold_imul64rm_imul64rr_test() #0 { ret void }
+  define void @stack_fold_or16rm_or16rr_test() #0 { ret void }
+  define void @stack_fold_or32rm_or32rr_test() #0 { ret void }
+  define void @stack_fold_or64rm_or64rr_test() #0 { ret void }
+  define void @stack_fold_or8rm_or8rr_test() #0 { ret void }
+  define void @stack_fold_rcpssm_int_rcpssr_int_test() #1 { ret void }
+  define void @stack_fold_rsqrtssm_int_rsqrtssr_int_test() #1 { ret void }
+  define void @stack_fold_sbb16rm_sbb16rr_test() #0 { ret void }
+  define void @stack_fold_sbb32rm_sbb32rr_test() #0 { ret void }
+  define void @stack_fold_sbb64rm_sbb64rr_test() #0 { ret void }
+  define void @stack_fold_sbb8rm_sbb8rr_test() #0 { ret void }
+  define void @stack_fold_sqrtsdm_int_sqrtsdr_int_test() #1 { ret void }
+  define void @stack_fold_sqrtssm_int_sqrtssr_int_test() #1 { ret void }
+  define void @stack_fold_sub16rm_sub16rr_test() #0 { ret void }
+  define void @stack_fold_sub32rm_sub32rr_test() #0 { ret void }
+  define void @stack_fold_sub64rm_sub64rr_test() #0 { ret void }
+  define void @stack_fold_sub8rm_sub8rr_test() #0 { ret void }
+  define void @stack_fold_vrcpssm_vrcpssr_test() #0 { ret void }
+  define void @stack_fold_vrcpssm_int_vrcpssr_int_test() #0 { ret void }
+  define void @stack_fold_vrsqrtssm_vrsqrtssr_test() #0 { ret void }
+  define void @stack_fold_vrsqrtssm_int_vrsqrtssr_int_test() #0 { ret void }
+  define void @stack_fold_xor16rm_xor16rr_test() #0 { ret void }
+  define void @stack_fold_xor32rm_xor32rr_test() #0 { ret void }
+  define void @stack_fold_xor64rm_xor64rr_test() #0 { ret void }
+  define void @stack_fold_xor8rm_xor8rr_test() #0 { ret void }
+  define void @stack_fold_add16rm_add16rr_db_test() #0 { ret void }
+  define void @stack_fold_add32rm_add32rr_db_test() #0 { ret void }
+  define void @stack_fold_add64rm_add64rr_db_test() #0 { ret void }
+...
+---
+name:      stack_fold_adc16mi_adc16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc16mi_adc16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC16mi
+    %0 = ADC16ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_adc16mi8_adc16ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc16mi8_adc16ri8_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC16mi8
+    %0 = ADC16ri8 %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_adc16mr_adc16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc16mr_adc16rr_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC16mr
+    %0 = ADC16rr %0, %cx, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_adc32mi_adc32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc32mi_adc32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC32mi
+    %0 = ADC32ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_adc32mi8_adc32ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc32mi8_adc32ri8_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC32mi8
+    %0 = ADC32ri8 %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_adc32mr_adc32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc32mr_adc32rr_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC32mr
+    %0 = ADC32rr %0, %ecx, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_adc64mi32_adc64ri32_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc64mi32_adc64ri32_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC64mi32
+    %0 = ADC64ri32 %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_adc64mi8_adc64ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc64mi8_adc64ri8_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC64mi8
+    %0 = ADC64ri8 %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_adc64mr_adc64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc64mr_adc64rr_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC64mr
+    %0 = ADC64rr %0, %rcx, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_adc8mi_adc8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc8mi_adc8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC8mi
+    %0 = ADC8ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_adc8mi8_adc8ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc8mi8_adc8ri8_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC8mi8
+    %0 = ADC8ri8 %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_adc8mr_adc8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc8mr_adc8rr_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC8mr
+    %0 = ADC8rr %0, %cl, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add16mi_add16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add16mi_add16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD16mi
+    %0 = ADD16ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add16mi8_add16ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add16mi8_add16ri8_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD16mi8
+    %0 = ADD16ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add16mr_add16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_add16mr_add16rr_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD16mr
+    %0 = ADD16rr %0, %cx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add32mi_add32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add32mi_add32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD32mi
+    %0 = ADD32ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add32mi8_add32ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add32mi8_add32ri8_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD32mi8
+    %0 = ADD32ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add32mr_add32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_add32mr_add32rr_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD32mr
+    %0 = ADD32rr %0, %ecx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add64mi32_add64ri32_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add64mi32_add64ri32_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD64mi32
+    %0 = ADD64ri32 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add64mi8_add64ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add64mi8_add64ri8_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD64mi8
+    %0 = ADD64ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add64mr_add64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_add64mr_add64rr_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD64mr
+    %0 = ADD64rr %0, %rcx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add8mi_add8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add8mi_add8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD8mi
+    %0 = ADD8ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add8mi8_add8ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add8mi8_add8ri8_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD8mi8
+    %0 = ADD8ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add8mr_add8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl
+
+    ; CHECK-LABEL: name:      stack_fold_add8mr_add8rr_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD8mr
+    %0 = ADD8rr %0, %cl, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_and16mi_and16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_and16mi_and16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND16mi
+    %0 = AND16ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_and16mi8_and16ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_and16mi8_and16ri8_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND16mi8
+    %0 = AND16ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_and16mr_and16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_and16mr_and16rr_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND16mr
+    %0 = AND16rr %0, %cx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_and32mi_and32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_and32mi_and32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND32mi
+    %0 = AND32ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_and32mi8_and32ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_and32mi8_and32ri8_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND32mi8
+    %0 = AND32ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_and32mr_and32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_and32mr_and32rr_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND32mr
+    %0 = AND32rr %0, %ecx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_and64mi32_and64ri32_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_and64mi32_and64ri32_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND64mi32
+    %0 = AND64ri32 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_and64mi8_and64ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_and64mi8_and64ri8_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND64mi8
+    %0 = AND64ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_and64mr_and64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_and64mr_and64rr_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND64mr
+    %0 = AND64rr %0, %rcx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_and8mi_and8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_and8mi_and8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND8mi
+    %0 = AND8ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_and8mi8_and8ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_and8mi8_and8ri8_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND8mi8
+    %0 = AND8ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_and8mr_and8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl
+
+    ; CHECK-LABEL: name:      stack_fold_and8mr_and8rr_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND8mr
+    %0 = AND8rr %0, %cl, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_dec16m_dec16r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_dec16m_dec16r_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: DEC16m
+    %0 = DEC16r %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_dec32m_dec32r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_dec32m_dec32r_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: DEC32m
+    %0 = DEC32r %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_dec64m_dec64r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_dec64m_dec64r_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: DEC64m
+    %0 = DEC64r %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_dec8m_dec8r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_dec8m_dec8r_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: DEC8m
+    %0 = DEC8r %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_inc16m_inc16r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_inc16m_inc16r_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: INC16m
+    %0 = INC16r %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_inc32m_inc32r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_inc32m_inc32r_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: INC32m
+    %0 = INC32r %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_inc64m_inc64r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_inc64m_inc64r_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: INC64m
+    %0 = INC64r %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_inc8m_inc8r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_inc8m_inc8r_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: INC8m
+    %0 = INC8r %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_neg16m_neg16r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_neg16m_neg16r_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: NEG16m
+    %0 = NEG16r %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_neg32m_neg32r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_neg32m_neg32r_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: NEG32m
+    %0 = NEG32r %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_neg64m_neg64r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_neg64m_neg64r_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: NEG64m
+    %0 = NEG64r %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_neg8m_neg8r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_neg8m_neg8r_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: NEG8m
+    %0 = NEG8r %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_not16m_not16r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_not16m_not16r_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: NOT16m
+    %0 = NOT16r %0
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_not32m_not32r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_not32m_not32r_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: NOT32m
+    %0 = NOT32r %0
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_not64m_not64r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_not64m_not64r_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: NOT64m
+    %0 = NOT64r %0
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_not8m_not8r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_not8m_not8r_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: NOT8m
+    %0 = NOT8r %0
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_or16mi_or16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_or16mi_or16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR16mi
+    %0 = OR16ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_or16mi8_or16ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_or16mi8_or16ri8_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR16mi8
+    %0 = OR16ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_or16mr_or16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_or16mr_or16rr_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR16mr
+    %0 = OR16rr %0, %cx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_or32mi_or32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_or32mi_or32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR32mi
+    %0 = OR32ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_or32mi8_or32ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_or32mi8_or32ri8_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR32mi8
+    %0 = OR32ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_or32mr_or32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_or32mr_or32rr_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR32mr
+    %0 = OR32rr %0, %ecx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_or64mi32_or64ri32_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_or64mi32_or64ri32_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR64mi32
+    %0 = OR64ri32 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_or64mi8_or64ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_or64mi8_or64ri8_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR64mi8
+    %0 = OR64ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_or64mr_or64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_or64mr_or64rr_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR64mr
+    %0 = OR64rr %0, %rcx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_or8mi_or8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_or8mi_or8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR8mi
+    %0 = OR8ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_or8mi8_or8ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_or8mi8_or8ri8_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR8mi8
+    %0 = OR8ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_or8mr_or8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl
+
+    ; CHECK-LABEL: name:      stack_fold_or8mr_or8rr_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR8mr
+    %0 = OR8rr %0, %cl, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcl16m1_rcl16r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcl16m1_rcl16r1_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCL16m1
+    %0 = RCL16r1 %0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcl16mcl_rcl16rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcl16mcl_rcl16rcl_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCL16mCL
+    %0 = RCL16rCL %0, implicit-def %eflags, implicit undef %cl, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcl16mi_rcl16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcl16mi_rcl16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCL16mi
+    %0 = RCL16ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcl32m1_rcl32r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcl32m1_rcl32r1_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCL32m1
+    %0 = RCL32r1 %0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcl32mcl_rcl32rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcl32mcl_rcl32rcl_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCL32mCL
+    %0 = RCL32rCL %0, implicit-def %eflags, implicit undef %cl, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcl32mi_rcl32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcl32mi_rcl32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCL32mi
+    %0 = RCL32ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcl64m1_rcl64r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcl64m1_rcl64r1_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCL64m1
+    %0 = RCL64r1 %0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcl64mcl_rcl64rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcl64mcl_rcl64rcl_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCL64mCL
+    %0 = RCL64rCL %0, implicit-def %eflags, implicit undef %cl, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcl64mi_rcl64ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcl64mi_rcl64ri_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCL64mi
+    %0 = RCL64ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcl8m1_rcl8r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcl8m1_rcl8r1_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCL8m1
+    %0 = RCL8r1 %0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcl8mcl_rcl8rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcl8mcl_rcl8rcl_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCL8mCL
+    %0 = RCL8rCL %0, implicit-def %eflags, implicit undef %cl, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcl8mi_rcl8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcl8mi_rcl8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCL8mi
+    %0 = RCL8ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcr16m1_rcr16r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcr16m1_rcr16r1_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCR16m1
+    %0 = RCR16r1 %0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcr16mcl_rcr16rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcr16mcl_rcr16rcl_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCR16mCL
+    %0 = RCR16rCL %0, implicit-def %eflags, implicit undef %cl, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcr16mi_rcr16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcr16mi_rcr16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCR16mi
+    %0 = RCR16ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcr32m1_rcr32r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcr32m1_rcr32r1_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCR32m1
+    %0 = RCR32r1 %0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcr32mcl_rcr32rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcr32mcl_rcr32rcl_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCR32mCL
+    %0 = RCR32rCL %0, implicit-def %eflags, implicit undef %cl, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcr32mi_rcr32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcr32mi_rcr32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCR32mi
+    %0 = RCR32ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcr64m1_rcr64r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcr64m1_rcr64r1_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCR64m1
+    %0 = RCR64r1 %0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcr64mcl_rcr64rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcr64mcl_rcr64rcl_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCR64mCL
+    %0 = RCR64rCL %0, implicit-def %eflags, implicit undef %cl, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcr64mi_rcr64ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcr64mi_rcr64ri_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCR64mi
+    %0 = RCR64ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcr8m1_rcr8r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcr8m1_rcr8r1_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCR8m1
+    %0 = RCR8r1 %0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcr8mcl_rcr8rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcr8mcl_rcr8rcl_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCR8mCL
+    %0 = RCR8rCL %0, implicit-def %eflags, implicit undef %cl, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rcr8mi_rcr8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_rcr8mi_rcr8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: RCR8mi
+    %0 = RCR8ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rol16m1_rol16r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_rol16m1_rol16r1_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROL16m1
+    %0 = ROL16r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rol16mcl_rol16rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_rol16mcl_rol16rcl_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROL16mCL
+    %0 = ROL16rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rol16mi_rol16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_rol16mi_rol16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROL16mi
+    %0 = ROL16ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rol32m1_rol32r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_rol32m1_rol32r1_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROL32m1
+    %0 = ROL32r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rol32mcl_rol32rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_rol32mcl_rol32rcl_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROL32mCL
+    %0 = ROL32rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rol32mi_rol32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_rol32mi_rol32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROL32mi
+    %0 = ROL32ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rol64m1_rol64r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_rol64m1_rol64r1_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROL64m1
+    %0 = ROL64r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rol64mcl_rol64rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_rol64mcl_rol64rcl_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROL64mCL
+    %0 = ROL64rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rol64mi_rol64ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_rol64mi_rol64ri_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROL64mi
+    %0 = ROL64ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rol8m1_rol8r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_rol8m1_rol8r1_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROL8m1
+    %0 = ROL8r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rol8mcl_rol8rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_rol8mcl_rol8rcl_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROL8mCL
+    %0 = ROL8rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_rol8mi_rol8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_rol8mi_rol8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROL8mi
+    %0 = ROL8ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_ror16m1_ror16r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_ror16m1_ror16r1_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROR16m1
+    %0 = ROR16r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_ror16mcl_ror16rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_ror16mcl_ror16rcl_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROR16mCL
+    %0 = ROR16rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_ror16mi_ror16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_ror16mi_ror16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROR16mi
+    %0 = ROR16ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_ror32m1_ror32r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_ror32m1_ror32r1_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROR32m1
+    %0 = ROR32r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_ror32mcl_ror32rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_ror32mcl_ror32rcl_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROR32mCL
+    %0 = ROR32rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_ror32mi_ror32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_ror32mi_ror32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROR32mi
+    %0 = ROR32ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_ror64m1_ror64r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_ror64m1_ror64r1_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROR64m1
+    %0 = ROR64r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_ror64mcl_ror64rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_ror64mcl_ror64rcl_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROR64mCL
+    %0 = ROR64rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_ror64mi_ror64ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_ror64mi_ror64ri_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROR64mi
+    %0 = ROR64ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_ror8m1_ror8r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_ror8m1_ror8r1_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROR8m1
+    %0 = ROR8r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_ror8mcl_ror8rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_ror8mcl_ror8rcl_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROR8mCL
+    %0 = ROR8rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_ror8mi_ror8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_ror8mi_ror8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ROR8mi
+    %0 = ROR8ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sar16m1_sar16r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sar16m1_sar16r1_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SAR16m1
+    %0 = SAR16r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sar16mcl_sar16rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sar16mcl_sar16rcl_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SAR16mCL
+    %0 = SAR16rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sar16mi_sar16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sar16mi_sar16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SAR16mi
+    %0 = SAR16ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sar32m1_sar32r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sar32m1_sar32r1_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SAR32m1
+    %0 = SAR32r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sar32mcl_sar32rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sar32mcl_sar32rcl_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SAR32mCL
+    %0 = SAR32rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sar32mi_sar32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sar32mi_sar32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SAR32mi
+    %0 = SAR32ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sar64m1_sar64r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sar64m1_sar64r1_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SAR64m1
+    %0 = SAR64r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sar64mcl_sar64rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sar64mcl_sar64rcl_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SAR64mCL
+    %0 = SAR64rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sar64mi_sar64ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sar64mi_sar64ri_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SAR64mi
+    %0 = SAR64ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sar8m1_sar8r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sar8m1_sar8r1_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SAR8m1
+    %0 = SAR8r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sar8mcl_sar8rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sar8mcl_sar8rcl_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SAR8mCL
+    %0 = SAR8rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sar8mi_sar8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sar8mi_sar8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SAR8mi
+    %0 = SAR8ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sbb16mi_sbb16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb16mi_sbb16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB16mi
+    %0 = SBB16ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sbb16mi8_sbb16ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb16mi8_sbb16ri8_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB16mi8
+    %0 = SBB16ri8 %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sbb16mr_sbb16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb16mr_sbb16rr_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB16mr
+    %0 = SBB16rr %0, %cx, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sbb32mi_sbb32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb32mi_sbb32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB32mi
+    %0 = SBB32ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sbb32mi8_sbb32ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb32mi8_sbb32ri8_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB32mi8
+    %0 = SBB32ri8 %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sbb32mr_sbb32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb32mr_sbb32rr_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB32mr
+    %0 = SBB32rr %0, %ecx, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sbb64mi32_sbb64ri32_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb64mi32_sbb64ri32_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB64mi32
+    %0 = SBB64ri32 %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sbb64mi8_sbb64ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb64mi8_sbb64ri8_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB64mi8
+    %0 = SBB64ri8 %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sbb64mr_sbb64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb64mr_sbb64rr_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB64mr
+    %0 = SBB64rr %0, %rcx, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sbb8mi_sbb8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb8mi_sbb8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB8mi
+    %0 = SBB8ri %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sbb8mi8_sbb8ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb8mi8_sbb8ri8_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB8mi8
+    %0 = SBB8ri8 %0, 0, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sbb8mr_sbb8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb8mr_sbb8rr_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB8mr
+    %0 = SBB8rr %0, %cl, implicit-def %eflags, implicit %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shl16m1_shl16r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shl16m1_shl16r1_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHL16m1
+    %0 = SHL16r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shl16mcl_shl16rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shl16mcl_shl16rcl_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHL16mCL
+    %0 = SHL16rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shl16mi_shl16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shl16mi_shl16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHL16mi
+    %0 = SHL16ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shl32m1_shl32r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shl32m1_shl32r1_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHL32m1
+    %0 = SHL32r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shl32mcl_shl32rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shl32mcl_shl32rcl_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHL32mCL
+    %0 = SHL32rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shl32mi_shl32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shl32mi_shl32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHL32mi
+    %0 = SHL32ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shl64m1_shl64r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shl64m1_shl64r1_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHL64m1
+    %0 = SHL64r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shl64mcl_shl64rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shl64mcl_shl64rcl_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHL64mCL
+    %0 = SHL64rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shl64mi_shl64ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shl64mi_shl64ri_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHL64mi
+    %0 = SHL64ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shl8m1_shl8r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shl8m1_shl8r1_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHL8m1
+    %0 = SHL8r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shl8mcl_shl8rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shl8mcl_shl8rcl_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHL8mCL
+    %0 = SHL8rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shl8mi_shl8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shl8mi_shl8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHL8mi
+    %0 = SHL8ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shld16mrcl_shld16rrcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_shld16mrcl_shld16rrcl_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHLD16mrCL
+    %0 = SHLD16rrCL %0, %cx, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shld16mri8_shld16rri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_shld16mri8_shld16rri8_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHLD16mri8
+    %0 = SHLD16rri8 %0, %cx, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shld32mrcl_shld32rrcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_shld32mrcl_shld32rrcl_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHLD32mrCL
+    %0 = SHLD32rrCL %0, %ecx, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shld32mri8_shld32rri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_shld32mri8_shld32rri8_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHLD32mri8
+    %0 = SHLD32rri8 %0, %ecx, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shld64mrcl_shld64rrcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_shld64mrcl_shld64rrcl_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHLD64mrCL
+    %0 = SHLD64rrCL %0, %rcx, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shld64mri8_shld64rri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_shld64mri8_shld64rri8_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHLD64mri8
+    %0 = SHLD64rri8 %0, %rcx, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shr16m1_shr16r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shr16m1_shr16r1_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHR16m1
+    %0 = SHR16r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shr16mcl_shr16rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shr16mcl_shr16rcl_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHR16mCL
+    %0 = SHR16rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shr16mi_shr16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shr16mi_shr16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHR16mi
+    %0 = SHR16ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shr32m1_shr32r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shr32m1_shr32r1_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHR32m1
+    %0 = SHR32r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shr32mcl_shr32rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shr32mcl_shr32rcl_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHR32mCL
+    %0 = SHR32rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shr32mi_shr32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shr32mi_shr32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHR32mi
+    %0 = SHR32ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shr64m1_shr64r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shr64m1_shr64r1_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHR64m1
+    %0 = SHR64r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shr64mcl_shr64rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shr64mcl_shr64rcl_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHR64mCL
+    %0 = SHR64rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shr64mi_shr64ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shr64mi_shr64ri_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHR64mi
+    %0 = SHR64ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shr8m1_shr8r1_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shr8m1_shr8r1_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHR8m1
+    %0 = SHR8r1 %0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shr8mcl_shr8rcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shr8mcl_shr8rcl_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHR8mCL
+    %0 = SHR8rCL %0, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shr8mi_shr8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_shr8mi_shr8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHR8mi
+    %0 = SHR8ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shrd16mrcl_shrd16rrcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_shrd16mrcl_shrd16rrcl_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHRD16mrCL
+    %0 = SHRD16rrCL %0, %cx, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shrd16mri8_shrd16rri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_shrd16mri8_shrd16rri8_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHRD16mri8
+    %0 = SHRD16rri8 %0, %cx, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shrd32mrcl_shrd32rrcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_shrd32mrcl_shrd32rrcl_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHRD32mrCL
+    %0 = SHRD32rrCL %0, %ecx, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shrd32mri8_shrd32rri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_shrd32mri8_shrd32rri8_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHRD32mri8
+    %0 = SHRD32rri8 %0, %ecx, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shrd64mrcl_shrd64rrcl_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_shrd64mrcl_shrd64rrcl_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHRD64mrCL
+    %0 = SHRD64rrCL %0, %rcx, implicit-def %eflags, implicit undef %cl
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_shrd64mri8_shrd64rri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_shrd64mri8_shrd64rri8_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SHRD64mri8
+    %0 = SHRD64rri8 %0, %rcx, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sub16mi_sub16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sub16mi_sub16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB16mi
+    %0 = SUB16ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sub16mi8_sub16ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sub16mi8_sub16ri8_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB16mi8
+    %0 = SUB16ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sub16mr_sub16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_sub16mr_sub16rr_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB16mr
+    %0 = SUB16rr %0, %cx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sub32mi_sub32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sub32mi_sub32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB32mi
+    %0 = SUB32ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sub32mi8_sub32ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sub32mi8_sub32ri8_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB32mi8
+    %0 = SUB32ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sub32mr_sub32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_sub32mr_sub32rr_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB32mr
+    %0 = SUB32rr %0, %ecx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sub64mi32_sub64ri32_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sub64mi32_sub64ri32_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB64mi32
+    %0 = SUB64ri32 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sub64mi8_sub64ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sub64mi8_sub64ri8_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB64mi8
+    %0 = SUB64ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sub64mr_sub64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_sub64mr_sub64rr_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB64mr
+    %0 = SUB64rr %0, %rcx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sub8mi_sub8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sub8mi_sub8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB8mi
+    %0 = SUB8ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sub8mi8_sub8ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sub8mi8_sub8ri8_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB8mi8
+    %0 = SUB8ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sub8mr_sub8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl
+
+    ; CHECK-LABEL: name:      stack_fold_sub8mr_sub8rr_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB8mr
+    %0 = SUB8rr %0, %cl, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xor16mi_xor16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_xor16mi_xor16ri_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR16mi
+    %0 = XOR16ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xor16mi8_xor16ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_xor16mi8_xor16ri8_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR16mi8
+    %0 = XOR16ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xor16mr_xor16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_xor16mr_xor16rr_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR16mr
+    %0 = XOR16rr %0, %cx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xor32mi_xor32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_xor32mi_xor32ri_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR32mi
+    %0 = XOR32ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xor32mi8_xor32ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_xor32mi8_xor32ri8_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR32mi8
+    %0 = XOR32ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xor32mr_xor32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_xor32mr_xor32rr_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR32mr
+    %0 = XOR32rr %0, %ecx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xor64mi32_xor64ri32_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_xor64mi32_xor64ri32_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR64mi32
+    %0 = XOR64ri32 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xor64mi8_xor64ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_xor64mi8_xor64ri8_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR64mi8
+    %0 = XOR64ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xor64mr_xor64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_xor64mr_xor64rr_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR64mr
+    %0 = XOR64rr %0, %rcx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xor8mi_xor8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_xor8mi_xor8ri_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR8mi
+    %0 = XOR8ri %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xor8mi8_xor8ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_xor8mi8_xor8ri8_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR8mi8
+    %0 = XOR8ri8 %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xor8mr_xor8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl
+
+    ; CHECK-LABEL: name:      stack_fold_xor8mr_xor8rr_test
+    %0 = MOV8rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR8mr
+    %0 = XOR8rr %0, %cl, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add16mi_add16ri_db_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add16mi_add16ri_db_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD16mi
+    %0 = ADD16ri_DB %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add16mi8_add16ri8_db_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add16mi8_add16ri8_db_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD16mi8
+    %0 = ADD16ri8_DB %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add16mr_add16rr_db_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_add16mr_add16rr_db_test
+    %0 = MOV16rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD16mr
+    %0 = ADD16rr_DB %0, %cx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add32mi_add32ri_db_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add32mi_add32ri_db_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD32mi
+    %0 = ADD32ri_DB %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add32mi8_add32ri8_db_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add32mi8_add32ri8_db_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD32mi8
+    %0 = ADD32ri8_DB %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add32mr_add32rr_db_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_add32mr_add32rr_db_test
+    %0 = MOV32rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD32mr
+    %0 = ADD32rr_DB %0, %ecx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add64mi32_add64ri32_db_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add64mi32_add64ri32_db_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD64mi32
+    %0 = ADD64ri32_DB %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add64mi8_add64ri8_db_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_add64mi8_add64ri8_db_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD64mi8
+    %0 = ADD64ri8_DB %0, 0, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rcx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_add64mr_add64rr_db_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_add64mr_add64rr_db_test
+    %0 = MOV64rm %stack.0, 1, _, 0, _
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD64mr
+    %0 = ADD64rr_DB %0, %rcx, implicit-def %eflags
+    INLINEASM $nop, 1, 12, implicit %rax, 12, implicit %rbx, 12, implicit %rdx, 12, implicit %rbp, 12, implicit %rsp, 12, implicit %rsi, 12, implicit %rdi, 12, implicit %r8, 12, implicit %r9, 12, implicit %r10, 12, implicit %r11, 12, implicit %r12, 12, implicit %r13, 12, implicit %r14, 12, implicit %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_arpl16mr_arpl16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_arpl16mr_arpl16rr_test
+    ; CHECK: ARPL16mr
+    %0 = ARPL16rr undef %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_call16m_call16r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_call16m_call16r_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CALL16m
+    CALL16r %0, implicit undef %esp
+    RET 0
+...
+---
+name:      stack_fold_call32m_call32r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_call32m_call32r_test
+    %0 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CALL32m
+    CALL32r %0, implicit undef %esp
+    RET 0
+...
+---
+name:      stack_fold_call64m_call64r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_call64m_call64r_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CALL64m
+    CALL64r %0, implicit undef %rsp
+    RET 0
+...
+---
+name:      stack_fold_cmp16mi_cmp16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_cmp16mi_cmp16ri_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP16mi
+    CMP16ri %0, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp16mi8_cmp16ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_cmp16mi8_cmp16ri8_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP16mi8
+    CMP16ri8 %0, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp16mr_cmp16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_cmp16mr_cmp16rr_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP16mr
+    CMP16rr %0, undef %bx, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp32mi_cmp32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_cmp32mi_cmp32ri_test
+    %0 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP32mi
+    CMP32ri %0, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp32mi8_cmp32ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_cmp32mi8_cmp32ri8_test
+    %0 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP32mi8
+    CMP32ri8 %0, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp32mr_cmp32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_cmp32mr_cmp32rr_test
+    %0 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP32mr
+    CMP32rr %0, undef %ebx, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp64mi32_cmp64ri32_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_cmp64mi32_cmp64ri32_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP64mi32
+    CMP64ri32 %0, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp64mi8_cmp64ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_cmp64mi8_cmp64ri8_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP64mi8
+    CMP64ri8 %0, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp64mr_cmp64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_cmp64mr_cmp64rr_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP64mr
+    CMP64rr %0, undef %rbx, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp8mi_cmp8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+  - { reg: '%al', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %al
+
+    ; CHECK-LABEL: name:      stack_fold_cmp8mi_cmp8ri_test
+    %0 = COPY %al
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP8mi
+    CMP8ri %0, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp8mi8_cmp8ri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+  - { reg: '%al', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %al
+
+    ; CHECK-LABEL: name:      stack_fold_cmp8mi8_cmp8ri8_test
+    %0 = COPY %al
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP8mi8
+    CMP8ri8 %0, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp8mr_cmp8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+  - { reg: '%al', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %al
+
+    ; CHECK-LABEL: name:      stack_fold_cmp8mr_cmp8rr_test
+    %0 = COPY %al
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP8mr
+    CMP8rr %0, undef %bl, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmpxchg16rm_cmpxchg16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_cmpxchg16rm_cmpxchg16rr_test
+    ; CHECK: CMPXCHG16rm
+    %0 = CMPXCHG16rr undef %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_cmpxchg32rm_cmpxchg32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_cmpxchg32rm_cmpxchg32rr_test
+    ; CHECK: CMPXCHG32rm
+    %0 = CMPXCHG32rr undef %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_cmpxchg64rm_cmpxchg64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_cmpxchg64rm_cmpxchg64rr_test
+    ; CHECK: CMPXCHG64rm
+    %0 = CMPXCHG64rr undef %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_cmpxchg8rm_cmpxchg8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_cmpxchg8rm_cmpxchg8rr_test
+    ; CHECK: CMPXCHG8rm
+    %0 = CMPXCHG8rr undef %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_div16m_div16r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_div16m_div16r_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: DIV16m
+    DIV16r %0, implicit-def %ax, implicit-def %dx, implicit-def %eflags, implicit undef %ax, implicit undef %dx
+    RET 0
+...
+---
+name:      stack_fold_div32m_div32r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_div32m_div32r_test
+    %0 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: DIV32m
+    DIV32r %0, implicit-def %eax, implicit-def %edx, implicit-def %eflags, implicit undef %eax, implicit undef %edx
+    RET 0
+...
+---
+name:      stack_fold_div64m_div64r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_div64m_div64r_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: DIV64m
+    DIV64r %0, implicit-def %rax, implicit-def %rdx, implicit-def %eflags, implicit undef %rax, implicit undef %rdx
+    RET 0
+...
+---
+name:      stack_fold_div8m_div8r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+  - { reg: '%al', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %al
+
+    ; CHECK-LABEL: name:      stack_fold_div8m_div8r_test
+    %0 = COPY %al
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: DIV8m
+    DIV8r %0, implicit-def %al, implicit-def %ah, implicit-def %eflags, implicit undef %ax
+    RET 0
+...
+---
+name:      stack_fold_idiv16m_idiv16r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_idiv16m_idiv16r_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IDIV16m
+    IDIV16r %0, implicit-def %ax, implicit-def %dx, implicit-def %eflags, implicit undef %ax, implicit undef %dx
+    RET 0
+...
+---
+name:      stack_fold_idiv32m_idiv32r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_idiv32m_idiv32r_test
+    %0 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IDIV32m
+    IDIV32r %0, implicit-def %eax, implicit-def %edx, implicit-def %eflags, implicit undef %eax, implicit undef %edx
+    RET 0
+...
+---
+name:      stack_fold_idiv64m_idiv64r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_idiv64m_idiv64r_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IDIV64m
+    IDIV64r %0, implicit-def %rax, implicit-def %rdx, implicit-def %eflags, implicit undef %rax, implicit undef %rdx
+    RET 0
+...
+---
+name:      stack_fold_idiv8m_idiv8r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+  - { reg: '%al', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %al
+
+    ; CHECK-LABEL: name:      stack_fold_idiv8m_idiv8r_test
+    %0 = COPY %al
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IDIV8m
+    IDIV8r %0, implicit-def %al, implicit-def %ah, implicit-def %eflags, implicit undef %ax
+    RET 0
+...
+---
+name:      stack_fold_imul16m_imul16r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_imul16m_imul16r_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IMUL16m
+    IMUL16r %0, implicit-def %ax, implicit-def %dx, implicit-def %eflags, implicit undef %ax
+    RET 0
+...
+---
+name:      stack_fold_imul32m_imul32r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_imul32m_imul32r_test
+    %0 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IMUL32m
+    IMUL32r %0, implicit-def %eax, implicit-def %edx, implicit-def %eflags, implicit undef %eax
+    RET 0
+...
+---
+name:      stack_fold_imul64m_imul64r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_imul64m_imul64r_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IMUL64m
+    IMUL64r %0, implicit-def %rax, implicit-def %rdx, implicit-def %eflags, implicit undef %rax
+    RET 0
+...
+---
+name:      stack_fold_imul8m_imul8r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+  - { reg: '%al', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %al
+
+    ; CHECK-LABEL: name:      stack_fold_imul8m_imul8r_test
+    %0 = COPY %al
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IMUL8m
+    IMUL8r %0, implicit-def %al, implicit-def %eflags, implicit-def %ax, implicit undef %al
+    RET 0
+...
+---
+name:      stack_fold_jmp16m_jmp16r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_jmp16m_jmp16r_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: JMP16m
+    JMP16r %0
+    RET 0
+...
+---
+name:      stack_fold_jmp32m_jmp32r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_jmp32m_jmp32r_test
+    %0 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: JMP32m
+    JMP32r %0
+    RET 0
+...
+---
+name:      stack_fold_jmp64m_jmp64r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_jmp64m_jmp64r_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: JMP64m
+    JMP64r %0
+    RET 0
+...
+---
+name:      stack_fold_lldt16m_lldt16r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_lldt16m_lldt16r_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: LLDT16m
+    LLDT16r %0
+    RET 0
+...
+---
+name:      stack_fold_lmsw16m_lmsw16r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_lmsw16m_lmsw16r_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: LMSW16m
+    LMSW16r %0
+    RET 0
+...
+---
+name:      stack_fold_ltrm_ltrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_ltrm_ltrr_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: LTRm
+    LTRr %0
+    RET 0
+...
+---
+name:      stack_fold_mov16mr_mov16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_mov16mr_mov16rr_test
+    ; CHECK: MOV16mr
+    %0 = MOV16rr undef %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_mov16ms_mov16rs_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_mov16ms_mov16rs_test
+    ; CHECK: MOV16ms
+    %0 = MOV16rs undef %cs
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_mov32mr_mov32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_mov32mr_mov32rr_test
+    ; CHECK: MOV32mr
+    %0 = MOV32rr undef %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_mov32ms_mov32rs_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_mov32ms_mov32rs_test
+    ; CHECK: MOV32ms
+    %0 = MOV32rs undef %cs
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_mov64mr_mov64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_mov64mr_mov64rr_test
+    ; CHECK: MOV64mr
+    %0 = MOV64rr undef %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_mov64ms_mov64rs_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_mov64ms_mov64rs_test
+    ; CHECK: MOV64ms
+    %0 = MOV64rs undef %cs
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_mov8mr_mov8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_mov8mr_mov8rr_test
+    ; CHECK: MOV8mr
+    %0 = MOV8rr undef %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_mov8mr_norex_mov8rr_norex_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8_norex }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_mov8mr_norex_mov8rr_norex_test
+    ; CHECK: MOV8mr_NOREX
+    %0 = MOV8rr_NOREX undef %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_mul16m_mul16r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_mul16m_mul16r_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MUL16m
+    MUL16r %0, implicit-def %ax, implicit-def %dx, implicit-def %eflags, implicit undef %ax
+    RET 0
+...
+---
+name:      stack_fold_mul32m_mul32r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_mul32m_mul32r_test
+    %0 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MUL32m
+    MUL32r %0, implicit-def %eax, implicit-def %edx, implicit-def %eflags, implicit undef %eax
+    RET 0
+...
+---
+name:      stack_fold_mul64m_mul64r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_mul64m_mul64r_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MUL64m
+    MUL64r %0, implicit-def %rax, implicit-def %rdx, implicit-def %eflags, implicit undef %rax
+    RET 0
+...
+---
+name:      stack_fold_mul8m_mul8r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+  - { reg: '%al', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %al
+
+    ; CHECK-LABEL: name:      stack_fold_mul8m_mul8r_test
+    %0 = COPY %al
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MUL8m
+    MUL8r %0, implicit-def %al, implicit-def %eflags, implicit-def %ax, implicit undef %al
+    RET 0
+...
+---
+name:      stack_fold_pop16rmm_pop16rmr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_pop16rmm_pop16rmr_test
+    ; CHECK: POP16rmm
+    %0 = POP16rmr  implicit-def %esp, implicit undef %esp
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_pop32rmm_pop32rmr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_pop32rmm_pop32rmr_test
+    ; CHECK: POP32rmm
+    %0 = POP32rmr  implicit-def %esp, implicit undef %esp
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_pop64rmm_pop64rmr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_pop64rmm_pop64rmr_test
+    ; CHECK: POP64rmm
+    %0 = POP64rmr  implicit-def %rsp, implicit undef %rsp
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_push16rmm_push16rmr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_push16rmm_push16rmr_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: PUSH16rmm
+    PUSH16rmr %0, implicit-def %esp, implicit undef %esp
+    RET 0
+...
+---
+name:      stack_fold_push32rmm_push32rmr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_push32rmm_push32rmr_test
+    %0 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: PUSH32rmm
+    PUSH32rmr %0, implicit-def %esp, implicit undef %esp
+    RET 0
+...
+---
+name:      stack_fold_push64rmm_push64rmr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_push64rmm_push64rmr_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: PUSH64rmm
+    PUSH64rmr %0, implicit-def %rsp, implicit undef %rsp
+    RET 0
+...
+---
+name:      stack_fold_setaem_setaer_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setaem_setaer_test
+    ; CHECK: SETAEm
+    %0 = SETAEr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setam_setar_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setam_setar_test
+    ; CHECK: SETAm
+    %0 = SETAr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setbem_setber_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setbem_setber_test
+    ; CHECK: SETBEm
+    %0 = SETBEr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setbm_setbr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setbm_setbr_test
+    ; CHECK: SETBm
+    %0 = SETBr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setem_seter_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setem_seter_test
+    ; CHECK: SETEm
+    %0 = SETEr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setgem_setger_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setgem_setger_test
+    ; CHECK: SETGEm
+    %0 = SETGEr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setgm_setgr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setgm_setgr_test
+    ; CHECK: SETGm
+    %0 = SETGr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setlem_setler_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setlem_setler_test
+    ; CHECK: SETLEm
+    %0 = SETLEr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setlm_setlr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setlm_setlr_test
+    ; CHECK: SETLm
+    %0 = SETLr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setnem_setner_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setnem_setner_test
+    ; CHECK: SETNEm
+    %0 = SETNEr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setnom_setnor_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setnom_setnor_test
+    ; CHECK: SETNOm
+    %0 = SETNOr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setnpm_setnpr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setnpm_setnpr_test
+    ; CHECK: SETNPm
+    %0 = SETNPr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setnsm_setnsr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setnsm_setnsr_test
+    ; CHECK: SETNSm
+    %0 = SETNSr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setom_setor_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setom_setor_test
+    ; CHECK: SETOm
+    %0 = SETOr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setpm_setpr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setpm_setpr_test
+    ; CHECK: SETPm
+    %0 = SETPr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_setsm_setsr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_setsm_setsr_test
+    ; CHECK: SETSm
+    %0 = SETSr  implicit %eflags
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_sldt64m_sldt64r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_sldt64m_sldt64r_test
+    ; CHECK: SLDT64m
+    %0 = SLDT64r 
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_tailjmpm_tailjmpr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64_tc }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_tailjmpm_tailjmpr_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: TAILJMPm
+    TAILJMPr %0, implicit undef %esp
+    RET 0
+...
+---
+name:      stack_fold_tailjmpm64_tailjmpr64_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64_tc }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_tailjmpm64_tailjmpr64_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: TAILJMPm64
+    TAILJMPr64 %0, implicit undef %rsp
+    RET 0
+...
+---
+name:      stack_fold_tailjmpm64_rex_tailjmpr64_rex_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64_tc }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_tailjmpm64_rex_tailjmpr64_rex_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: TAILJMPm64_REX
+    TAILJMPr64_REX %0, implicit undef %rsp
+    RET 0
+...
+---
+name:      stack_fold_test16mi_test16ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_test16mi_test16ri_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: TEST16mi
+    TEST16ri %0, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_test32mi_test32ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_test32mi_test32ri_test
+    %0 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: TEST32mi
+    TEST32ri %0, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_test64mi32_test64ri32_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_test64mi32_test64ri32_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: TEST64mi32
+    TEST64ri32 %0, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_test8mi_test8ri_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+  - { reg: '%al', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %al
+
+    ; CHECK-LABEL: name:      stack_fold_test8mi_test8ri_test
+    %0 = COPY %al
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: TEST8mi
+    TEST8ri %0, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_verrm_verrr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_verrm_verrr_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: VERRm
+    VERRr %0
+    RET 0
+...
+---
+name:      stack_fold_verwm_verwr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_verwm_verwr_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: VERWm
+    VERWr %0
+    RET 0
+...
+---
+name:      stack_fold_vmread32mr_vmread32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vmread32mr_vmread32rr_test
+    ; CHECK: VMREAD32mr
+    %0 = VMREAD32rr undef %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_vmread64mr_vmread64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_vmread64mr_vmread64rr_test
+    ; CHECK: VMREAD64mr
+    %0 = VMREAD64rr undef %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xadd16rm_xadd16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 2, alignment: 2 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_xadd16rm_xadd16rr_test
+    ; CHECK: XADD16rm
+    %0 = XADD16rr undef %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV16mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xadd32rm_xadd32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_xadd32rm_xadd32rr_test
+    ; CHECK: XADD32rm
+    %0 = XADD32rr undef %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV32mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xadd64rm_xadd64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 8, alignment: 8 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_xadd64rm_xadd64rr_test
+    ; CHECK: XADD64rm
+    %0 = XADD64rr undef %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV64mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_xadd8rm_xadd8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr8 }
+liveins:
+stack:
+  - { id: 0, type: spill-slot, offset: 0, size: 1, alignment: 1 }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins:
+
+    ; CHECK-LABEL: name:      stack_fold_xadd8rm_xadd8rr_test
+    ; CHECK: XADD8rm
+    %0 = XADD8rr undef %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    MOV8mr %stack.0, 1, _, 0, _, %0
+    RET 0
+...
+---
+name:      stack_fold_push16rmm_push16r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_push16rmm_push16r_test
+    %0 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: PUSH16rmm
+    PUSH16r %0, implicit-def %esp, implicit undef %esp
+    RET 0
+...
+---
+name:      stack_fold_push32rmm_push32r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_push32rmm_push32r_test
+    %0 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: PUSH32rmm
+    PUSH32r %0, implicit-def %esp, implicit undef %esp
+    RET 0
+...
+---
+name:      stack_fold_push64rmm_push64r_test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%0' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_push64rmm_push64r_test
+    %0 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: PUSH64rmm
+    PUSH64r %0, implicit-def %rsp, implicit undef %rsp
+    RET 0
+...
+---
+name:      stack_fold_bsf16rm_bsf16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_bsf16rm_bsf16rr_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BSF16rm
+    %ax = BSF16rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_bsf32rm_bsf32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_bsf32rm_bsf32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BSF32rm
+    %eax = BSF32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_bsf64rm_bsf64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_bsf64rm_bsf64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BSF64rm
+    %rax = BSF64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_bsr16rm_bsr16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_bsr16rm_bsr16rr_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BSR16rm
+    %ax = BSR16rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_bsr32rm_bsr32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_bsr32rm_bsr32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BSR32rm
+    %eax = BSR32rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_bsr64rm_bsr64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_bsr64rm_bsr64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: BSR64rm
+    %rax = BSR64rr %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp16rm_cmp16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_cmp16rm_cmp16rr_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP16rm
+    CMP16rr undef %ax, %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp32rm_cmp32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_cmp32rm_cmp32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP32rm
+    CMP32rr undef %eax, %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp64rm_cmp64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_cmp64rm_cmp64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP64rm
+    CMP64rr undef %rax, %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_cmp8rm_cmp8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr8 }
+liveins:
+  - { reg: '%bl', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bl
+
+    ; CHECK-LABEL: name:      stack_fold_cmp8rm_cmp8rr_test
+    %1 = COPY %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: CMP8rm
+    CMP8rr undef %al, %1, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_imul16rmi_imul16rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_imul16rmi_imul16rri_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IMUL16rmi
+    %ax = IMUL16rri %1, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_imul16rmi8_imul16rri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_imul16rmi8_imul16rri8_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IMUL16rmi8
+    %ax = IMUL16rri8 %1, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_imul32rmi_imul32rri_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_imul32rmi_imul32rri_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IMUL32rmi
+    %eax = IMUL32rri %1, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_imul32rmi8_imul32rri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_imul32rmi8_imul32rri8_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IMUL32rmi8
+    %eax = IMUL32rri8 %1, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_imul64rmi32_imul64rri32_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_imul64rmi32_imul64rri32_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IMUL64rmi32
+    %rax = IMUL64rri32 %1, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_imul64rmi8_imul64rri8_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_imul64rmi8_imul64rri8_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IMUL64rmi8
+    %rax = IMUL64rri8 %1, 0, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_lar16rm_lar16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_lar16rm_lar16rr_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: LAR16rm
+    %ax = LAR16rr %1
+    RET 0
+...
+---
+name:      stack_fold_lar32rm_lar32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_lar32rm_lar32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: LAR32rm
+    %eax = LAR32rr %1
+    RET 0
+...
+---
+name:      stack_fold_lar64rm_lar64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_lar64rm_lar64rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: LAR64rm
+    %rax = LAR64rr %1
+    RET 0
+...
+---
+name:      stack_fold_lsl16rm_lsl16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_lsl16rm_lsl16rr_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: LSL16rm
+    %ax = LSL16rr %1
+    RET 0
+...
+---
+name:      stack_fold_lsl32rm_lsl32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_lsl32rm_lsl32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: LSL32rm
+    %eax = LSL32rr %1
+    RET 0
+...
+---
+name:      stack_fold_lsl64rm_lsl64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_lsl64rm_lsl64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: LSL64rm
+    %rax = LSL64rr %1
+    RET 0
+...
+---
+name:      stack_fold_mov16rm_mov16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_mov16rm_mov16rr_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOV16rm
+    %ax = MOV16rr %1
+    RET 0
+...
+---
+name:      stack_fold_mov16sm_mov16sr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%ax', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ax
+
+    ; CHECK-LABEL: name:      stack_fold_mov16sm_mov16sr_test
+    %1 = COPY %ax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOV16sm
+    %cs = MOV16sr %1
+    RET 0
+...
+---
+name:      stack_fold_mov32rm_mov32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_mov32rm_mov32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOV32rm
+    %eax = MOV32rr %1
+    RET 0
+...
+---
+name:      stack_fold_mov32sm_mov32sr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%eax', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %eax
+
+    ; CHECK-LABEL: name:      stack_fold_mov32sm_mov32sr_test
+    %1 = COPY %eax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOV32sm
+    %cs = MOV32sr %1
+    RET 0
+...
+---
+name:      stack_fold_mov64rm_mov64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_mov64rm_mov64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOV64rm
+    %rax = MOV64rr %1
+    RET 0
+...
+---
+name:      stack_fold_mov64sm_mov64sr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rax', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rax
+
+    ; CHECK-LABEL: name:      stack_fold_mov64sm_mov64sr_test
+    %1 = COPY %rax
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOV64sm
+    %cs = MOV64sr %1
+    RET 0
+...
+---
+name:      stack_fold_mov8rm_mov8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr8 }
+liveins:
+  - { reg: '%bl', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bl
+
+    ; CHECK-LABEL: name:      stack_fold_mov8rm_mov8rr_test
+    %1 = COPY %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOV8rm
+    %al = MOV8rr %1
+    RET 0
+...
+---
+name:      stack_fold_movsx16rm8_movsx16rr8_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr8 }
+liveins:
+  - { reg: '%bl', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bl
+
+    ; CHECK-LABEL: name:      stack_fold_movsx16rm8_movsx16rr8_test
+    %1 = COPY %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOVSX16rm8
+    %ax = MOVSX16rr8 %1
+    RET 0
+...
+---
+name:      stack_fold_movsx32_norexrm8_movsx32_norexrr8_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr8_norex }
+liveins:
+  - { reg: '%bl', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bl
+
+    ; CHECK-LABEL: name:      stack_fold_movsx32_norexrm8_movsx32_norexrr8_test
+    %1 = COPY %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOVSX32_NOREXrm8
+    %eax = MOVSX32_NOREXrr8 %1
+    RET 0
+...
+---
+name:      stack_fold_movsx32rm16_movsx32rr16_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_movsx32rm16_movsx32rr16_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOVSX32rm16
+    %eax = MOVSX32rr16 %1
+    RET 0
+...
+---
+name:      stack_fold_movsx32rm8_movsx32rr8_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr8 }
+liveins:
+  - { reg: '%bl', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bl
+
+    ; CHECK-LABEL: name:      stack_fold_movsx32rm8_movsx32rr8_test
+    %1 = COPY %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOVSX32rm8
+    %eax = MOVSX32rr8 %1
+    RET 0
+...
+---
+name:      stack_fold_movsx64rm16_movsx64rr16_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_movsx64rm16_movsx64rr16_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOVSX64rm16
+    %rax = MOVSX64rr16 %1
+    RET 0
+...
+---
+name:      stack_fold_movsx64rm32_movsx64rr32_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_movsx64rm32_movsx64rr32_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOVSX64rm32
+    %rax = MOVSX64rr32 %1
+    RET 0
+...
+---
+name:      stack_fold_movsx64rm8_movsx64rr8_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr8 }
+liveins:
+  - { reg: '%bl', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bl
+
+    ; CHECK-LABEL: name:      stack_fold_movsx64rm8_movsx64rr8_test
+    %1 = COPY %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOVSX64rm8
+    %rax = MOVSX64rr8 %1
+    RET 0
+...
+---
+name:      stack_fold_movzx16rm8_movzx16rr8_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr8 }
+liveins:
+  - { reg: '%bl', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bl
+
+    ; CHECK-LABEL: name:      stack_fold_movzx16rm8_movzx16rr8_test
+    %1 = COPY %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOVZX16rm8
+    %ax = MOVZX16rr8 %1
+    RET 0
+...
+---
+name:      stack_fold_movzx32_norexrm8_movzx32_norexrr8_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr8_norex }
+liveins:
+  - { reg: '%bl', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bl
+
+    ; CHECK-LABEL: name:      stack_fold_movzx32_norexrm8_movzx32_norexrr8_test
+    %1 = COPY %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOVZX32_NOREXrm8
+    %eax = MOVZX32_NOREXrr8 %1
+    RET 0
+...
+---
+name:      stack_fold_movzx32rm16_movzx32rr16_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_movzx32rm16_movzx32rr16_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOVZX32rm16
+    %eax = MOVZX32rr16 %1
+    RET 0
+...
+---
+name:      stack_fold_movzx32rm8_movzx32rr8_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr8 }
+liveins:
+  - { reg: '%bl', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bl
+
+    ; CHECK-LABEL: name:      stack_fold_movzx32rm8_movzx32rr8_test
+    %1 = COPY %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOVZX32rm8
+    %eax = MOVZX32rr8 %1
+    RET 0
+...
+---
+name:      stack_fold_movzx64rm16_movzx64rr16_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr16 }
+liveins:
+  - { reg: '%bx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bx
+
+    ; CHECK-LABEL: name:      stack_fold_movzx64rm16_movzx64rr16_test
+    %1 = COPY %bx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOVZX64rm16
+    %rax = MOVZX64rr16 %1
+    RET 0
+...
+---
+name:      stack_fold_movzx64rm8_movzx64rr8_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr8 }
+liveins:
+  - { reg: '%bl', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %bl
+
+    ; CHECK-LABEL: name:      stack_fold_movzx64rm8_movzx64rr8_test
+    %1 = COPY %bl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: MOVZX64rm8
+    %rax = MOVZX64rr8 %1
+    RET 0
+...
+---
+name:      stack_fold_vmwrite32rm_vmwrite32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr32 }
+liveins:
+  - { reg: '%ebx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ebx
+
+    ; CHECK-LABEL: name:      stack_fold_vmwrite32rm_vmwrite32rr_test
+    %1 = COPY %ebx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: VMWRITE32rm
+    %eax = VMWRITE32rr %1
+    RET 0
+...
+---
+name:      stack_fold_vmwrite64rm_vmwrite64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 1, class: gr64 }
+liveins:
+  - { reg: '%rbx', virtual-reg: '%1' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rbx
+
+    ; CHECK-LABEL: name:      stack_fold_vmwrite64rm_vmwrite64rr_test
+    %1 = COPY %rbx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: VMWRITE64rm
+    %rax = VMWRITE64rr %1
+    RET 0
+...
+---
+name:      stack_fold_adc16rm_adc16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc16rm_adc16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC16rm
+    %ax = ADC16rr undef %bx, %2, implicit-def %eflags, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_adc32rm_adc32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc32rm_adc32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC32rm
+    %eax = ADC32rr undef %ebx, %2, implicit-def %eflags, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_adc64rm_adc64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc64rm_adc64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC64rm
+    %rax = ADC64rr undef %rbx, %2, implicit-def %eflags, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_adc8rm_adc8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr8 }
+liveins:
+  - { reg: '%cl', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_adc8rm_adc8rr_test
+    %2 = COPY %cl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADC8rm
+    %al = ADC8rr undef %bl, %2, implicit-def %eflags, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_add16rm_add16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_add16rm_add16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD16rm
+    %ax = ADD16rr undef %bx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_add32rm_add32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_add32rm_add32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD32rm
+    %eax = ADD32rr undef %ebx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_add64rm_add64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_add64rm_add64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD64rm
+    %rax = ADD64rr undef %rbx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_add8rm_add8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr8 }
+liveins:
+  - { reg: '%cl', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl
+
+    ; CHECK-LABEL: name:      stack_fold_add8rm_add8rr_test
+    %2 = COPY %cl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD8rm
+    %al = ADD8rr undef %bl, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_and16rm_and16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_and16rm_and16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND16rm
+    %ax = AND16rr undef %bx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_and32rm_and32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_and32rm_and32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND32rm
+    %eax = AND32rr undef %ebx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_and64rm_and64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_and64rm_and64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND64rm
+    %rax = AND64rr undef %rbx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_and8rm_and8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr8 }
+liveins:
+  - { reg: '%cl', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl
+
+    ; CHECK-LABEL: name:      stack_fold_and8rm_and8rr_test
+    %2 = COPY %cl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: AND8rm
+    %al = AND8rr undef %bl, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_imul16rm_imul16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_imul16rm_imul16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IMUL16rm
+    %ax = IMUL16rr undef %bx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_imul32rm_imul32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_imul32rm_imul32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IMUL32rm
+    %eax = IMUL32rr undef %ebx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_imul64rm_imul64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_imul64rm_imul64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: IMUL64rm
+    %rax = IMUL64rr undef %rbx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_or16rm_or16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_or16rm_or16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR16rm
+    %ax = OR16rr undef %bx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_or32rm_or32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_or32rm_or32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR32rm
+    %eax = OR32rr undef %ebx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_or64rm_or64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_or64rm_or64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR64rm
+    %rax = OR64rr undef %rbx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_or8rm_or8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr8 }
+liveins:
+  - { reg: '%cl', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl
+
+    ; CHECK-LABEL: name:      stack_fold_or8rm_or8rr_test
+    %2 = COPY %cl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: OR8rm
+    %al = OR8rr undef %bl, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_rcpssm_int_rcpssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_rcpssm_int_rcpssr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: RCPSSm_Int
+    %xmm0 = RCPSSr_Int undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_rsqrtssm_int_rsqrtssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_rsqrtssm_int_rsqrtssr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: RSQRTSSm_Int
+    %xmm0 = RSQRTSSr_Int undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_sbb16rm_sbb16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb16rm_sbb16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB16rm
+    %ax = SBB16rr undef %bx, %2, implicit-def %eflags, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_sbb32rm_sbb32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb32rm_sbb32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB32rm
+    %eax = SBB32rr undef %ebx, %2, implicit-def %eflags, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_sbb64rm_sbb64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb64rm_sbb64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB64rm
+    %rax = SBB64rr undef %rbx, %2, implicit-def %eflags, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_sbb8rm_sbb8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr8 }
+liveins:
+  - { reg: '%cl', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl, %eflags
+
+    ; CHECK-LABEL: name:      stack_fold_sbb8rm_sbb8rr_test
+    %2 = COPY %cl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SBB8rm
+    %al = SBB8rr undef %bl, %2, implicit-def %eflags, implicit %eflags
+    RET 0
+...
+---
+name:      stack_fold_sqrtsdm_int_sqrtsdr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_sqrtsdm_int_sqrtsdr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: SQRTSDm_Int
+    %xmm0 = SQRTSDr_Int undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_sqrtssm_int_sqrtssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_sqrtssm_int_sqrtssr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: SQRTSSm_Int
+    %xmm0 = SQRTSSr_Int undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_sub16rm_sub16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_sub16rm_sub16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB16rm
+    %ax = SUB16rr undef %bx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_sub32rm_sub32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_sub32rm_sub32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB32rm
+    %eax = SUB32rr undef %ebx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_sub64rm_sub64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_sub64rm_sub64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB64rm
+    %rax = SUB64rr undef %rbx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_sub8rm_sub8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr8 }
+liveins:
+  - { reg: '%cl', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl
+
+    ; CHECK-LABEL: name:      stack_fold_sub8rm_sub8rr_test
+    %2 = COPY %cl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: SUB8rm
+    %al = SUB8rr undef %bl, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_vrcpssm_vrcpssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: fr32 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrcpssm_vrcpssr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCPSSm
+    %xmm0 = VRCPSSr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrcpssm_int_vrcpssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrcpssm_int_vrcpssr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRCPSSm_Int
+    %xmm0 = VRCPSSr_Int undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrsqrtssm_vrsqrtssr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: fr32 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrtssm_vrsqrtssr_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRTSSm
+    %xmm0 = VRSQRTSSr undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_vrsqrtssm_int_vrsqrtssr_int_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: vr128 }
+liveins:
+  - { reg: '%xmm2', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %xmm2
+
+    ; CHECK-LABEL: name:      stack_fold_vrsqrtssm_int_vrsqrtssr_int_test
+    %2 = COPY %xmm2
+    INLINEASM $nop, 1, 12, implicit-def %xmm0, 12, implicit-def %xmm1, 12, implicit-def %xmm2, 12, implicit-def %xmm3, 12, implicit-def %xmm4, 12, implicit-def %xmm5, 12, implicit-def %xmm6, 12, implicit-def %xmm7, 12, implicit-def %xmm8, 12, implicit-def %xmm9, 12, implicit-def %xmm10, 12, implicit-def %xmm11, 12, implicit-def %xmm12, 12, implicit-def %xmm13, 12, implicit-def %xmm14, 12, implicit-def %xmm15, 12, implicit-def %xmm16, 12, implicit-def %xmm17, 12, implicit-def %xmm18, 12, implicit-def %xmm19, 12, implicit-def %xmm20, 12, implicit-def %xmm21, 12, implicit-def %xmm22, 12, implicit-def %xmm23, 12, implicit-def %xmm24, 12, implicit-def %xmm25, 12, implicit-def %xmm26, 12, implicit-def %xmm27, 12, implicit-def %xmm28, 12, implicit-def %xmm29, 12, implicit-def %xmm30, 12, implicit-def %xmm31
+    ; CHECK: VRSQRTSSm_Int
+    %xmm0 = VRSQRTSSr_Int undef %xmm1, %2
+    RET 0
+...
+---
+name:      stack_fold_xor16rm_xor16rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_xor16rm_xor16rr_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR16rm
+    %ax = XOR16rr undef %bx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_xor32rm_xor32rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_xor32rm_xor32rr_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR32rm
+    %eax = XOR32rr undef %ebx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_xor64rm_xor64rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_xor64rm_xor64rr_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR64rm
+    %rax = XOR64rr undef %rbx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_xor8rm_xor8rr_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr8 }
+liveins:
+  - { reg: '%cl', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cl
+
+    ; CHECK-LABEL: name:      stack_fold_xor8rm_xor8rr_test
+    %2 = COPY %cl
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: XOR8rm
+    %al = XOR8rr undef %bl, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_add16rm_add16rr_db_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr16 }
+liveins:
+  - { reg: '%cx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %cx
+
+    ; CHECK-LABEL: name:      stack_fold_add16rm_add16rr_db_test
+    %2 = COPY %cx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD16rm
+    %ax = ADD16rr_DB undef %bx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_add32rm_add32rr_db_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr32 }
+liveins:
+  - { reg: '%ecx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %ecx
+
+    ; CHECK-LABEL: name:      stack_fold_add32rm_add32rr_db_test
+    %2 = COPY %ecx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD32rm
+    %eax = ADD32rr_DB undef %ebx, %2, implicit-def %eflags
+    RET 0
+...
+---
+name:      stack_fold_add64rm_add64rr_db_test
+tracksRegLiveness: true
+registers:
+  - { id: 2, class: gr64 }
+liveins:
+  - { reg: '%rcx', virtual-reg: '%2' }
+body:             |
+  bb.0 (%ir-block.0):
+    liveins: %rcx
+
+    ; CHECK-LABEL: name:      stack_fold_add64rm_add64rr_db_test
+    %2 = COPY %rcx
+    INLINEASM $nop, 1, 12, implicit-def %rax, 12, implicit-def %rbx, 12, implicit-def %rcx, 12, implicit-def %rdx, 12, implicit-def %rbp, 12, implicit-def %rsp, 12, implicit-def %rsi, 12, implicit-def %rdi, 12, implicit-def %r8, 12, implicit-def %r9, 12, implicit-def %r10, 12, implicit-def %r11, 12, implicit-def %r12, 12, implicit-def %r13, 12, implicit-def %r14, 12, implicit-def %r15
+    ; CHECK: ADD64rm
+    %rax = ADD64rr_DB undef %rbx, %2, implicit-def %eflags
+    RET 0
+...