[AMDGPU] Handle SI_MASKED_UNREACHABLE in instruction emitter

[yaxunl]

Summary

SI_MASKED_UNREACHABLE does not have machine instruction encoding.
It needs special handling in AMDGPUAsmPrinter::EmitInstruction like some
other pseudo instructions.

This patch fixes compilation failure of RadeonRays.

[arsenm]

LGTM

llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp

if (MI->isBundle()) {
     }
 
     if (MI->getOpcode() == AMDGPU::WAVE_BARRIER) {
       if (isVerbose())
         OutStreamer->emitRawComment(" wave barrier");
       return;
     }
 
+    if (MI->getOpcode() == AMDGPU::SI_MASKED_UNREACHABLE) {
+      if (isVerbose())
+        OutStreamer->emitRawComment(" divergent unreachable");
+      return;
+    }
+
     MCInst TmpInst;
     MCInstLowering.lower(MI, TmpInst);
     EmitToStreamer(*OutStreamer, TmpInst);
 
     if (STI.dumpCode()) {
       // Disassemble instruction/operands to text.
       DisasmLines.resize(DisasmLines.size() + 1);
       std::string &DisasmLine = DisasmLines.back();

llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll

+; RUN: llc -march amdgcn %s -filetype=obj 
+; RUN: llc -march amdgcn <%s | FileCheck %s
+define amdgpu_kernel void @f() {
+  ; CHECK: ; divergent unreachable
+  call void @llvm.amdgcn.unreachable()
+  ret void
+}
+
+declare void @llvm.amdgcn.unreachable()