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[X86] Create the correct ADC/SBB SDNode when lowering add
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Authored by davide on Apr 10 2017, 3:53 PM.

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Summary

ADC returns two values, but we currently create an SDNode with only one. This is wrong, and when we try to combine ADC, SelectionDAG asks for the second return value, which isn't available, so we assert.

Fixes http://bugs.llvm.org/show_bug.cgi?id=32588

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Repository
rL LLVM

Event Timeline

davide created this revision.Apr 10 2017, 3:53 PM
filcab accepted this revision.Apr 11 2017, 9:58 AM

LGTM

This revision is now accepted and ready to land.Apr 11 2017, 9:58 AM
This revision was automatically updated to reflect the committed changes.