[AMDGPU] Temporarily change constant address space from 4 to 2 for the new address space mapping

[yaxunl]

Summary

Change constant address space from 4 to 2 for the new address space mapping in Clang.

[t-tye]

Other than one comment:

LGTM

lib/Basic/Targets.cpp

2083 ↗

(On Diff #94386)

Since Constant is now the same regardless of the GIZ setting, should it be moved to be a literal constant like the other values that do not change?

[t-tye]

LGTM

lib/Basic/Targets.cpp

2083 ↗

(On Diff #94386)

Disregard comment as was thinking of the LLVM way address spaces were being handled.

cfe/trunk/lib/Basic/Targets.cpp

static const LangAS::Map AMDGPUPrivateIsZeroMap = {
     4,  // opencl_generic
     1,  // cuda_device
     2,  // cuda_constant
     3   // cuda_shared
 };
 static const LangAS::Map AMDGPUGenericIsZeroMap = {
     1,  // opencl_global
     3,  // opencl_local
-    4,  // opencl_constant
+    2,  // opencl_constant
     0,  // opencl_generic
     1,  // cuda_device
-    4,  // cuda_constant
+    2,  // cuda_constant
     3   // cuda_shared
 };
 
 // If you edit the description strings, make sure you update
 // getPointerWidthV().
 
 static const char *const DataLayoutStringR600 =
   "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
   "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
 
 static const char *const DataLayoutStringSIPrivateIsZero =
   "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"
   "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
   "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
 
 static const char *const DataLayoutStringSIGenericIsZero =
-  "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"
+  "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:32:32"
   "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
   "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
 
 class AMDGPUTargetInfo final : public TargetInfo {
   static const Builtin::Info BuiltinInfo[];
   static const char * const GCCRegNames[];
 
   struct AddrSpace {
     unsigned Generic, Global, Local, Constant, Private;
     AddrSpace(bool IsGenericZero_ = false){
       if (IsGenericZero_) {
         Generic   = 0;
         Global    = 1;
         Local     = 3;
-        Constant  = 4;
+        Constant  = 2;
         Private   = 5;
       } else {
         Generic   = 4;
         Global    = 1;
         Local     = 3;
         Constant  = 2;
         Private   = 0;
       }

cfe/trunk/test/CodeGenOpenCL/address-space-constant-initializers.cl

 // RUN: %clang_cc1 %s -ffake-address-space-map -emit-llvm -o - | FileCheck %s
+// RUN: %clang_cc1 %s -triple amdgcn-amd-amdhsa-opencl -emit-llvm -o - | FileCheck %s
+// RUN: %clang_cc1 %s -triple amdgcn-amd-amdhsa-amdgizcl -emit-llvm -o - | FileCheck %s
 
 typedef struct {
     int i;
     float f; // At non-zero offset.
 } ArrayStruct;
 
 __constant ArrayStruct constant_array_struct = { 0, 0.0f };
 

cfe/trunk/test/CodeGenOpenCL/amdgpu-env-amdgiz.cl

 // RUN: %clang_cc1 %s -O0 -triple amdgcn -emit-llvm -o - | FileCheck %s
 // RUN: %clang_cc1 %s -O0 -triple amdgcn---opencl -emit-llvm -o - | FileCheck %s
 // RUN: %clang_cc1 %s -O0 -triple amdgcn---amdgiz -emit-llvm -o - | FileCheck -check-prefix=GIZ %s
 // RUN: %clang_cc1 %s -O0 -triple amdgcn---amdgizcl -emit-llvm -o - | FileCheck -check-prefix=GIZ %s
 
 // CHECK: target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
-// GIZ: target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
+// GIZ: target datalayout = "e-p:64:64-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
 void foo(void) {}