[InstCombine] Support folding and/or/xor with a constant vector RHS into selects and phis

[craig.topper]

Summary

Currently we only fold with ConstantInt RHS. This generalizes to any Constant RHS.

[spatel]

Can you add or change the bitwise logic tests to not have splat constants? That should allow us to expose the difference in a regression test (SimplifyDemanded doesn't handle non-splat afaik).
Also, for the bitwise logic tests, please add tests with a phi op, so we have some coverage for that part.

And actually, that makes the add/sub part of this seem suspicious and probably worth splitting into a separate patch. I think those cases should be calling foldOpWithConstantIntoOperand() to cover both selects and phis.

[craig.topper]

Reduced to just the logic operations. Updated tests to include phis

[spatel]

LGTM. It would be nice to hoist transforms that are common to all of the bitwise logic ops into a shared helper as an NFC follow-up, so we're not duplicating code. We have something like that for the shift instructions.

[craig.topper]

Agreed. I'll do that.

lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

// immediate, transform it.  This frequently occurs for bitfield accesses.
         // This will fold the two constants together, which may allow
         // other simplifications.
         Value *NewCast = Builder->CreateTrunc(X, I.getType(), "and.shrunk");
         Constant *C3 = ConstantExpr::getTrunc(YC, I.getType());
         C3 = ConstantExpr::getAnd(C3, AndRHS);
         return BinaryOperator::CreateAnd(NewCast, C3);
       }
     }
+  }
 
+  if (isa<Constant>(Op1))
     if (Instruction *FoldedLogic = foldOpWithConstantIntoOperand(I))
       return FoldedLogic;
-  }
 
   if (Instruction *DeMorgan = matchDeMorgansLaws(I, Builder))
     return DeMorgan;
 
   {
     Value *A = nullptr, *B = nullptr, *C = nullptr, *D = nullptr;
     // (A|B) & ~(A&B) -> A^B
     if (match(Op0, m_Or(m_Value(A), m_Value(B))) &&
if (ConstantInt *RHS = dyn_cast<ConstantInt>(Op1)) {
     // (X ^ C1) | C2 --> (X | C2) ^ (C1&~C2)
     if (match(Op0, m_Xor(m_Value(X), m_ConstantInt(C1))) &&
         Op0->hasOneUse()) {
       Value *Or = Builder->CreateOr(X, RHS);
       Or->takeName(Op0);
       return BinaryOperator::CreateXor(Or,
                             Builder->getInt(C1->getValue() & ~RHS->getValue()));
     }
+  }
 
+  if (isa<Constant>(Op1))
     if (Instruction *FoldedLogic = foldOpWithConstantIntoOperand(I))
       return FoldedLogic;
-  }
 
   // Given an OR instruction, check to see if this is a bswap.
   if (Instruction *BSwap = MatchBSwap(I))
     return BSwap;
 
   Value *A = nullptr, *B = nullptr;
   ConstantInt *C1 = nullptr, *C2 = nullptr;
 
if (BinaryOperator *Op0I = dyn_cast<BinaryOperator>(Op0)) {
             cast<Instruction>(Opnd0)->setDebugLoc(I.getDebugLoc());
             Value *FoldVal = ConstantInt::get(Opnd0->getType(), FoldConst);
 
             return BinaryOperator::CreateXor(Opnd0, FoldVal);
           }
         }
       }
     }
+  }
 
+  if (isa<Constant>(Op1))
     if (Instruction *FoldedLogic = foldOpWithConstantIntoOperand(I))
       return FoldedLogic;
-  }
 
   BinaryOperator *Op1I = dyn_cast<BinaryOperator>(Op1);
   if (Op1I) {
     Value *A, *B;
     if (match(Op1I, m_Or(m_Value(A), m_Value(B)))) {
       if (A == Op0) {              // B^(B|A) == (A|B)^B
         Op1I->swapOperands();
         I.swapOperands();

test/Transforms/InstCombine/and.ll

 ;
   %A = select i1 %C, <2 x i32> <i32 1000, i32 1000>, <2 x i32> <i32 10, i32 10>
   %V = and <2 x i32> %A, <i32 123, i32 123>
   ret <2 x i32> %V
 }
 
 define <2 x i32> @test40vec2(i1 %C) {
 ; CHECK-LABEL: @test40vec2(
-; CHECK-NEXT:    [[A:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 1000, i32 2500>, <2 x i32> <i32 10, i32 30>
-; CHECK-NEXT:    [[V:%.*]] = and <2 x i32> [[A]], <i32 123, i32 333>
+; CHECK-NEXT:    [[V:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 104, i32 324>, <2 x i32> <i32 10, i32 12>
 ; CHECK-NEXT:    ret <2 x i32> [[V]]
 ;
   %A = select i1 %C, <2 x i32> <i32 1000, i32 2500>, <2 x i32> <i32 10, i32 30>
   %V = and <2 x i32> %A, <i32 123, i32 333>
   ret <2 x i32> %V
 }
 
 define i32 @test41(i1 %which) {

 
 define <2 x i32> @test41vec(i1 %which) {
 ; CHECK-LABEL: @test41vec(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
 ; CHECK:       delay:
 ; CHECK-NEXT:    br label [[FINAL]]
 ; CHECK:       final:
-; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 1000, i32 1000>, [[ENTRY:%.*]] ], [ <i32 10, i32 10>, [[DELAY]] ]
-; CHECK-NEXT:    [[VALUE:%.*]] = and <2 x i32> [[A]], <i32 106, i32 106>
-; CHECK-NEXT:    ret <2 x i32> [[VALUE]]
+; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 104, i32 104>, [[ENTRY:%.*]] ], [ <i32 10, i32 10>, [[DELAY]] ]
+; CHECK-NEXT:    ret <2 x i32> [[A]]
 ;
 entry:
   br i1 %which, label %final, label %delay
 
 delay:
   br label %final
 
 final:
   %A = phi <2 x i32> [ <i32 1000, i32 1000>, %entry ], [ <i32 10, i32 10>, %delay ]
   %value = and <2 x i32> %A, <i32 123, i32 123>
   ret <2 x i32> %value
 }
 
 define <2 x i32> @test41vec2(i1 %which) {
 ; CHECK-LABEL: @test41vec2(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
 ; CHECK:       delay:
 ; CHECK-NEXT:    br label [[FINAL]]
 ; CHECK:       final:
-; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 1000, i32 2500>, [[ENTRY:%.*]] ], [ <i32 10, i32 30>, [[DELAY]] ]
-; CHECK-NEXT:    [[VALUE:%.*]] = and <2 x i32> [[A]], <i32 123, i32 333>
-; CHECK-NEXT:    ret <2 x i32> [[VALUE]]
+; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 104, i32 324>, [[ENTRY:%.*]] ], [ <i32 10, i32 12>, [[DELAY]] ]
+; CHECK-NEXT:    ret <2 x i32> [[A]]
 ;
 entry:
   br i1 %which, label %final, label %delay
 
 delay:
   br label %final
 
 final:
   %A = phi <2 x i32> [ <i32 1000, i32 2500>, %entry ], [ <i32 10, i32 30>, %delay ]
   %value = and <2 x i32> %A, <i32 123, i32 333>
   ret <2 x i32> %value
 }

test/Transforms/InstCombine/or.ll

 ;
   %A = select i1 %C, i32 1000, i32 10
   %V = or i32 %A, 123
   ret i32 %V
 }
 
 define <2 x i32> @test49vec(i1 %C) {
 ; CHECK-LABEL: @test49vec(
-; CHECK-NEXT:    [[A:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 896, i32 896>, <2 x i32> zeroinitializer
-; CHECK-NEXT:    [[V:%.*]] = or <2 x i32> [[A]], <i32 123, i32 123>
+; CHECK-NEXT:    [[V:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 1019, i32 1019>, <2 x i32> <i32 123, i32 123>
 ; CHECK-NEXT:    ret <2 x i32> [[V]]
 ;
   %A = select i1 %C, <2 x i32> <i32 1000, i32 1000>, <2 x i32> <i32 10, i32 10>
   %V = or <2 x i32> %A, <i32 123, i32 123>
   ret <2 x i32> %V
 }
 
 define <2 x i32> @test49vec2(i1 %C) {
 ; CHECK-LABEL: @test49vec2(
-; CHECK-NEXT:    [[A:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 1000, i32 2500>, <2 x i32> <i32 10, i32 30>
-; CHECK-NEXT:    [[V:%.*]] = or <2 x i32> [[A]], <i32 123, i32 333>
+; CHECK-NEXT:    [[V:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 1019, i32 2509>, <2 x i32> <i32 123, i32 351>
 ; CHECK-NEXT:    ret <2 x i32> [[V]]
 ;
   %A = select i1 %C, <2 x i32> <i32 1000, i32 2500>, <2 x i32> <i32 10, i32 30>
   %V = or <2 x i32> %A, <i32 123, i32 333>
   ret <2 x i32> %V
 }
 
 define i32 @test50(i1 %which) {

 
 define <2 x i32> @test50vec(i1 %which) {
 ; CHECK-LABEL: @test50vec(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
 ; CHECK:       delay:
 ; CHECK-NEXT:    br label [[FINAL]]
 ; CHECK:       final:
-; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 1000, i32 1000>, [[ENTRY:%.*]] ], [ <i32 10, i32 10>, [[DELAY]] ]
-; CHECK-NEXT:    [[VALUE:%.*]] = or <2 x i32> [[A]], <i32 123, i32 123>
-; CHECK-NEXT:    ret <2 x i32> [[VALUE]]
+; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 1019, i32 1019>, [[ENTRY:%.*]] ], [ <i32 123, i32 123>, [[DELAY]] ]
+; CHECK-NEXT:    ret <2 x i32> [[A]]
 ;
 entry:
   br i1 %which, label %final, label %delay
 
 delay:
   br label %final
 
 final:
   %A = phi <2 x i32> [ <i32 1000, i32 1000>, %entry ], [ <i32 10, i32 10>, %delay ]
   %value = or <2 x i32> %A, <i32 123, i32 123>
   ret <2 x i32> %value
 }
 
 define <2 x i32> @test50vec2(i1 %which) {
 ; CHECK-LABEL: @test50vec2(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
 ; CHECK:       delay:
 ; CHECK-NEXT:    br label [[FINAL]]
 ; CHECK:       final:
-; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 1000, i32 2500>, [[ENTRY:%.*]] ], [ <i32 10, i32 30>, [[DELAY]] ]
-; CHECK-NEXT:    [[VALUE:%.*]] = or <2 x i32> [[A]], <i32 123, i32 333>
-; CHECK-NEXT:    ret <2 x i32> [[VALUE]]
+; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 1019, i32 2509>, [[ENTRY:%.*]] ], [ <i32 123, i32 351>, [[DELAY]] ]
+; CHECK-NEXT:    ret <2 x i32> [[A]]
 ;
 entry:
   br i1 %which, label %final, label %delay
 
 delay:
   br label %final
 
 final:
   %A = phi <2 x i32> [ <i32 1000, i32 2500>, %entry ], [ <i32 10, i32 30>, %delay ]
   %value = or <2 x i32> %A, <i32 123, i32 333>
   ret <2 x i32> %value
 }

test/Transforms/InstCombine/xor.ll

 ;
   %A = select i1 %C, i32 1000, i32 10
   %V = xor i32 %A, 123
   ret i32 %V
 }
 
 define <2 x i32> @test29vec(i1 %C) {
 ; CHECK-LABEL: @test29vec(
-; CHECK-NEXT:    [[A:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 1000, i32 1000>, <2 x i32> <i32 10, i32 10>
-; CHECK-NEXT:    [[V:%.*]] = xor <2 x i32> [[A]], <i32 123, i32 123>
+; CHECK-NEXT:    [[V:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 915, i32 915>, <2 x i32> <i32 113, i32 113>
 ; CHECK-NEXT:    ret <2 x i32> [[V]]
 ;
   %A = select i1 %C, <2 x i32> <i32 1000, i32 1000>, <2 x i32> <i32 10, i32 10>
   %V = xor <2 x i32> %A, <i32 123, i32 123>
   ret <2 x i32> %V
 }
 
 define <2 x i32> @test29vec2(i1 %C) {
 ; CHECK-LABEL: @test29vec2(
-; CHECK-NEXT:    [[A:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 1000, i32 2500>, <2 x i32> <i32 10, i32 30>
-; CHECK-NEXT:    [[V:%.*]] = xor <2 x i32> [[A]], <i32 123, i32 333>
+; CHECK-NEXT:    [[V:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 915, i32 2185>, <2 x i32> <i32 113, i32 339>
 ; CHECK-NEXT:    ret <2 x i32> [[V]]
 ;
   %A = select i1 %C, <2 x i32> <i32 1000, i32 2500>, <2 x i32> <i32 10, i32 30>
   %V = xor <2 x i32> %A, <i32 123, i32 333>
   ret <2 x i32> %V
 }
 
 define i32 @test30(i1 %which) {

 
 define <2 x i32> @test30vec(i1 %which) {
 ; CHECK-LABEL: @test30vec(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
 ; CHECK:       delay:
 ; CHECK-NEXT:    br label [[FINAL]]
 ; CHECK:       final:
-; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 1000, i32 1000>, [[ENTRY:%.*]] ], [ <i32 10, i32 10>, [[DELAY]] ]
-; CHECK-NEXT:    [[VALUE:%.*]] = xor <2 x i32> [[A]], <i32 123, i32 123>
-; CHECK-NEXT:    ret <2 x i32> [[VALUE]]
+; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 915, i32 915>, [[ENTRY:%.*]] ], [ <i32 113, i32 113>, [[DELAY]] ]
+; CHECK-NEXT:    ret <2 x i32> [[A]]
 ;
 entry:
   br i1 %which, label %final, label %delay
 
 delay:
   br label %final
 
 final:
   %A = phi <2 x i32> [ <i32 1000, i32 1000>, %entry ], [ <i32 10, i32 10>, %delay ]
   %value = xor <2 x i32> %A, <i32 123, i32 123>
   ret <2 x i32> %value
 }
 
 define <2 x i32> @test30vec2(i1 %which) {
 ; CHECK-LABEL: @test30vec2(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
 ; CHECK:       delay:
 ; CHECK-NEXT:    br label [[FINAL]]
 ; CHECK:       final:
-; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 1000, i32 2500>, [[ENTRY:%.*]] ], [ <i32 10, i32 30>, [[DELAY]] ]
-; CHECK-NEXT:    [[VALUE:%.*]] = xor <2 x i32> [[A]], <i32 123, i32 333>
-; CHECK-NEXT:    ret <2 x i32> [[VALUE]]
+; CHECK-NEXT:    [[A:%.*]] = phi <2 x i32> [ <i32 915, i32 2185>, [[ENTRY:%.*]] ], [ <i32 113, i32 339>, [[DELAY]] ]
+; CHECK-NEXT:    ret <2 x i32> [[A]]
 ;
 entry:
   br i1 %which, label %final, label %delay
 
 delay:
   br label %final
 
 final:
   %A = phi <2 x i32> [ <i32 1000, i32 2500>, %entry ], [ <i32 10, i32 30>, %delay ]
   %value = xor <2 x i32> %A, <i32 123, i32 333>
   ret <2 x i32> %value
 }