Use setBits in SelectionDAG

[deadalnix]

Summary

As per title.

[craig.topper]

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

2318

You can use setBitsFrom(1)

[deadalnix]

Use setBitsFrom

[craig.topper]

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

2583

I don't think this is right. KnownZeroLow isn't the width of the APInt is it?

[deadalnix]

Revert KnownZeroLow

[craig.topper]

LGTM

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

if (Op.getResNo() != 1)
       break;
     // The boolean result conforms to getBooleanContents.
     // If we know the result of a setcc has the top bits zero, use this info.
     // We know that we have an integer-based boolean since these operations
     // are only available for integer.
     if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
             TargetLowering::ZeroOrOneBooleanContent &&
         BitWidth > 1)
-      KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
+      KnownZero.setBitsFrom(1);
     break;
   case ISD::SETCC:
     // If we know the result of a setcc has the top bits zero, use this info.
     if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
             TargetLowering::ZeroOrOneBooleanContent &&
         BitWidth > 1)
-      KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
+      KnownZero.setBitsFrom(1);
     break;
   case ISD::SHL:
     if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
       computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, DemandedElts,
                        Depth + 1);
       KnownZero = KnownZero << *ShAmt;
       KnownOne = KnownOne << *ShAmt;
       // Low bits are known zero.
-      KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt->getZExtValue());
+      KnownZero.setLowBits(ShAmt->getZExtValue());
     }
     break;
   case ISD::SRL:
     if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
       computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, DemandedElts,
                        Depth + 1);
       KnownZero = KnownZero.lshr(*ShAmt);
       KnownOne  = KnownOne.lshr(*ShAmt);
       // High bits are known zero.
-      APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt->getZExtValue());
-      KnownZero |= HighBits;
+      KnownZero.setHighBits(ShAmt->getZExtValue());
     }
     break;
   case ISD::SRA:
     if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
       computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, DemandedElts,
                        Depth + 1);
       KnownZero = KnownZero.lshr(*ShAmt);
       KnownOne  = KnownOne.lshr(*ShAmt);
case ISD::FGETSIGN:
     break;
   case ISD::USUBO:
   case ISD::SSUBO:
     if (Op.getResNo() == 1) {
       // If we know the result of a setcc has the top bits zero, use this info.
       if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
               TargetLowering::ZeroOrOneBooleanContent &&
           BitWidth > 1)
-        KnownZero.setBits(1, BitWidth);
+        KnownZero.setBitsFrom(1);
       break;
     }
     LLVM_FALLTHROUGH;
   case ISD::SUB:
   case ISD::SUBC: {
     if (ConstantSDNode *CLHS = isConstOrConstSplat(Op.getOperand(0))) {
       // We know that the top bits of C-X are clear if X contains less bits
       // than C (i.e. no wrap-around can happen).  For example, 20-X is
void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
   }
   case ISD::UADDO:
   case ISD::SADDO:
     if (Op.getResNo() == 1) {
       // If we know the result of a setcc has the top bits zero, use this info.
       if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
               TargetLowering::ZeroOrOneBooleanContent &&
           BitWidth > 1)
-        KnownZero.setBits(1, BitWidth);
+        KnownZero.setBitsFrom(1);
       break;
     }
     LLVM_FALLTHROUGH;
   case ISD::ADD:
   case ISD::ADDC:
   case ISD::ADDE: {
     // Output known-0 bits are known if clear or set in both the low clear bits
     // common to both LHS & RHS.  For example, 8+(X<<3) is known to have the
KnownZeroLow = std::min(KnownZeroLow,
                             KnownZero2.countTrailingOnes());
 
     if (Opcode == ISD::ADDE) {
       // With ADDE, a carry bit may be added in, so we can only use this
       // information if we know (at least) that the low two bits are clear.
       // We then return to the caller that the low bit is unknown but that
       // other bits are known zero.
       if (KnownZeroLow >= 2)
-        KnownZero.setBits(1, KnownZeroLow);
+        KnownZero.setBitsFrom(1);
       break;
     }
 
     KnownZero.setLowBits(KnownZeroLow);
     if (KnownZeroHigh > 1)
       KnownZero.setHighBits(KnownZeroHigh - 1);
     break;
   }
case ISD::UMIN: {
 
     // UMIN - we know that the result will have the maximum of the
     // known zero leading bits of the inputs.
     unsigned LeadZero = KnownZero.countLeadingOnes();
     LeadZero = std::max(LeadZero, KnownZero2.countLeadingOnes());
 
     KnownZero &= KnownZero2;
     KnownOne &= KnownOne2;
-    KnownZero |= APInt::getHighBitsSet(BitWidth, LeadZero);
+    KnownZero.setHighBits(LeadZero);
     break;
   }
   case ISD::UMAX: {
     computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, DemandedElts,
                      Depth + 1);
     computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, DemandedElts,
                      Depth + 1);
 
     // UMAX - we know that the result will have the maximum of the
     // known one leading bits of the inputs.
     unsigned LeadOne = KnownOne.countLeadingOnes();
     LeadOne = std::max(LeadOne, KnownOne2.countLeadingOnes());
 
     KnownZero &= KnownZero2;
     KnownOne &= KnownOne2;
-    KnownOne |= APInt::getHighBitsSet(BitWidth, LeadOne);
+    KnownOne.setHighBits(LeadOne);
     break;
   }
   case ISD::SMIN:
   case ISD::SMAX: {
     computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, DemandedElts,
                      Depth + 1);
     // If we don't know any bits, early out.
     if (!KnownOne && !KnownZero)