[ARM] Remove t2xtpk features from tests

[samparker]

Summary

I previously removed the T2XtPk feature from the ARM backend, but it looks like I missed some of the tests that were using the feature.

[SjoerdMeijer]

Looks good to me.
I see that this feature was removed in D29623, but was still used here in these tests.
That should result in a compiler "t2xtpk is not a recognized feature for this target (ignoring feature)", but as it is a warning only, that is easily missed.

llvm/trunk/test/CodeGen/Thumb2/thumb2-pack.ll

-; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
 
 ; CHECK: test1
 ; CHECK: pkhbt   r0, r0, r1, lsl #16
 define i32 @test1(i32 %X, i32 %Y) {
   %tmp1 = and i32 %X, 65535   ; <i32> [#uses=1]
   %tmp4 = shl i32 %Y, 16    ; <i32> [#uses=1]
   %tmp5 = or i32 %tmp4, %tmp1   ; <i32> [#uses=1]
   ret i32 %tmp5

llvm/trunk/test/CodeGen/Thumb2/thumb2-rev.ll

-; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+v7,+t2xtpk %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+v7 %s -o - | FileCheck %s
 
 define i32 @f1(i32 %a) {
 ; CHECK-LABEL: f1:
 ; CHECK: rev r0, r0
     %tmp = tail call i32 @llvm.bswap.i32(i32 %a)
     ret i32 %tmp
 }
 

llvm/trunk/test/CodeGen/Thumb2/thumb2-smla.ll

-; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk,+dsp %s -o - | FileCheck %s
-; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk,+dsp -arm-use-mulops=false %s -o - | FileCheck %s -check-prefix=NO_MULOPS
+; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+dsp %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+dsp -arm-use-mulops=false %s -o - | FileCheck %s -check-prefix=NO_MULOPS
 
 define i32 @f3(i32 %a, i16 %x, i32 %y) {
 ; CHECK: f3
 ; CHECK: smlabt r0, r1, r2, r0
 ; NO_MULOPS: f3
 ; NO_MULOPS: smultb r1, r2, r1
 ; NO_MULOPS-NEXT: add r0, r1
         %tmp = sext i16 %x to i32               ; <i32> [#uses=1]
         %tmp2 = ashr i32 %y, 16         ; <i32> [#uses=1]
         %tmp3 = mul i32 %tmp2, %tmp             ; <i32> [#uses=1]
         %tmp5 = add i32 %tmp3, %a               ; <i32> [#uses=1]
         ret i32 %tmp5
 }

llvm/trunk/test/CodeGen/Thumb2/thumb2-smul.ll

-; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+t2xtpk,+dsp %s -o - |  FileCheck %s
+; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2,+dsp %s -o - |  FileCheck %s
 
 @x = weak global i16 0          ; <i16*> [#uses=1]
 @y = weak global i16 0          ; <i16*> [#uses=0]
 
 define i32 @f1(i32 %y) {
 ; CHECK: f1
 ; CHECK: smulbt r0, r1, r0
         %tmp = load i16, i16* @x             ; <i16> [#uses=1]

llvm/trunk/test/MC/ARM/thumbv8m.s

 // RUN: not llvm-mc -triple=thumbv8m.base -show-encoding < %s 2>%t \
 // RUN:   | FileCheck --check-prefix=CHECK-BASELINE --check-prefix=CHECK %s
 // RUN:     FileCheck --check-prefix=UNDEF-BASELINE --check-prefix=UNDEF < %t %s
 // RUN: not llvm-mc -triple=thumbv8m.main -show-encoding < %s 2>%t \
 // RUN:   | FileCheck --check-prefix=CHECK-MAINLINE --check-prefix=CHECK %s
 // RUN:     FileCheck --check-prefix=UNDEF-MAINLINE --check-prefix=UNDEF < %t %s
-// RUN: not llvm-mc -triple=thumbv8m.main -mattr=+dsp,+t2xtpk -show-encoding < %s 2>%t \
+// RUN: not llvm-mc -triple=thumbv8m.main -mattr=+dsp -show-encoding < %s 2>%t \
 // RUN:   | FileCheck --check-prefix=CHECK-MAINLINE_DSP --check-prefix=CHECK %s
 // RUN:     FileCheck --check-prefix=UNDEF-MAINLINE_DSP --check-prefix=UNDEF < %t %s
 
 // Simple check that baseline is v6M and mainline is v7M
 // UNDEF-BASELINE: error: instruction requires: thumb2
 // UNDEF-MAINLINE-NOT: error: instruction requires:
 // UNDEF-MAINLINE_DSP-NOT: error: instruction requires:
 mov.w r0, r0
 
 // Check that .arm is invalid
 // UNDEF: target does not support ARM mode
 .arm
 
-// And only +dsp,+t2xtpk has DSP and t2xtpk instructions
+// And only +dsp has DSP and instructions
 // UNDEF-BASELINE: error: instruction requires: arm-mode
 // UNDEF-MAINLINE: error: instruction requires: arm-mode
 // UNDEF-MAINLINE_DSP-NOT: error: instruction requires:
 qadd16 r0, r0, r0
 // UNDEF-BASELINE: error: instruction requires: arm-mode
 // UNDEF-MAINLINE: error: instruction requires: arm-mode
 // UNDEF-MAINLINE_DSP-NOT: error: instruction requires:
 uxtab16 r0, r1, r2