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Differential D30298

[mips] Handle 64 bit immediate in and/or/xor pseudo instructions on mips64
ClosedPublic

Authored by arichardson on Feb 23 2017, 6:09 AM.

Details

Reviewers
sdardis
theraven
atanasyan
Commits
rGaa208817498b: [mips] Handle 64 bit immediate in and/or/xor pseudo instructions on mips64
rL296125: [mips] Handle 64 bit immediate in and/or/xor pseudo instructions on mips64
Summary

Previously LLVM was assuming 32-bit signed immediates which results in and with a bitmask that has bit 31 set to incorrectly include bits 63-32 in the result.
After applying this patch I can now compile all of the FreeBSD mips assembly code with clang.

This issue also affects the nor, slt and sltu macros and I will fix those in a separate review.

Diff Detail

Event Timeline

arichardson created this revision.Feb 23 2017, 6:09 AM
Herald added a subscriber: emaste. · View Herald TranscriptFeb 23 2017, 6:09 AM
arichardson updated this revision to Diff 89516.Feb 23 2017, 8:51 AM

rebased on master

sdardis edited edge metadata.Feb 23 2017, 11:54 AM

Hi,

Thanks for taking a look at this, I was about to start on it today, but your patch arrived first.

I am not sure what the correct approach is but it seems I need to add the GPR_32 constraint because otherwise the 32 bit aliases will be used for 64 bit code generation.

Yes, this approach is correct. The asm parser considers the predicates of the instruction definition to chose which entry in the matcher table should be considered.

This issue also affects the nor, slt and sltu macros but I don't know how to change the tablegen to make these work.

I've inlined a comment on how to get slt and sltu macros working. They're different from the rest of the instructions you're changing due to legalization issues.

To handle NorImm, change the def of NORImm into a class NORIMM_DESC_BASE which takes two parameters, RegisterOperand and DAGOperand which are then used instead of GPR32Opnd and simm32_relaxed. You can then introduce a def of NORImm which takes GPR32Opnd and simm32_relaxed, and a def NORImm64 which takes GPR64Opnd and imm64. These two instructions will need GPR_32 and GPR_64 predicates attached to them otherwise the result of parsing 'nor $4, $5, -1' will give results based on the order of the matcher table.

For the TableGen side of things, you can look at the class LoadImmediate32 and how it is used with def LoadImm32 just below it for a reference. You'll also need to look at where NORImm get handled in the cpp side and provide similar support for NORImm64.

Thanks again,
Simon

lib/Target/Mips/AsmParser/MipsAsmParser.cpp
3830–3847

For the 64 bit case, you need to pick the corresponding 64 bit instruction definition. Picking the 32 bit version introduces a very subtle bug in that the instruction emitted will be (harmless) malformed.

lib/Target/Mips/MipsInstrInfo.td
2324–2328

Add another parameter here which defaults to RO, use it with $rs.

Then you can modify just the macro definitions for slt and sltu to produce a result as a GPR32Opnd.

test/MC/Mips/mips64-instalias-imm-expanding.s
382–384

This should not be sign extended.

470

Change that XXXAR to FIXME, so I can find it later.

We currently don't do many possible optimizations regarding constant synthesis in the assembler. I'd like to improve that but other things have higher priority.

arichardson updated this revision to Diff 89631.Feb 24 2017, 2:36 AM
arichardson edited the summary of this revision. (Show Details)

fixed issues with and/or/xor. Will add a separate review for nor/slt/sltu later today.

arichardson added a child revision: D30330: [mips] Fix 64bit slt/sltu/nor with immediates.Feb 24 2017, 3:18 AM
sdardis accepted this revision.Feb 24 2017, 5:27 AM

LGTM to with inline comment addressed.

lib/Target/Mips/Mips64InstrInfo.td
710–715

These need to be guarded by GPR_64.

This revision is now accepted and ready to land.Feb 24 2017, 5:27 AM
arichardson updated this revision to Diff 89660.Feb 24 2017, 6:09 AM
arichardson marked 2 inline comments as done.

Fixed inline issues.

I don't have commit access, could you submit for me?

Closed by commit rL296125: [mips] Handle 64 bit immediate in and/or/xor pseudo instructions on mips64 (authored by sdardis). · Explain WhyFeb 24 2017, 6:46 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
Mips/
AsmParser/
18 lines
6 lines
22 lines
test/
MC/
Mips/
106 lines
415 lines

Diff 89631

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

Show First 20 Lines • Show All 2,386 Lines • ▼ Show 20 Lines if ((Inst.getNumOperands() == 3) && Inst.getOperand(0).isReg() &&
Inst.getOperand(1).isReg() && Inst.getOperand(2).isImm()) { Inst.getOperand(1).isReg() && Inst.getOperand(2).isImm()) {
int64_t ImmValue = Inst.getOperand(2).getImm(); int64_t ImmValue = Inst.getOperand(2).getImm();
if (isInt<16>(ImmValue)) if (isInt<16>(ImmValue))
return MER_NotAMacro; return MER_NotAMacro;
return expandAliasImmediate(Inst, IDLoc, Out, STI) ? MER_Fail return expandAliasImmediate(Inst, IDLoc, Out, STI) ? MER_Fail
: MER_Success; : MER_Success;
} }
return MER_NotAMacro; return MER_NotAMacro;
case Mips::ANDi: case Mips::ANDi_MM: case Mips::ANDi: case Mips::ANDi_MM: case Mips::ANDi64:
case Mips::ORi: case Mips::ORi_MM: case Mips::ORi: case Mips::ORi_MM: case Mips::ORi64:
case Mips::XORi: case Mips::XORi_MM: case Mips::XORi: case Mips::XORi_MM: case Mips::XORi64:
if ((Inst.getNumOperands() == 3) && Inst.getOperand(0).isReg() && if ((Inst.getNumOperands() == 3) && Inst.getOperand(0).isReg() &&
Inst.getOperand(1).isReg() && Inst.getOperand(2).isImm()) { Inst.getOperand(1).isReg() && Inst.getOperand(2).isImm()) {
int64_t ImmValue = Inst.getOperand(2).getImm(); int64_t ImmValue = Inst.getOperand(2).getImm();
if (isUInt<16>(ImmValue)) if (isUInt<16>(ImmValue))
return MER_NotAMacro; return MER_NotAMacro;
return expandAliasImmediate(Inst, IDLoc, Out, STI) ? MER_Fail return expandAliasImmediate(Inst, IDLoc, Out, STI) ? MER_Fail
: MER_Success; : MER_Success;
} }
▲ Show 20 Lines • Show All 170 Lines • ▼ Show 20 Lines if (isUInt<16>(ImmValue)) {
return false; return false;
} }
if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) {
warnIfNoMacro(IDLoc); warnIfNoMacro(IDLoc);
uint16_t Bits31To16 = (ImmValue >> 16) & 0xffff; uint16_t Bits31To16 = (ImmValue >> 16) & 0xffff;
uint16_t Bits15To0 = ImmValue & 0xffff; uint16_t Bits15To0 = ImmValue & 0xffff;
if (!Is32BitImm && !isInt<32>(ImmValue)) { if (!Is32BitImm && !isInt<32>(ImmValue)) {
// Traditional behaviour seems to special case this particular value. It's // Traditional behaviour seems to special case this particular value. It's
// not clear why other masks are handled differently. // not clear why other masks are handled differently.
if (ImmValue == 0xffffffff) { if (ImmValue == 0xffffffff) {
TOut.emitRI(Mips::LUi, TmpReg, 0xffff, IDLoc, STI); TOut.emitRI(Mips::LUi, TmpReg, 0xffff, IDLoc, STI);
TOut.emitRRI(Mips::DSRL32, TmpReg, TmpReg, 0, IDLoc, STI); TOut.emitRRI(Mips::DSRL32, TmpReg, TmpReg, 0, IDLoc, STI);
if (UseSrcReg) if (UseSrcReg)
TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI); TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI);
▲ Show 20 Lines • Show All 1,207 Lines • ▼ Show 20 Lines assert(Inst.getOperand(0).isReg() &&
Inst.getOperand(2).isImm() && "Invalid instruction operand."); Inst.getOperand(2).isImm() && "Invalid instruction operand.");
unsigned ATReg = Mips::NoRegister; unsigned ATReg = Mips::NoRegister;
unsigned FinalDstReg = Mips::NoRegister; unsigned FinalDstReg = Mips::NoRegister;
unsigned DstReg = Inst.getOperand(0).getReg(); unsigned DstReg = Inst.getOperand(0).getReg();
unsigned SrcReg = Inst.getOperand(1).getReg(); unsigned SrcReg = Inst.getOperand(1).getReg();
int64_t ImmValue = Inst.getOperand(2).getImm(); int64_t ImmValue = Inst.getOperand(2).getImm();
bool Is32Bit = isInt<32>(ImmValue) || isUInt<32>(ImmValue); bool Is32Bit = isInt<32>(ImmValue) || (!isGP64bit() && isUInt<32>(ImmValue));
unsigned FinalOpcode = Inst.getOpcode(); unsigned FinalOpcode = Inst.getOpcode();
if (DstReg == SrcReg) { if (DstReg == SrcReg) {
ATReg = getATReg(Inst.getLoc()); ATReg = getATReg(Inst.getLoc());
if (!ATReg) if (!ATReg)
return true; return true;
FinalDstReg = DstReg; FinalDstReg = DstReg;
DstReg = ATReg; DstReg = ATReg;
} }
if (!loadImmediate(ImmValue, DstReg, Mips::NoRegister, Is32Bit, false, Inst.getLoc(), Out, STI)) { if (!loadImmediate(ImmValue, DstReg, Mips::NoRegister, Is32Bit, false, Inst.getLoc(), Out, STI)) {
switch (FinalOpcode) { switch (FinalOpcode) {
default: default:
llvm_unreachable("unimplemented expansion"); llvm_unreachable("unimplemented expansion");
case Mips::ADDi: case Mips::ADDi:
FinalOpcode = Mips::ADD; FinalOpcode = Mips::ADD;
break; break;
case Mips::ADDiu: case Mips::ADDiu:
FinalOpcode = Mips::ADDu; FinalOpcode = Mips::ADDu;
break; break;
case Mips::ANDi: case Mips::ANDi:
FinalOpcode = Mips::AND; FinalOpcode = Mips::AND;
break; break;
case Mips::NORImm: case Mips::NORImm:
FinalOpcode = Mips::NOR; FinalOpcode = Mips::NOR;
break; break;
case Mips::ORi: case Mips::ORi:
FinalOpcode = Mips::OR; FinalOpcode = Mips::OR;
break; break;
case Mips::SLTi: case Mips::SLTi:
FinalOpcode = Mips::SLT; FinalOpcode = Mips::SLT;
break; break;
case Mips::SLTiu: case Mips::SLTiu:
FinalOpcode = Mips::SLTu; FinalOpcode = Mips::SLTu;
break; break;
case Mips::XORi: case Mips::XORi:
FinalOpcode = Mips::XOR; FinalOpcode = Mips::XOR;
break; break;
case Mips::ADDi_MM: case Mips::ADDi_MM:
sdardisUnsubmitted
Done
ReplyInline Actions

For the 64 bit case, you need to pick the corresponding 64 bit instruction definition. Picking the 32 bit version introduces a very subtle bug in that the instruction emitted will be (harmless) malformed.

sdardis: For the 64 bit case, you need to pick the corresponding 64 bit instruction definition. Picking…
FinalOpcode = Mips::ADD_MM; FinalOpcode = Mips::ADD_MM;
break; break;
case Mips::ADDiu_MM: case Mips::ADDiu_MM:
FinalOpcode = Mips::ADDu_MM; FinalOpcode = Mips::ADDu_MM;
break; break;
case Mips::ANDi_MM: case Mips::ANDi_MM:
FinalOpcode = Mips::AND_MM; FinalOpcode = Mips::AND_MM;
break; break;
case Mips::ORi_MM: case Mips::ORi_MM:
FinalOpcode = Mips::OR_MM; FinalOpcode = Mips::OR_MM;
break; break;
case Mips::SLTi_MM: case Mips::SLTi_MM:
FinalOpcode = Mips::SLT_MM; FinalOpcode = Mips::SLT_MM;
break; break;
case Mips::SLTiu_MM: case Mips::SLTiu_MM:
FinalOpcode = Mips::SLTu_MM; FinalOpcode = Mips::SLTu_MM;
break; break;
case Mips::XORi_MM: case Mips::XORi_MM:
FinalOpcode = Mips::XOR_MM; FinalOpcode = Mips::XOR_MM;
break; break;
case Mips::ANDi64:
FinalOpcode = Mips::AND64;
break;
case Mips::ORi64:
FinalOpcode = Mips::OR64;
break;
case Mips::XORi64:
FinalOpcode = Mips::XOR64;
break;
} }
if (FinalDstReg == Mips::NoRegister) if (FinalDstReg == Mips::NoRegister)
TOut.emitRRR(FinalOpcode, DstReg, DstReg, SrcReg, IDLoc, STI); TOut.emitRRR(FinalOpcode, DstReg, DstReg, SrcReg, IDLoc, STI);
else else
TOut.emitRRR(FinalOpcode, FinalDstReg, FinalDstReg, DstReg, IDLoc, STI); TOut.emitRRR(FinalOpcode, FinalDstReg, FinalDstReg, DstReg, IDLoc, STI);
return false; return false;
} }
▲ Show 20 Lines • Show All 3,333 Lines • Show Last 20 Lines

lib/Target/Mips/Mips64InstrInfo.td

Show First 20 Lines • Show All 701 Lines • ▼ Show 20 Lines def : MipsInstAlias<"dadd $rs, $imm",
(DADDi GPR64Opnd:$rs, GPR64Opnd:$rs, simm16_64:$imm), (DADDi GPR64Opnd:$rs, GPR64Opnd:$rs, simm16_64:$imm),
0>, ISA_MIPS3_NOT_32R6_64R6; 0>, ISA_MIPS3_NOT_32R6_64R6;
def : MipsInstAlias<"daddu $rs, $rt, $imm", def : MipsInstAlias<"daddu $rs, $rt, $imm",
(DADDiu GPR64Opnd:$rs, GPR64Opnd:$rt, simm16_64:$imm), (DADDiu GPR64Opnd:$rs, GPR64Opnd:$rt, simm16_64:$imm),
0>, ISA_MIPS3; 0>, ISA_MIPS3;
def : MipsInstAlias<"daddu $rs, $imm", def : MipsInstAlias<"daddu $rs, $imm",
(DADDiu GPR64Opnd:$rs, GPR64Opnd:$rs, simm16_64:$imm), (DADDiu GPR64Opnd:$rs, GPR64Opnd:$rs, simm16_64:$imm),
0>, ISA_MIPS3; 0>, ISA_MIPS3;
defm : OneOrTwoOperandMacroImmediateAlias<"and", ANDi64, GPR64Opnd, imm64>;
defm : OneOrTwoOperandMacroImmediateAlias<"or", ORi64, GPR64Opnd, imm64>;
defm : OneOrTwoOperandMacroImmediateAlias<"xor", XORi64, GPR64Opnd, imm64>;
sdardisUnsubmitted
Done
ReplyInline Actions

These need to be guarded by GPR_64.

sdardis: These need to be guarded by GPR_64.
} }
def : MipsInstAlias<"dsll $rd, $rt, $rs", def : MipsInstAlias<"dsll $rd, $rt, $rs",
(DSLLV GPR64Opnd:$rd, GPR64Opnd:$rt, GPR32Opnd:$rs), 0>, (DSLLV GPR64Opnd:$rd, GPR64Opnd:$rt, GPR32Opnd:$rs), 0>,
ISA_MIPS3; ISA_MIPS3;
let AdditionalPredicates = [NotInMicroMips] in { let AdditionalPredicates = [NotInMicroMips] in {
def : MipsInstAlias<"dneg $rt, $rs", def : MipsInstAlias<"dneg $rt, $rs",
(DSUB GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rs), 1>, (DSUB GPR64Opnd:$rt, ZERO_64, GPR64Opnd:$rs), 1>,
ISA_MIPS3; ISA_MIPS3;
▲ Show 20 Lines • Show All 165 Lines • Show Last 20 Lines

lib/Target/Mips/MipsInstrInfo.td

Show First 20 Lines • Show All 2,315 Lines • ▼ Show 20 Linesdef MULOUMacro : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rd, GPR32Opnd:$rs,
GPR32Opnd:$rt), GPR32Opnd:$rt),
"mulou\t$rd, $rs, $rt">, "mulou\t$rd, $rs, $rt">,
ISA_MIPS1_NOT_32R6_64R6; ISA_MIPS1_NOT_32R6_64R6;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Instruction aliases // Instruction aliases
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
multiclass OneOrTwoOperandMacroImmediateAlias<string Memnomic, multiclass OneOrTwoOperandMacroImmediateAlias<string Memnomic,
Instruction Opcode> { Instruction Opcode,
RegisterOperand RO = GPR32Opnd,
Operand Imm = simm32_relaxed> {
def : MipsInstAlias<!strconcat(Memnomic, " $rs, $rt, $imm"), def : MipsInstAlias<!strconcat(Memnomic, " $rs, $rt, $imm"),
sdardisUnsubmitted
Not Done
ReplyInline Actions

Add another parameter here which defaults to RO, use it with $rs.

Then you can modify just the macro definitions for slt and sltu to produce a result as a GPR32Opnd.

sdardis: Add another parameter here which defaults to RO, use it with $rs. Then you can modify just the…
(Opcode GPR32Opnd:$rs, (Opcode RO:$rs,
GPR32Opnd:$rt, RO:$rt,
simm32_relaxed:$imm), 0>; Imm:$imm), 0>;
def : MipsInstAlias<!strconcat(Memnomic, " $rs, $imm"), def : MipsInstAlias<!strconcat(Memnomic, " $rs, $imm"),
(Opcode GPR32Opnd:$rs, (Opcode RO:$rs,
GPR32Opnd:$rs, RO:$rs,
simm32_relaxed:$imm), 0>; Imm:$imm), 0>;
} }
def : MipsInstAlias<"move $dst, $src", def : MipsInstAlias<"move $dst, $src",
(OR GPR32Opnd:$dst, GPR32Opnd:$src, ZERO), 1>, (OR GPR32Opnd:$dst, GPR32Opnd:$src, ZERO), 1>,
GPR_32 { GPR_32 {
let AdditionalPredicates = [NotInMicroMips]; let AdditionalPredicates = [NotInMicroMips];
} }
def : MipsInstAlias<"move $dst, $src", def : MipsInstAlias<"move $dst, $src",
Show All 37 Lines def : MipsInstAlias<
"not $rt", "not $rt",
(NOR GPR32Opnd:$rt, GPR32Opnd:$rt, ZERO), 0>; (NOR GPR32Opnd:$rt, GPR32Opnd:$rt, ZERO), 0>;
def : MipsInstAlias<"nop", (SLL ZERO, ZERO, 0), 1>; def : MipsInstAlias<"nop", (SLL ZERO, ZERO, 0), 1>;
defm : OneOrTwoOperandMacroImmediateAlias<"add", ADDi>, ISA_MIPS1_NOT_32R6_64R6; defm : OneOrTwoOperandMacroImmediateAlias<"add", ADDi>, ISA_MIPS1_NOT_32R6_64R6;
defm : OneOrTwoOperandMacroImmediateAlias<"addu", ADDiu>; defm : OneOrTwoOperandMacroImmediateAlias<"addu", ADDiu>;
defm : OneOrTwoOperandMacroImmediateAlias<"and", ANDi>; defm : OneOrTwoOperandMacroImmediateAlias<"and", ANDi>, GPR_32;
defm : OneOrTwoOperandMacroImmediateAlias<"or", ORi>; defm : OneOrTwoOperandMacroImmediateAlias<"or", ORi>, GPR_32;
defm : OneOrTwoOperandMacroImmediateAlias<"xor", XORi>; defm : OneOrTwoOperandMacroImmediateAlias<"xor", XORi>, GPR_32;
defm : OneOrTwoOperandMacroImmediateAlias<"slt", SLTi>; defm : OneOrTwoOperandMacroImmediateAlias<"slt", SLTi>;
defm : OneOrTwoOperandMacroImmediateAlias<"sltu", SLTiu>; defm : OneOrTwoOperandMacroImmediateAlias<"sltu", SLTiu>;
} }
def : MipsInstAlias<"mfc0 $rt, $rd", (MFC0 GPR32Opnd:$rt, COP0Opnd:$rd, 0), 0>; def : MipsInstAlias<"mfc0 $rt, $rd", (MFC0 GPR32Opnd:$rt, COP0Opnd:$rd, 0), 0>;
def : MipsInstAlias<"mtc0 $rt, $rd", (MTC0 COP0Opnd:$rd, GPR32Opnd:$rt, 0), 0>; def : MipsInstAlias<"mtc0 $rt, $rd", (MTC0 COP0Opnd:$rd, GPR32Opnd:$rt, 0), 0>;
def : MipsInstAlias<"mfc2 $rt, $rd", (MFC2 GPR32Opnd:$rt, COP2Opnd:$rd, 0), 0>; def : MipsInstAlias<"mfc2 $rt, $rd", (MFC2 GPR32Opnd:$rt, COP2Opnd:$rd, 0), 0>;
▲ Show 20 Lines • Show All 524 Lines • Show Last 20 Lines

test/MC/Mips/mips64-instalias-imm-expanding-broken.s

  • This file was added.
# RUN: llvm-mc -triple mips64el-unknown-linux -show-encoding -print-imm-hex %s | FileCheck %s
# XFAIL: *
.text
text_label:
# CHECK: text_label:
nor $4, $5, 0
# CHECK: addiu $4, $zero, 0x0 # encoding: [0x00,0x00,0x04,0x24]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 1
# CHECK-NEXT: addiu $4, $zero, 0x1 # encoding: [0x01,0x00,0x04,0x24]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x8000
# CHECK-NEXT: ori $4, $zero, 0x8000 # encoding: [0x00,0x80,0x04,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, -0x8000
# CHECK-NEXT: addiu $4, $zero, -0x8000 # encoding: [0x00,0x80,0x04,0x24]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x1a5a5
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xa5a5 # encoding: [0xa5,0xa5,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xFFFFFFFF
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: dsrl32 $4, $4, 0x0 # encoding: [0x3e,0x20,0x04,0x00]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xF0000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x7FFFFFFF
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0x7FFFFFFFFFFFFFFF
# FIXME: this is awfully inefficient...
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xF000000000000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x30 # encoding: [0x3c,0x24,0x04,0x00]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff # encoding: [0xff,0x00,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff0f # encoding: [0x0f,0xff,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
nor $4, $5, 0xff00ff00
# CHECK-NEXT: ori $4, $zero, 0xff00 # encoding: [0x00,0xff,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff00 # encoding: [0x00,0xff,0x84,0x34]
# CHECK-NEXT: nor $4, $4, $5 # encoding: [0x27,0x20,0x85,0x00]
slt $4, $5, -0x80000000
# CHECK: lui $4, 0x8000 # encoding: [0x00,0x80,0x04,0x3c]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, -0x8001
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0x7fff # encoding: [0xff,0x7f,0x84,0x34]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, -0x8000
# CHECK-NEXT: slti $4, $5, -0x8000 # encoding: [0x00,0x80,0xa4,0x28]
slt $4, $5, 0
# CHECK-NEXT: slti $4, $5, 0x0 # encoding: [0x00,0x00,0xa4,0x28]
slt $4, $5, 0xFFFF
# CHECK-NEXT: ori $4, $zero, 0xffff # encoding: [0xff,0xff,0x04,0x34]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: slt $4, $4, $5 # encoding: [0x2a,0x20,0x85,0x00]
slt $4, $5, 0xFFFFFFFF
# CHECK-NOT: slti $4, $5, -0x1 # encoding: [0xff,0xff,0xa4,0x28]
sltu $4, $5, -0x80000000
# CHECK: lui $4, 0x8000 # encoding: [0x00,0x80,0x04,0x3c]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, -0x8001
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0x7fff # encoding: [0xff,0x7f,0x84,0x34]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, -0x8000
# CHECK-NEXT: sltiu $4, $5, -0x8000 # encoding: [0x00,0x80,0xa4,0x2c]
sltu $4, $5, 0
# CHECK-NEXT: sltiu $4, $5, 0x0 # encoding: [0x00,0x00,0xa4,0x2c]
sltu $4, $5, 0xFFFF
# CHECK-NEXT: ori $4, $zero, 0xffff # encoding: [0xff,0xff,0x04,0x34]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
sltu $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: sltu $4, $4, $5 # encoding: [0x2b,0x20,0x85,0x00]
# FIXME: should this be sign extended or not???
sltu $4, $5, 0xFFFFFFFF
# CHECK-NOT: sltiu $4, $5, -0x1 # encoding: [0xff,0xff,0xa4,0x2c]

test/MC/Mips/mips64-instalias-imm-expanding.s

  • This file was added.
# RUN: llvm-mc -triple mips64el-unknown-linux -show-encoding -print-imm-hex %s | FileCheck %s
.text
text_label:
# CHECK: text_label:
add $4, -0x80000000
# CHECK-NEXT: lui $1, 0x8000 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-NEXT: add $4, $4, $1 # encoding: [0x20,0x20,0x81,0x00]
add $4, -0x8001
# CHECK-NEXT: lui $1, 0xffff # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0x7fff # encoding: [0xff,0x7f,0x21,0x34]
# CHECK-NEXT: add $4, $4, $1 # encoding: [0x20,0x20,0x81,0x00]
add $4, -0x8000
# CHECK-NEXT: addi $4, $4, -0x8000 # encoding: [0x00,0x80,0x84,0x20]
add $4, 0
# CHECK-NEXT: addi $4, $4, 0x0 # encoding: [0x00,0x00,0x84,0x20]
add $4, 0xFFFF
# CHECK-NEXT: ori $1, $zero, 0xffff # encoding: [0xff,0xff,0x01,0x34]
# CHECK-NEXT: add $4, $4, $1 # encoding: [0x20,0x20,0x81,0x00]
add $4, 0x10000
# CHECK-NEXT: lui $1, 0x1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NEXT: add $4, $4, $1 # encoding: [0x20,0x20,0x81,0x00]
add $4, 0xFFFFFFFF # This should be sign-extended because it's a 32-bit add
# CHECK-NEXT: addi $4, $4, -0x1 # encoding: [0xff,0xff,0x84,0x20]
add $4, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: lui $1, 0xff # encoding: [0xff,0x00,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xff0f # encoding: [0x0f,0xff,0x21,0x34]
# CHECK-NEXT: add $4, $4, $1 # encoding: [0x20,0x20,0x81,0x00]
add $4, $5, -0x80000000
# CHECK: lui $4, 0x8000 # encoding: [0x00,0x80,0x04,0x3c]
# CHECK-NEXT: add $4, $4, $5 # encoding: [0x20,0x20,0x85,0x00]
add $4, $5, -0x8001
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0x7fff # encoding: [0xff,0x7f,0x84,0x34]
# CHECK-NEXT: add $4, $4, $5 # encoding: [0x20,0x20,0x85,0x00]
add $4, $5, -0x8000
# CHECK-NEXT: addi $4, $5, -0x8000 # encoding: [0x00,0x80,0xa4,0x20]
add $4, $5, 0
# CHECK-NEXT: addi $4, $5, 0x0 # encoding: [0x00,0x00,0xa4,0x20]
add $4, $5, 0xFFFF
# CHECK-NEXT: ori $4, $zero, 0xffff # encoding: [0xff,0xff,0x04,0x34]
# CHECK-NEXT: add $4, $4, $5 # encoding: [0x20,0x20,0x85,0x00]
add $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: add $4, $4, $5 # encoding: [0x20,0x20,0x85,0x00]
add $4, $5, 0xFFFFFFFF # This should be sign-extended because it's a 32-bit addi
# CHECK-NEXT: addi $4, $5, -0x1 # encoding: [0xff,0xff,0xa4,0x20]
add $4, $5, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: lui $4, 0xff # encoding: [0xff,0x00,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xff0f # encoding: [0x0f,0xff,0x84,0x34]
# CHECK-NEXT: add $4, $4, $5 # encoding: [0x20,0x20,0x85,0x00]
addu $4, -0x80000000
# CHECK: lui $1, 0x8000 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-NEXT: addu $4, $4, $1 # encoding: [0x21,0x20,0x81,0x00]
addu $4, -0x8001
# CHECK-NEXT: lui $1, 0xffff # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0x7fff # encoding: [0xff,0x7f,0x21,0x34]
# CHECK-NEXT: addu $4, $4, $1 # encoding: [0x21,0x20,0x81,0x00]
addu $4, -0x8000
# CHECK-NEXT: addiu $4, $4, -0x8000 # encoding: [0x00,0x80,0x84,0x24]
addu $4, 0
# CHECK-NEXT: addiu $4, $4, 0x0 # encoding: [0x00,0x00,0x84,0x24]
addu $4, 0xFFFF
# CHECK-NEXT: ori $1, $zero, 0xffff # encoding: [0xff,0xff,0x01,0x34]
# CHECK-NEXT: addu $4, $4, $1 # encoding: [0x21,0x20,0x81,0x00]
addu $4, 0x10000
# CHECK-NEXT: lui $1, 0x1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NEXT: addu $4, $4, $1 # encoding: [0x21,0x20,0x81,0x00]
addu $4, 0xFFFFFFFF # This should be sign-extended because it's a 32-bit add
# CHECK-NEXT: addiu $4, $4, -0x1 # encoding: [0xff,0xff,0x84,0x24]
addu $4, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: lui $1, 0xff # encoding: [0xff,0x00,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xff0f # encoding: [0x0f,0xff,0x21,0x34]
# CHECK-NEXT: addu $4, $4, $1 # encoding: [0x21,0x20,0x81,0x00]
addu $4, $5, -0x80000000
# CHECK: lui $4, 0x8000 # encoding: [0x00,0x80,0x04,0x3c]
# CHECK-NEXT: addu $4, $4, $5 # encoding: [0x21,0x20,0x85,0x00]
addu $4, $5, -0x8001
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0x7fff # encoding: [0xff,0x7f,0x84,0x34]
# CHECK-NEXT: addu $4, $4, $5 # encoding: [0x21,0x20,0x85,0x00]
addu $4, $5, -0x8000
# CHECK-NEXT: addiu $4, $5, -0x8000 # encoding: [0x00,0x80,0xa4,0x24]
addu $4, $5, 0
# CHECK-NEXT: addiu $4, $5, 0x0 # encoding: [0x00,0x00,0xa4,0x24]
addu $4, $5, 0xFFFF
# CHECK-NEXT: ori $4, $zero, 0xffff # encoding: [0xff,0xff,0x04,0x34]
# CHECK-NEXT: addu $4, $4, $5 # encoding: [0x21,0x20,0x85,0x00]
addu $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: addu $4, $4, $5 # encoding: [0x21,0x20,0x85,0x00]
addu $4, $5, 0xFFFFFFFF # This should be sign-extended because it's a 32-bit add
# CHECK-NEXT: addiu $4, $5, -0x1 # encoding: [0xff,0xff,0xa4,0x24]
addu $4, $5, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: lui $4, 0xff # encoding: [0xff,0x00,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xff0f # encoding: [0x0f,0xff,0x84,0x34]
# CHECK-NEXT: addu $4, $4, $5 # encoding: [0x21,0x20,0x85,0x00]
and $4, -0x80000000
# CHECK: lui $1, 0x8000 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-NEXT: and $4, $4, $1 # encoding: [0x24,0x20,0x81,0x00]
and $4, -0x8001
# CHECK-NEXT: lui $1, 0xffff # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0x7fff # encoding: [0xff,0x7f,0x21,0x34]
# CHECK-NEXT: and $4, $4, $1 # encoding: [0x24,0x20,0x81,0x00]
and $4, -0x8000
# CHECK-NEXT: addiu $1, $zero, -0x8000 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NEXT: and $4, $4, $1 # encoding: [0x24,0x20,0x81,0x00]
and $4, 0
# CHECK-NEXT: andi $4, $4, 0x0 # encoding: [0x00,0x00,0x84,0x30]
and $4, 0xFFFF
# CHECK-NEXT: andi $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x30]
and $4, 0x10000
# CHECK-NEXT: lui $1, 0x1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NEXT: and $4, $4, $1 # encoding: [0x24,0x20,0x81,0x00]
and $4, 0xFFFFFFFF
# CHECK-NEXT: lui $1, 0xffff # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-NEXT: dsrl32 $1, $1, 0x0 # encoding: [0x3e,0x08,0x01,0x00]
# CHECK-NEXT: and $4, $4, $1 # encoding: [0x24,0x20,0x81,0x00]
and $4, 0xF0000000
# CHECK-NEXT: ori $1, $zero, 0xf000 # encoding: [0x00,0xf0,0x01,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: and $4, $4, $1 # encoding: [0x24,0x20,0x81,0x00]
and $4, 0x7FFFFFFF
# CHECK-NEXT: lui $1, 0x7fff # encoding: [0xff,0x7f,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: and $4, $4, $1 # encoding: [0x24,0x20,0x81,0x00]
and $4, 0x7FFFFFFFFFFFFFFF
# CHECK-NEXT: lui $1, 0x7fff # encoding: [0xff,0x7f,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: and $4, $4, $1 # encoding: [0x24,0x20,0x81,0x00]
and $4, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: addiu $1, $zero, -0x1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NEXT: and $4, $4, $1 # encoding: [0x24,0x20,0x81,0x00]
and $4, 0xF000000000000000
# CHECK-NEXT: ori $1, $zero, 0xf000 # encoding: [0x00,0xf0,0x01,0x34]
# CHECK-NEXT: dsll $1, $1, 0x30 # encoding: [0x3c,0x0c,0x01,0x00]
# CHECK-NEXT: and $4, $4, $1 # encoding: [0x24,0x20,0x81,0x00]
and $4, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $1, $zero, -0x1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xff # encoding: [0xff,0x00,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xff0f # encoding: [0x0f,0xff,0x21,0x34]
# CHECK-NEXT: and $4, $4, $1 # encoding: [0x24,0x20,0x81,0x00]
and $4, $5, -0x80000000
# CHECK: lui $4, 0x8000 # encoding: [0x00,0x80,0x04,0x3c]
# CHECK-NEXT: and $4, $4, $5 # encoding: [0x24,0x20,0x85,0x00]
and $4, $5, -0x8001
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0x7fff # encoding: [0xff,0x7f,0x84,0x34]
# CHECK-NEXT: and $4, $4, $5 # encoding: [0x24,0x20,0x85,0x00]
and $4, $5, -0x8000
# CHECK-NEXT: addiu $4, $zero, -0x8000 # encoding: [0x00,0x80,0x04,0x24]
# CHECK-NEXT: and $4, $4, $5 # encoding: [0x24,0x20,0x85,0x00]
and $4, $5, 0
# CHECK-NEXT: andi $4, $5, 0x0 # encoding: [0x00,0x00,0xa4,0x30]
and $4, $5, 0xFFFF
# CHECK-NEXT: andi $4, $5, 0xffff # encoding: [0xff,0xff,0xa4,0x30]
and $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: and $4, $4, $5 # encoding: [0x24,0x20,0x85,0x00]
and $4, $5, 0xFFFFFFFF
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: dsrl32 $4, $4, 0x0 # encoding: [0x3e,0x20,0x04,0x00]
# CHECK-NEXT: and $4, $4, $5 # encoding: [0x24,0x20,0x85,0x00]
and $4, $5, 0xF0000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: and $4, $4, $5 # encoding: [0x24,0x20,0x85,0x00]
and $4, $5, 0x7FFFFFFF
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: and $4, $4, $5 # encoding: [0x24,0x20,0x85,0x00]
and $4, $5, 0x7FFFFFFFFFFFFFFF
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: and $4, $4, $5 # encoding: [0x24,0x20,0x85,0x00]
and $4, $5, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: and $4, $4, $5 # encoding: [0x24,0x20,0x85,0x00]
and $4, $5, 0xF000000000000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x30 # encoding: [0x3c,0x24,0x04,0x00]
# CHECK-NEXT: and $4, $4, $5 # encoding: [0x24,0x20,0x85,0x00]
and $4, $5, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff # encoding: [0xff,0x00,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff0f # encoding: [0x0f,0xff,0x84,0x34]
# CHECK-NEXT: and $4, $4, $5 # encoding: [0x24,0x20,0x85,0x00]
or $4, -0x80000000
# CHECK: lui $1, 0x8000 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-NEXT: or $4, $4, $1 # encoding: [0x25,0x20,0x81,0x00]
or $4, -0x8001
# CHECK-NEXT: lui $1, 0xffff # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0x7fff # encoding: [0xff,0x7f,0x21,0x34]
# CHECK-NEXT: or $4, $4, $1 # encoding: [0x25,0x20,0x81,0x00]
or $4, -0x8000
# CHECK-NEXT: addiu $1, $zero, -0x8000 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NEXT: or $4, $4, $1 # encoding: [0x25,0x20,0x81,0x00]
or $4, 0
# CHECK-NEXT: ori $4, $4, 0x0 # encoding: [0x00,0x00,0x84,0x34]
or $4, 0xFFFF
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
or $4, 0x10000
# CHECK-NEXT: lui $1, 0x1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NEXT: or $4, $4, $1 # encoding: [0x25,0x20,0x81,0x00]
or $4, 0xFFFFFFFF
# CHECK-NEXT: lui $1, 0xffff # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-NEXT: dsrl32 $1, $1, 0x0 # encoding: [0x3e,0x08,0x01,0x00]
# CHECK-NEXT: or $4, $4, $1 # encoding: [0x25,0x20,0x81,0x00]
or $4, 0xF0000000
# CHECK-NEXT: ori $1, $zero, 0xf000 # encoding: [0x00,0xf0,0x01,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: or $4, $4, $1 # encoding: [0x25,0x20,0x81,0x00]
or $4, 0x7FFFFFFF
# CHECK-NEXT: lui $1, 0x7fff # encoding: [0xff,0x7f,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: or $4, $4, $1 # encoding: [0x25,0x20,0x81,0x00]
or $4, 0x7FFFFFFFFFFFFFFF
# CHECK-NEXT: lui $1, 0x7fff # encoding: [0xff,0x7f,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: or $4, $4, $1 # encoding: [0x25,0x20,0x81,0x00]
or $4, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: addiu $1, $zero, -0x1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NEXT: or $4, $4, $1 # encoding: [0x25,0x20,0x81,0x00]
or $4, 0xF000000000000000
# CHECK-NEXT: ori $1, $zero, 0xf000 # encoding: [0x00,0xf0,0x01,0x34]
# CHECK-NEXT: dsll $1, $1, 0x30 # encoding: [0x3c,0x0c,0x01,0x00]
# CHECK-NEXT: or $4, $4, $1 # encoding: [0x25,0x20,0x81,0x00]
or $4, $5, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff # encoding: [0xff,0x00,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff0f # encoding: [0x0f,0xff,0x84,0x34]
# CHECK-NEXT: or $4, $4, $5 # encoding: [0x25,0x20,0x85,0x00]
or $4, $5, -0x80000000
# CHECK: lui $4, 0x8000 # encoding: [0x00,0x80,0x04,0x3c]
# CHECK-NEXT: or $4, $4, $5 # encoding: [0x25,0x20,0x85,0x00]
or $4, $5, -0x8001
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0x7fff # encoding: [0xff,0x7f,0x84,0x34]
# CHECK-NEXT: or $4, $4, $5 # encoding: [0x25,0x20,0x85,0x00]
or $4, $5, -0x8000
# CHECK-NEXT: addiu $4, $zero, -0x8000 # encoding: [0x00,0x80,0x04,0x24]
# CHECK-NEXT: or $4, $4, $5 # encoding: [0x25,0x20,0x85,0x00]
or $4, $5, 0
# CHECK-NEXT: ori $4, $5, 0x0 # encoding: [0x00,0x00,0xa4,0x34]
or $4, $5, 0xFFFF
# CHECK-NEXT: ori $4, $5, 0xffff # encoding: [0xff,0xff,0xa4,0x34]
or $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: or $4, $4, $5 # encoding: [0x25,0x20,0x85,0x00]
or $4, $5, 0xFFFFFFFF
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: dsrl32 $4, $4, 0x0 # encoding: [0x3e,0x20,0x04,0x00]
# CHECK-NEXT: or $4, $4, $5 # encoding: [0x25,0x20,0x85,0x00]
or $4, $5, 0xF0000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: or $4, $4, $5 # encoding: [0x25,0x20,0x85,0x00]
or $4, $5, 0x7FFFFFFF
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: or $4, $4, $5 # encoding: [0x25,0x20,0x85,0x00]
or $4, $5, 0x7FFFFFFFFFFFFFFF
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: or $4, $4, $5 # encoding: [0x25,0x20,0x85,0x00]
or $4, $5, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: or $4, $4, $5 # encoding: [0x25,0x20,0x85,0x00]
or $4, $5, 0xF000000000000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x30 # encoding: [0x3c,0x24,0x04,0x00]
# CHECK-NEXT: or $4, $4, $5 # encoding: [0x25,0x20,0x85,0x00]
or $4, $5, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff # encoding: [0xff,0x00,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff0f # encoding: [0x0f,0xff,0x84,0x34]
# CHECK-NEXT: or $4, $4, $5 # encoding: [0x25,0x20,0x85,0x00]
xor $4, -0x80000000
# CHECK: lui $1, 0x8000 # encoding: [0x00,0x80,0x01,0x3c]
# CHECK-NEXT: xor $4, $4, $1 # encoding: [0x26,0x20,0x81,0x00]
xor $4, -0x8001
# CHECK-NEXT: lui $1, 0xffff # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0x7fff # encoding: [0xff,0x7f,0x21,0x34]
# CHECK-NEXT: xor $4, $4, $1 # encoding: [0x26,0x20,0x81,0x00]
xor $4, -0x8000
# CHECK-NEXT: addiu $1, $zero, -0x8000 # encoding: [0x00,0x80,0x01,0x24]
# CHECK-NEXT: xor $4, $4, $1 # encoding: [0x26,0x20,0x81,0x00]
xor $4, 0
# CHECK-NEXT: xori $4, $4, 0x0 # encoding: [0x00,0x00,0x84,0x38]
xor $4, 0xFFFF
# CHECK-NEXT: xori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x38]
xor $4, 0x10000
# CHECK-NEXT: lui $1, 0x1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-NEXT: xor $4, $4, $1 # encoding: [0x26,0x20,0x81,0x00]
xor $4, 0xFFFFFFFF
# CHECK-NEXT: lui $1, 0xffff # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-NEXT: dsrl32 $1, $1, 0x0 # encoding: [0x3e,0x08,0x01,0x00]
# CHECK-NEXT: xor $4, $4, $1 # encoding: [0x26,0x20,0x81,0x00]
xor $4, 0xF0000000
# CHECK-NEXT: ori $1, $zero, 0xf000 # encoding: [0x00,0xf0,0x01,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: xor $4, $4, $1 # encoding: [0x26,0x20,0x81,0x00
xor $4, 0x7FFFFFFF
# CHECK-NEXT: lui $1, 0x7fff # encoding: [0xff,0x7f,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: xor $4, $4, $1 # encoding: [0x26,0x20,0x81,0x00]
xor $4, 0x7FFFFFFFFFFFFFFF
# CHECK-NEXT: lui $1, 0x7fff # encoding: [0xff,0x7f,0x01,0x3c]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xffff # encoding: [0xff,0xff,0x21,0x34]
# CHECK-NEXT: xor $4, $4, $1 # encoding: [0x26,0x20,0x81,0x00]
xor $4, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: addiu $1, $zero, -0x1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NEXT: xor $4, $4, $1 # encoding: [0x26,0x20,0x81,0x00]
xor $4, 0xF000000000000000
# CHECK-NEXT: ori $1, $zero, 0xf000 # encoding: [0x00,0xf0,0x01,0x34]
# CHECK-NEXT: dsll $1, $1, 0x30 # encoding: [0x3c,0x0c,0x01,0x00]
# CHECK-NEXT: xor $4, $4, $1 # encoding: [0x26,0x20,0x81,0x00]
xor $4, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $1, $zero, -0x1 # encoding: [0xff,0xff,0x01,0x24]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xff # encoding: [0xff,0x00,0x21,0x34]
# CHECK-NEXT: dsll $1, $1, 0x10 # encoding: [0x38,0x0c,0x01,0x00]
# CHECK-NEXT: ori $1, $1, 0xff0f # encoding: [0x0f,0xff,0x21,0x34]
# CHECK-NEXT: xor $4, $4, $1 # encoding: [0x26,0x20,0x81,0x00]
xor $4, $5, -0x80000000
# CHECK: lui $4, 0x8000 # encoding: [0x00,0x80,0x04,0x3c]
# CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00]
xor $4, $5, -0x8001
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0x7fff # encoding: [0xff,0x7f,0x84,0x34]
# CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00]
xor $4, $5, -0x8000
# CHECK-NEXT: addiu $4, $zero, -0x8000 # encoding: [0x00,0x80,0x04,0x24]
# CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00]
xor $4, $5, 0
# CHECK-NEXT: xori $4, $5, 0x0 # encoding: [0x00,0x00,0xa4,0x38]
xor $4, $5, 0xFFFF
# CHECK-NEXT: xori $4, $5, 0xffff # encoding: [0xff,0xff,0xa4,0x38]
xor $4, $5, 0x10000
# CHECK-NEXT: lui $4, 0x1 # encoding: [0x01,0x00,0x04,0x3c]
# CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00]
xor $4, $5, 0xFFFFFFFF
# CHECK-NEXT: lui $4, 0xffff # encoding: [0xff,0xff,0x04,0x3c]
# CHECK-NEXT: dsrl32 $4, $4, 0x0 # encoding: [0x3e,0x20,0x04,0x00]
# CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00]
sdardisUnsubmitted
Not Done
ReplyInline Actions

This should not be sign extended.

sdardis: This should not be sign extended.
xor $4, $5, 0xF0000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00]
xor $4, $5, 0x7FFFFFFF
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00]
xor $4, $5, 0x7FFFFFFFFFFFFFFF
# FIXME: this is awfully inefficient...
# CHECK-NEXT: lui $4, 0x7fff # encoding: [0xff,0x7f,0x04,0x3c]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xffff # encoding: [0xff,0xff,0x84,0x34]
# CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00]
xor $4, $5, 0xFFFFFFFFFFFFFFFF
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00]
xor $4, $5, 0xF000000000000000
# CHECK-NEXT: ori $4, $zero, 0xf000 # encoding: [0x00,0xf0,0x04,0x34]
# CHECK-NEXT: dsll $4, $4, 0x30 # encoding: [0x3c,0x24,0x04,0x00]
# CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00]
xor $4, $5, ~(0xf0000000|0x0f000000|0x000000f0)
# CHECK-NEXT: addiu $4, $zero, -0x1 # encoding: [0xff,0xff,0x04,0x24]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff # encoding: [0xff,0x00,0x84,0x34]
# CHECK-NEXT: dsll $4, $4, 0x10 # encoding: [0x38,0x24,0x04,0x00]
# CHECK-NEXT: ori $4, $4, 0xff0f # encoding: [0x0f,0xff,0x84,0x34]
# CHECK-NEXT: xor $4, $4, $5 # encoding: [0x26,0x20,0x85,0x00]
sdardisUnsubmitted
Not Done
ReplyInline Actions

Change that XXXAR to FIXME, so I can find it later.

We currently don't do many possible optimizations regarding constant synthesis in the assembler. I'd like to improve that but other things have higher priority.

sdardis: Change that XXXAR to FIXME, so I can find it later. We currently don't do many possible…