AArch64AsmParser: don't try to parse “[1]” for non-vector register operands

[SjoerdMeijer]

Summary

Hi Tim,
Do you think we can remove this code? It is not covered by tests, i.e. it never gets executed. But more importantly, it tries to parse “[1]” for non-vector register operands but I don't think that there are any instructions allowing this. The comments are suggesting FMOV, but this accepts [1] only for vector operands.
Cheers,
Sjoerd.

[olista01]

It looks like the comment about FMOVXDhighr is out of date, as that instruction now takes a VectorIndex1 operand, rather than having the "[1]" as part of the assembly string. I think you should still do a full MC Hammer run on AArch64 to check there are no other instructions we've missed.

[t.p.northover]

Oh, nice! If you've got MC Hammer handy go for it, but I agree this looks pretty safe to me. I can't find any assembly that really has "[1]" in the .td files.

[SjoerdMeijer]

I've ran MC Hammer and he was happy with it. Will commit.

llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

Operands.push_back(AArch64Operand::CreateVectorIndex(MCE->getValue(), SIdx,
                                                          E, getContext()));
   }
 
   return false;
 }
 
 /// parseRegister - Parse a non-vector register operand.
 bool AArch64AsmParser::parseRegister(OperandVector &Operands) {
-  MCAsmParser &Parser = getParser();
   SMLoc S = getLoc();
   // Try for a vector register.
   if (!tryParseVectorRegister(Operands))
     return false;
 
   // Try for a scalar register.
   int64_t Reg = tryParseRegister();
   if (Reg == -1)
     return true;
   Operands.push_back(
       AArch64Operand::CreateReg(Reg, false, S, getLoc(), getContext()));
 
-  // A small number of instructions (FMOVXDhighr, for example) have "[1]"
-  // as a string token in the instruction itself.
-  SMLoc LBracS = getLoc();
-  const AsmToken &Tok = Parser.getTok();
-  if (parseOptionalToken(AsmToken::LBrac)) {
-    if (Tok.is(AsmToken::Integer)) {
-      SMLoc IntS = getLoc();
-      int64_t Val = Tok.getIntVal();
-      if (Val == 1) {
-        Parser.Lex();
-        SMLoc RBracS = getLoc();
-        if (parseOptionalToken(AsmToken::RBrac)) {
-          Operands.push_back(
-              AArch64Operand::CreateToken("[", false, LBracS, getContext()));
-          Operands.push_back(
-              AArch64Operand::CreateToken("1", false, IntS, getContext()));
-          Operands.push_back(
-              AArch64Operand::CreateToken("]", false, RBracS, getContext()));
-          return false;
-        }
-      }
-    }
-  }
-
   return false;
 }
 
 bool AArch64AsmParser::parseSymbolicImmVal(const MCExpr *&ImmVal) {
   MCAsmParser &Parser = getParser();
   bool HasELFModifier = false;
   AArch64MCExpr::VariantKind RefKind;