This is an archive of the discontinued LLVM Phabricator instance.

Differential D30140

AMDGPU: Add some of the new gfx9 VOP3 instructions
ClosedPublic

Authored by arsenm on Feb 18 2017, 11:34 AM.

Details

Reviewers
kzhuravl

Diff Detail

Event Timeline

arsenm created this revision.Feb 18 2017, 11:34 AM
Herald added subscribers: tpr, tony-tye, yaxunl and 3 others. · View Herald TranscriptFeb 18 2017, 11:34 AM
arsenm added a child revision: D30141: AMDGPU: Support v2i16/v2f16 packed operations.Feb 18 2017, 11:35 AM
kzhuravl accepted this revision.Feb 27 2017, 1:00 AM

LGTM.

This revision is now accepted and ready to land.Feb 27 2017, 1:00 AM
arsenm closed this revision.Feb 27 2017, 1:17 PM

r296382

Revision Contents

PathSize
lib/
Target/
AMDGPU/
12 lines
test/
MC/
AMDGPU/
32 lines

Diff 89031

lib/Target/AMDGPU/VOP3Instructions.td

Show First 20 Lines • Show All 279 Lines • ▼ Show 20 Lines
defm: Tenary_i16_Pats<mul, add, V_MAD_U16, zext>; defm: Tenary_i16_Pats<mul, add, V_MAD_U16, zext>;
defm: Tenary_i16_Pats<mul, add, V_MAD_I16, sext>; defm: Tenary_i16_Pats<mul, add, V_MAD_I16, sext>;
} // End Predicates = [isVI] } // End Predicates = [isVI]
let SubtargetPredicate = isGFX9 in { let SubtargetPredicate = isGFX9 in {
def V_PACK_B32_F16 : VOP3Inst <"v_pack_b32_f16", VOP3_Profile<VOP_B32_F16_F16>>; def V_PACK_B32_F16 : VOP3Inst <"v_pack_b32_f16", VOP3_Profile<VOP_B32_F16_F16>>;
def V_LSHL_ADD_U32 : VOP3Inst <"v_lshl_add_u32", VOP3_Profile<VOP_I32_I32_I32_I32>>;
def V_ADD_LSHL_U32 : VOP3Inst <"v_add_lshl_u32", VOP3_Profile<VOP_I32_I32_I32_I32>>;
def V_ADD3_U32 : VOP3Inst <"v_add3_u32", VOP3_Profile<VOP_I32_I32_I32_I32>>;
def V_LSHL_OR_B32 : VOP3Inst <"v_lshl_or_b32", VOP3_Profile<VOP_I32_I32_I32_I32>>;
def V_AND_OR_B32 : VOP3Inst <"v_and_or_b32", VOP3_Profile<VOP_I32_I32_I32_I32>>;
def V_OR3_B32 : VOP3Inst <"v_or3_b32", VOP3_Profile<VOP_I32_I32_I32_I32>>;
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Target // Target
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
▲ Show 20 Lines • Show All 173 Lines • ▼ Show 20 Lines
defm V_MUL_HI_U32 : VOP3_Real_vi <0x286>; defm V_MUL_HI_U32 : VOP3_Real_vi <0x286>;
defm V_MUL_HI_I32 : VOP3_Real_vi <0x287>; defm V_MUL_HI_I32 : VOP3_Real_vi <0x287>;
defm V_LSHLREV_B64 : VOP3_Real_vi <0x28f>; defm V_LSHLREV_B64 : VOP3_Real_vi <0x28f>;
defm V_LSHRREV_B64 : VOP3_Real_vi <0x290>; defm V_LSHRREV_B64 : VOP3_Real_vi <0x290>;
defm V_ASHRREV_I64 : VOP3_Real_vi <0x291>; defm V_ASHRREV_I64 : VOP3_Real_vi <0x291>;
defm V_TRIG_PREOP_F64 : VOP3_Real_vi <0x292>; defm V_TRIG_PREOP_F64 : VOP3_Real_vi <0x292>;
defm V_LSHL_ADD_U32 : VOP3_Real_vi <0x1fd>;
defm V_ADD_LSHL_U32 : VOP3_Real_vi <0x1fe>;
defm V_ADD3_U32 : VOP3_Real_vi <0x1ff>;
defm V_LSHL_OR_B32 : VOP3_Real_vi <0x200>;
defm V_AND_OR_B32 : VOP3_Real_vi <0x201>;
defm V_OR3_B32 : VOP3_Real_vi <0x202>;
defm V_PACK_B32_F16 : VOP3_Real_vi <0x2a0>; defm V_PACK_B32_F16 : VOP3_Real_vi <0x2a0>;

test/MC/AMDGPU/vop3-gfx9.s

  • This file was added.
// RUN: llvm-mc -arch=amdgcn -mcpu=gfx901 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck -check-prefix=NOVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s 2>&1 | FileCheck -check-prefix=NOVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck -check-prefix=NOVI %s
v_lshl_add_u32 v1, v2, v3, v4
// GFX9: v_lshl_add_u32 v1, v2, v3, v4 ; encoding: [0x01,0x00,0xfd,0xd1,0x02,0x07,0x12,0x04]
// NOVI: :1: error: instruction not supported on this GPU
v_add_lshl_u32 v1, v2, v3, v4
// GFX9: v_add_lshl_u32 v1, v2, v3, v4 ; encoding: [0x01,0x00,0xfe,0xd1,0x02,0x07,0x12,0x04]
// NOVI: :1: error: instruction not supported on this GPU
v_add3_u32 v1, v2, v3, v4
// GFX9: v_add3_u32 v1, v2, v3, v4 ; encoding: [0x01,0x00,0xff,0xd1,0x02,0x07,0x12,0x04]
// NOVI: :1: error: instruction not supported on this GPU
v_lshl_or_b32 v1, v2, v3, v4
// GFX9: v_lshl_or_b32 v1, v2, v3, v4 ; encoding: [0x01,0x00,0x00,0xd2,0x02,0x07,0x12,0x04]
// NOVI: :1: error: instruction not supported on this GPU
v_and_or_b32 v1, v2, v3, v4
// GFX9: v_and_or_b32 v1, v2, v3, v4 ; encoding: [0x01,0x00,0x01,0xd2,0x02,0x07,0x12,0x04]
// NOVI: :1: error: instruction not supported on this GPU
v_or3_b32 v1, v2, v3, v4
// GFX9: v_or3_b32 v1, v2, v3, v4 ; encoding: [0x01,0x00,0x02,0xd2,0x02,0x07,0x12,0x04]
// NOVI: :1: error: instruction not supported on this GPU
v_pack_b32_f16 v1, v2, v3
// GFX9: v_pack_b32_f16 v1, v2, v3 ; encoding: [0x01,0x00,0xa0,0xd2,0x02,0x07,0x02,0x00]
// NOVI: :1: error: instruction not supported on this GPU